m3s022bo.vhd
来自「another 8051 core porocesssor vhdl sourc」· VHDL 代码 · 共 114 行
VHD
114 行
--******************************************************************* ----IMPORTANT NOTICE ----================ ----Copyright Mentor Graphics Corporation 1996 - 1999. All rights reserved. ----This file and associated deliverables are the trade secrets, ----confidential information and copyrighted works of Mentor Graphics ----Corporation and its licensors and are subject to your license agreement ----with Mentor Graphics Corporation. ---- ----Use of these deliverables for the purpose of making silicon from an IC ----design is limited to the terms and conditions of your license agreement ----with Mentor Graphics If you have further questions please contact Mentor ----Graphics Customer Support. ---- ----This Mentor Graphics core (m8051 v1999.120) was extracted on ----workstation hostid _hostid_ Inventra ----matrix decode of m8051-- Copyright Mentor Graphics Corporation and Licensors 1998. All rights reserved--v1.002--*********************************************************************--@(#)m3s022bo.vhd 1.2 04/08/99 SCCS Version Control--File : m3s022bo.vhd--Created on : 11th September 1995--Purpose : matrix decode of m8051--Version : 1.002--Mod Date : 2nd April 1998--Mod History : 1.002 _e suffix removed from entity names.----*********************************************************************--Hierarchy record :--Called by :m3s004bo.vhd--Calls to :None-- :-- :-- :--*********************************************************************library IEEE;use IEEE.std_logic_1164.all;library WORK;--*********************************************************************--Entity Definition--*********************************************************************entity m3s022bo is--******************************************************************* ----IMPORTANT NOTICE ----================ ----Copyright Mentor Graphics Corporation 1996 - 1999. All rights reserved. ----This file and associated deliverables are the trade secrets, ----confidential information and copyrighted works of Mentor Graphics ----Corporation and its licensors and are subject to your license agreement ----with Mentor Graphics Corporation. ---- ----Use of these deliverables for the purpose of making silicon from an IC ----design is limited to the terms and conditions of your license agreement ----with Mentor Graphics If you have further questions please contact Mentor ----Graphics Customer Support. ---- ----This Mentor Graphics core (m8051 v1999.120) was extracted on ----workstation hostid _hostid_ Inventra -- port(LODEC: out std_logic_vector(7 downto 0); HIDEC: out std_logic_vector(15 downto 0); OPC: in std_logic_vector(7 downto 0) ); end m3s022bo;--*********************************************************************--Architecture definition--*********************************************************************architecture m3s022bo_rtl of m3s022bo is--*********************************************************************begin--*********************************************************************--Process Definitions--*********************************************************************matr:process(OPC)begin LODEC(0) <= not(OPC(0) or OPC(1) or OPC(2) or OPC(3)); LODEC(1) <= not((not OPC(0)) or OPC(1) or OPC(2) or OPC(3)); LODEC(2) <= not(OPC(0) or (not OPC(1)) or OPC(2) or OPC(3)); LODEC(3) <= not((not OPC(0)) or (not OPC(1)) or OPC(2) or OPC(3)); LODEC(4) <= not(OPC(0) or OPC(1) or (not OPC(2)) or OPC(3)); LODEC(5) <= not((not OPC(0)) or OPC(1) or (not OPC(2)) or OPC(3)); LODEC(6) <= not(OPC(0) or (not OPC(1)) or (not OPC(2)) or OPC(3)); LODEC(7) <= not((not OPC(0)) or (not OPC(1)) or (not OPC(2)) or OPC(3)); HIDEC(0) <= not(OPC(4) or OPC(5) or OPC(6) or OPC(7)); HIDEC(1) <= not((not OPC(4)) or OPC(5) or OPC(6) or OPC(7)); HIDEC(2) <= not(OPC(4) or (not OPC(5)) or OPC(6) or OPC(7)); HIDEC(3) <= not((not OPC(4)) or (not OPC(5)) or OPC(6) or OPC(7)); HIDEC(4) <= not(OPC(4) or OPC(5) or (not OPC(6)) or OPC(7)); HIDEC(5) <= not((not OPC(4)) or OPC(5) or (not OPC(6)) or OPC(7)); HIDEC(6) <= not(OPC(4) or (not OPC(5)) or (not OPC(6)) or OPC(7)); HIDEC(7) <= not((not OPC(4)) or (not OPC(5)) or (not OPC(6)) or OPC(7)); HIDEC(8) <= not(OPC(4) or OPC(5) or OPC(6) or (not OPC(7))); HIDEC(9) <= not((not OPC(4)) or OPC(5) or OPC(6) or (not OPC(7))); HIDEC(10) <= not(OPC(4) or (not OPC(5)) or OPC(6) or (not OPC(7))); HIDEC(11) <= not((not OPC(4)) or (not OPC(5)) or OPC(6) or (not OPC(7))); HIDEC(12) <= not(OPC(4) or OPC(5) or (not OPC(6)) or (not OPC(7))); HIDEC(13) <= not((not OPC(4)) or OPC(5) or (not OPC(6)) or (not OPC(7))); HIDEC(14) <= not(OPC(4) or (not OPC(5)) or (not OPC(6)) or (not OPC(7))); HIDEC(15) <= not((not OPC(4)) or (not OPC(5)) or (not OPC(6)) or not OPC(7));end process matr;--*********************************************************************end m3s022bo_rtl;--*********************************************************************
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