m3s040bo.vhd

来自「another 8051 core porocesssor vhdl sourc」· VHDL 代码 · 共 106 行

--*******************************************************************       --
--IMPORTANT NOTICE                                                          --
--================                                                          --
--Copyright Mentor Graphics Corporation 1996 - 1999.  All rights reserved.  --
--This file and associated deliverables are the trade secrets,              --
--confidential information and copyrighted works of Mentor Graphics         --
--Corporation and its licensors and are subject to your license agreement   --
--with Mentor Graphics Corporation.                                         --
--                                                                          --
--Use of these deliverables for the purpose of making silicon from an IC    --
--design is limited to the terms and conditions of your license agreement   --
--with Mentor Graphics If you have further questions please contact Mentor  --
--Graphics Customer Support.                                                --
--                                                                          --
--This Mentor Graphics core (m8051 v1999.120) was extracted on              --
--workstation hostid _hostid_ Inventra                                      --
--4 Bit sum generate/propagate for m8051
--Copyright Mentor Graphics Corporation and Licensors 1998. All rights reserved.
--v1.002
--*********************************************************************
--@(#)m3s040bo.vhd	1.2 04/08/99 SCCS Version Control

--File	        :       m3s040bo.vhd
--Created on    :       12th October 1995
--Purpose       :       4 Bit sum generate/propagate for m8051
--Version       :       1.002
--Mod Date      :       2nd April 1998
--Mod History	:       1.002 _e suffix removed from entity names.
--
--
--
--*********************************************************************
--Hierarchy record      :
--Called by             :m3s011bo.vhd
--Calls to              :None
--                      :
--                      :
--                      :
---------------------------------------------------
library IEEE;

use IEEE.std_logic_1164.all;
library WORK;

--*********************************************************************
--Entity Definition
--*********************************************************************

entity m3s040bo is
--*******************************************************************       --
--IMPORTANT NOTICE                                                          --
--================                                                          --
--Copyright Mentor Graphics Corporation 1996 - 1999.  All rights reserved.  --
--This file and associated deliverables are the trade secrets,              --
--confidential information and copyrighted works of Mentor Graphics         --
--Corporation and its licensors and are subject to your license agreement   --
--with Mentor Graphics Corporation.                                         --
--                                                                          --
--Use of these deliverables for the purpose of making silicon from an IC    --
--design is limited to the terms and conditions of your license agreement   --
--with Mentor Graphics If you have further questions please contact Mentor  --
--Graphics Customer Support.                                                --
--                                                                          --
--This Mentor Graphics core (m8051 v1999.120) was extracted on              --
--workstation hostid _hostid_ Inventra                                      --
       port(NGC,
            NPC:
            out std_logic;
            NG,
            P:
            in std_logic_vector(3 downto 0) 
            );       
end m3s040bo;
--*********************************************************************
--Architecture definition
--*********************************************************************
architecture m3s040bo_rtl of m3s040bo is
--*********************************************************************

--*********************************************************************
--Signal definitions
--*********************************************************************
signal AA,AB,AC,AD:std_logic;
--*********************************************************************
begin
--*********************************************************************
--Process Definitions
--*********************************************************************
misc1:process(P,NG)
begin
   AA <= NG(0) and NG(1) and NG(2) and NG(3);
   AB <= (not P(1)) and NG(1)and NG(2)and NG(3);
   AC <= (not P(2)) and NG(2) and NG(3);
   AD <= (not P(3)) and NG(3);
end process misc1;
--*********************************************************************

sumout:process(AA,AB,AC,AD,P)
begin
   NPC <= not(P(0) and P(1) and P(2) and P(3));
   NGC <= AA or AB or AC or AD;
end process sumout;
--*********************************************************************
end m3s040bo_rtl;
--*********************************************************************