m3s018bo.vhd

来自「another 8051 core porocesssor vhdl sourc」· VHDL 代码 · 共 516 行 · 第 1/2 页

VHD
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--*********************************************************************setpodmen:process(NX2)begin    if NX2'event and NX2 = '1' then       if DIV2CK = '0' then          if ((STATD(4) and CYC(1) and MOVX(0)) ='1') then             PODMEN <= '1';          elsif ((STATD(4) and CYC(2)) or CLEAR or                (MOVX(4) and STATD(5) and EXTDAT)) = '1' then             PODMEN <= '0';          end if;        end if;     end if;end process setpodmen;--*********************************************************************setaddmen:process(NX2)begin    if NX2'event and NX2 = '1' then       if CLEAR = '1' then          P0DADD <= '0';       elsif DIV2CK = '0' then          if ((STATD(4) and CYC(1) and MOVX(0)) ='1') then             P0DADD <= '1';          end if;       elsif DIV2CK ='1' then          if (STATD(6) ='1') then             P0DADD <= '0';          end if;       end if;     end if;end process setaddmen;--*********************************************************************latportin:process(NX2)begin  if NX2'event and NX2 = '1' then       if DIV2CK ='0' then          if STATD(4) ='1' then             LAI_IN <= AI;             LBI_IN <= BI;             LCI_IN <= CI;             LDI_IN <= DI;           end if;        end if;   end if;end process latportin;--*********************************************************************--External signals+directly related--*********************************************************************set_hlt:process(NX1,RST)begin    if RST = '1' then        IDLE <= '0';    elsif NX1'event and NX1 ='1' then        IDLE <= PCON(0);    end if;end process set_hlt;--*********************************************************************setouts:process(NQEN,L_EXPMEM,IDLE,MOVX,PORT1_SFR,L_OC,L_OD)begin    NPSEN <= IDLE or NQEN or not L_EXPMEM;    MOEI <= not (L_EXPMEM or NQEN);    EXPMEM <= L_EXPMEM;    OB <= PORT1_SFR;    OC <= L_OC;    OD <= L_OD;end process setouts;--*********************************************************************aleout:process(QALE,IDLE)begin          ALE <= IDLE or QALE;end process aleout;--*********************************************************************setqen:process(NX2,RST)begin    if RST = '1' then       NQEN <= '1';    elsif NX2'event and NX2 ='1' then       if DIV2CK = '0' then          if ((STATD(5) and not(CYC(1) and MOVX(0))) or              (STATD(2) and not CLEAR and not(CYC(2) and MOVX(0)))) = '1'          then                NQEN <= '0';          end if;       else          if (STATD(1) or STATD(4)) = '1' then                NQEN <= '1';          end if;       end if;    end if;end process setqen;--*********************************************************************setselc:process(MOVX, EXTDAT, EXT_PROG_EN,RST)begin   SELC <= (MOVX(2) and EXTDAT) or           (EXT_PROG_EN and not EXTDAT and not RST);end process setselc;--*********************************************************************stretch_movx: process(NX2)-- Extend MOVX write timing on Port 0 by one clock period for exact-- compatibility with discrete devices.begin   if NX2'event and NX2 = '1' then      EXTEND_MOVX <= STATD(4) and MOVX(3);   end if;end process stretch_movx;--*********************************************************************setselmuxoa:process(EXTDAT, EXTEND_MOVX, EXT_PROG_EN, P0DADD, MOVX, CYC)-- Port 0 output data source control.-- Concatenate MUX select inputs for benefit of case syntax.-- Default condition is 110, i.e. output port 0 SFR contents.begin    SELA(2 downto 0) <=((EXTEND_MOVX and CYC(2)) or not EXTDAT)                      &                      ((EXTDAT or not EXT_PROG_EN)                      and not EXTEND_MOVX and not P0DADD)                      &                      MOVX(1);end process setselmuxoa;--*********************************************************************muxoa:process(SELA,DPL,FA,ACCDAT,PROGRAM_ADDR,PORT0_SFR)-- Port 0 output data source multiplexerbegin   case SELA(2 downto 0) is       when "000" => OAI <= DPL;       when "001" => OAI <= FA;       when "010" => OAI <= ACCDAT;       when "011" => OAI <= ACCDAT;       when "100" => OAI <= PROGRAM_ADDR(7 downto 0);       when "101" => OAI <= PROGRAM_ADDR(7 downto 0);       when "110" => OAI <= PORT0_SFR;       when "111" => OAI <= PORT0_SFR;       when others => OAI <= "XXXXXXXX";    end case;end process muxoa;--*********************************************************************muxoc:process(SELC,PORT2_SFR,LOCALE)begin   case SELC is       when '0' => L_OC <= PORT2_SFR;       when '1' => L_OC <=  LOCALE;       when others => L_OC <= "XXXXXXXX";    end case;end process muxoc;--*********************************************************************setodrest:process(RXDO, TXDO, NWR, NRD, PORT3_SFR)-- Wire-OR alternate function outputs onto port 3 output pins.begin    L_OD(0) <= PORT3_SFR(0) and RXDO;     L_OD(1) <= PORT3_SFR(1) and TXDO;     L_OD(2) <= PORT3_SFR(2);    L_OD(3) <= PORT3_SFR(3);    L_OD(4) <= PORT3_SFR(4);    L_OD(5) <= PORT3_SFR(5);    L_OD(6) <= PORT3_SFR(6) and NWR;     L_OD(7) <= PORT3_SFR(7) and NRD; end process setodrest;  --*********************************************************************movx_strobes:process(NX2)-- Generate MOVX read and write strobes, between end S6P2 and end S3P2.begin    if NX2'event and NX2 = '1' then       if DIV2CK ='0' then          if (STATD(3) or CLEAR) = '1' then             NWR <= '1';             NRD <= '1';          elsif ((STATD(6) and CYC(1)) ='1') then             NWR <= not MOVX(3);             NRD <= not MOVX(4);          end if;        end if;     end if;end process movx_strobes;--*********************************************************************setae:process(AEEN,PORT0_SFR)begin    if AEEN ='1' then       AE <= "00000000";    else       AE <= PORT0_SFR;    end if;end process setae;--********************************************************************* setdelays:process(NX2,RST)   -- delay switch off of drive enables on ports one to three by two clock periods.begin   if RST = '1' then      PORT1_DEL <= "11111111";      PORT2_DEL <= "11111111";      PORT3_DEL <= "11111111";   elsif NX2'event and NX2 = '1' then      if DIV2CK ='0' then         PORT1_DEL <= PORT1_SFR;         PORT2_DEL <= L_OC;         PORT3_DEL <= L_OD;      end if;   end if;end process setdelays;  --*********************************************************************setbe:process(PORT1_SFR,PORT1_DEL)begin    BE(0) <= PORT1_SFR(0) and PORT1_DEL(0);    BE(1) <= PORT1_SFR(1) and PORT1_DEL(1);    BE(2) <= PORT1_SFR(2) and PORT1_DEL(2);    BE(3) <= PORT1_SFR(3) and PORT1_DEL(3);    BE(4) <= PORT1_SFR(4) and PORT1_DEL(4);    BE(5) <= PORT1_SFR(5) and PORT1_DEL(5);    BE(6) <= PORT1_SFR(6) and PORT1_DEL(6);    BE(7) <= PORT1_SFR(7) and PORT1_DEL(7);end process setbe;  --********************************************************************* setce:process(L_OC,PORT2_DEL,SELC)begin    CE(0) <= L_OC(0) and PORT2_DEL(0) and not SELC;    CE(1) <= L_OC(1) and PORT2_DEL(1) and not SELC;    CE(2) <= L_OC(2) and PORT2_DEL(2) and not SELC;    CE(3) <= L_OC(3) and PORT2_DEL(3) and not SELC;    CE(4) <= L_OC(4) and PORT2_DEL(4) and not SELC;    CE(5) <= L_OC(5) and PORT2_DEL(5) and not SELC;    CE(6) <= L_OC(6) and PORT2_DEL(6) and not SELC;    CE(7) <= L_OC(7) and PORT2_DEL(7) and not SELC;end process setce;  --********************************************************************* setde:process(L_OD, PORT3_DEL)begin    DE(0) <= L_OD(0) and PORT3_DEL(0);    DE(1) <= L_OD(1) and PORT3_DEL(1);    DE(2) <= L_OD(2) and PORT3_DEL(2);    DE(3) <= L_OD(3) and PORT3_DEL(3);    DE(4) <= L_OD(4) and PORT3_DEL(4);    DE(5) <= L_OD(5) and PORT3_DEL(5);    DE(6) <= L_OD(6) and PORT3_DEL(6);    DE(7) <= L_OD(7) and PORT3_DEL(7);end process setde;--********************************************************************* muxportsin:process(RMW, LAI_IN, PORT0_SFR, LBI_IN, PORT1_SFR, LCI_IN, PORT2_SFR, LDI_IN, PORT3_SFR)-- PORT SFR read back MUX:  Port pin values are read unless the -- instruction is a read modify write operation in which case the port-- SFR value is used. begin   case RMW is      when '0' => PORTA <= LAI_IN;                  PORTB <= LBI_IN;                  PORTC <= LCI_IN;                  PORTD <= LDI_IN;      when '1' => PORTA <= PORT0_SFR;                  PORTB <= PORT1_SFR;                  PORTC <= PORT2_SFR;                  PORTD <= PORT3_SFR;      when others => PORTA <= "XXXXXXXX";                     PORTB <= "XXXXXXXX";                     PORTC <= "XXXXXXXX";                     PORTD <= "XXXXXXXX";   end case;end process muxportsin;--********************************************************************* end m3s018bo_rtl;--*********************************************************************

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