m3s028bo.vhd

来自「another 8051 core porocesssor vhdl sourc」· VHDL 代码 · 共 812 行 · 第 1/2 页

   COUNT_EN <= ((L_SCON(6) and (not CKMASK) and LOV1) or
                ((not L_SCON(6)) and (not CKMASK))) and not DIV2CK1;
end process countrxtx;
--*********************************************************************
setdelcnt:process(NX1)
begin
   if NX1'event and NX1 ='1' then
      if DIV2CK1 = '0' then
         DELCNT <= COUNT_EN;
      end if;
   end if;
end process setdelcnt;
--*********************************************************************
setckmask:process(NX1)
begin
   if NX1'event and NX1 ='1' then
      if SFRW(10) = '0' then
          CKMASK <= DCKM;
      end if;
    end if;
end process setckmask;
--*********************************************************************
gentxclk:process(NX1)
begin
   if NX1'event and NX1 ='1' then
      if (T_EN and not DIV2CK1) = '1' then
          TXCLK <= '0';
      elsif SETTXCLK = '1' then
          TXCLK <= '1';
      end if;
   end if;
end process gentxclk;
--*********************************************************************
delayten:process(NX1)
begin
   if NX1'event and NX1 ='1' then
      if (T_EN and DIV2CK1) = '1' then
         SETTXCLK <= '1';
      else
         SETTXCLK <= '0';
      end if;
   end if;
end process delayten;
--*********************************************************************
clksenab:process(MODE0,Q1,CKMASK,STATE12,RXC9,DELCNT)
begin
   case MODE0 is
       when '0' => TX_EN <= Q1 and DELCNT and not CKMASK;
                   RX_EN <= RXC9 and not CKMASK;
       when '1' => TX_EN <= (not CKMASK) and STATE12;
                   RX_EN <= (not CKMASK) and STATE12;
       when others => RX_EN <= 'X';
                      TX_EN <= 'X';
    end case;
end process clksenab;   
--*********************************************************************
divby2:process(NX1)
begin
   if NX1'event and NX1 ='1' then
        if CLEAR ='1' then
            DIVTWO <= '0';
        elsif COUNT_EN = '1' then
            DIVTWO <= not DIVTWO;
        end if;
    end if;
end process divby2;
--*********************************************************************
setrxc78:process(NX1)
begin
   if NX1'event and NX1 ='1' then 
       if DIV2CK1 = '0' then
           RXC7 <= (not AF) and COUNT_EN and TCI(0);
           RXC8 <= (not AE) and COUNT_EN and TCI(0);
           RXC9 <= (not AH) and COUNT_EN and TCI(0);
       end if;
   end if;
end process setrxc78;
--*********************************************************************
txprestoplat:process(NX1)
begin
   if NX1'event and NX1 ='1' then
       if ((T_EN and (not DIV2CK1)) = '1') then
          Q3 <= TXSTOPBIT;
          NEWDATA <= not DATAEN;
       end if;
   end if;
end process txprestoplat;
--*********************************************************************
txstopbitlat:process(NX1)
begin
   if NX1'event and NX1 ='1' then
       if CLEAR ='1' then
          TSHIFT_IN <= '0';
       elsif (TSHIFT_EN = '1') then
           if NEWDATA = '0' then
              TSHIFT_IN <= Q3;
           else
              TSHIFT_IN <= L_SCON(3) or not L_SCON(7);
           end if;
       end if;
    end if;
end process; 
--*********************************************************************
setq1:process(NX1)
begin
   if NX1'event and NX1 ='1' then
       if COUNT_EN ='1' then
           Q1 <= TCI(0) and TX_DIV(3) and TX_DIV(2) and TX_DIV(0) and not TX_DIV(1);
       end if;
   end if;
end process setq1;
--*********************************************************************
setq5:process(NX1)
begin
   if NX1'event and NX1 ='1' then
       if CLEAR ='1' then
           Q5 <= '0';
       elsif TISET ='1' then
           Q5 <= '0';
       elsif SFRW(11) ='1' then
           Q5 <= '1';
       end if;
    end if;
end process setq5;
--*********************************************************************
setq6:process(NX1)
begin
   if NX1'event and NX1 ='1' then
      if (T_EN and DIV2CK1) ='0' then
          Q6 <= not Q5;
      end if;
   end if;
end process setq6;
--*********************************************************************
RB8control:process(NX1)
begin
   if NX1'event and NX1 ='1' then
      if CLEAR = '1' then
         SELRB8 <= '0';
      elsif (RX_EN and not DIV2CK1)='1' then
         SELRB8 <= not BLOCK_SBUF_LD and not MODE0 and RCV and not FRM(0);
      end if;
   end if;
end process RB8control;
--*********************************************************************
settsend:process(NX1)
begin
   if NX1'event and NX1 ='1' then
      if CLEAR = '1' then
          TSEND <= '0';
      elsif (((T_EN and (not Q5) and not DIV2CK1) or Q6) = '1') then
          TSEND <= '0';
      elsif (TX_EN and not DIV2CK1)= '1' then
          TSEND <= '1';
      end if;
   end if;
end process settsend;      
--*********************************************************************
setdataen:process(NX1)
begin
   if NX1'event and NX1 ='1' then
      if (((T_EN and (not Q5) and not DIV2CK1) or Q6) = '1') then
          DATAEN <= '0';
      elsif (TX_EN and not DIV2CK1) ='1' then
          if (DATAEN or MODE0) = '0' then
             DATAEN <= TSEND;
          else 
             DATAEN <= '1'; 
          end if;
      end if;
    end if;
end process setdataen;
--*********************************************************************
settstopbit:process(NX1)
begin
   if NX1'event and NX1 ='1' then
      if (TX_EN and not DIV2CK1)='1' then
         TXSTOPBIT <=  L_SCON(7) and (not DATAEN) and not Q6;
      end if;
   end if;
end process settstopbit;
--*********************************************************************
setlastbit:process(NX1)
begin
   if NX1'event and NX1 ='1' then
      if (Q6 or CLEAR) = '1' then
          TXLASTBIT <= '0';         
      elsif ((TX_EN and DIV2CK1) = '1') then
          TXLASTBIT <= TSEND and  QLOW and (not TSHIFT_IN) and (not TXSTOPBIT);
      end if;
   end if;
end process setlastbit;       
--*********************************************************************
settxend:process(NX1)
begin
   if NX1'event and NX1 ='1' then
      if (CLEAR or Q6)= '1' then
          TXEND <= '0';         
      elsif ((TX_EN and DIV2CK1) = '1') then
          TXEND <= TXLASTBIT;
      end if;
   end if;
end process settxend;       
--*********************************************************************
setrstqs:process(NX1)
begin
   if NX1'event and NX1 ='1' then
       if CLEAR ='1' then
           RSTQ1 <= '0';
       elsif COUNT_EN= '1' then
           if TCI(0) = '1' then
              RSTQ1 <= RCV or not RX_DIN;
           end if;
       end if;
    end if;
end process setrstqs;
--*********************************************************************
setrcv:process(NX1)
begin
  if NX1'event and NX1 ='1' then
    if CLEAR = '1' or L_SCON(4) = '0' then
      RCV <= '0';
    elsif RST16C ='1' then
      RCV <=  '1';
    elsif (RX_EN and not DIV2CK1)='1' then
      RCV <= (RCV and (not(FLST or (RCV and CLR_RCV)))) or not SWREC;
    end if;
  end if;
end process setrcv;
--*********************************************************************
--setrcv:process(NX1)
--begin
--   if NX1'event and NX1 ='1' then
--       if CLEAR = '1' then
--          RCV <= '0';
--       elsif RST16C ='1' then
--          RCV <= '1';
--       elsif (RX_EN and not DIV2CK1)='1' then
--          RCV <= (RCV and (not(RCV and CLR_RCV))) or not SWREC;
--       elsif (RX_EN and DIV2CK1)='1' then
--          RCV <= RCV and not FLST;
--       end if;
--    end if;
--end process setrcv;
--*********************************************************************
delbitclearrcv:process(NX1)
begin
   if NX1'event and NX1 ='1' then
       if CLEAR = '1' then
          DELCLRRCV <= '0';
       elsif RSHIFT_EN ='1' then
          DELCLRRCV <= not FRM(0);
       end if;
    end if;
end process delbitclearrcv;
--*********************************************************************
muxclrrcv:process(DELCLRRCV,FRM,L_SCON)
begin
    if L_SCON(7) = '0' then
       CLR_RCV <= not FRM(0);
    else
       CLR_RCV <= DELCLRRCV;
    end if;
end process muxclrrcv;
--*********************************************************************
setdelrcv:process(NX1)
begin
   if NX1'event and NX1 ='1' then
       if (T_EN ='1' and DIV2CK1 ='0') then
          DELRCV <= RCV;
       end if;
   end if;
end process setdelrcv;
--*********************************************************************
setswrec:process(NX1)
begin
   if NX1'event and NX1 ='1' then
      if (T_EN and not DIV2CK1) = '1' then
         SWREC <= RCV or LL_SCON(0) or (not L_SCON(4)) or (not MODE0);
      end if;
   end if;
end process setswrec;
--*********************************************************************
setmajq1:process(NX1) 
begin
   if NX1'event and NX1 ='1' then
--      if (S_EN and not DIV2CK1) = '1' then
      if RXC7 = '1' then
          MAJQ1 <= RX_DIN;
      end if;
    end if;
end process setmajq1;
--*********************************************************************
setmajq2:process(NX1) 
begin
   if NX1'event and NX1 ='1' then
      if RXC8 = '1' then
          MAJQ2 <= RX_DIN;
      end if;
    end if;
end process setmajq2;
--*********************************************************************
sample:process(NX1)-- 9th bit latch
begin
   if NX1'event and NX1 ='1' then
           RX_DIN <= DI(0);
   end if;
end process sample;
--*********************************************************************
majin:process(RX_DIN,MAJQ2,MAJQ1)
begin
   MAJOUT <= (MAJQ1 and RX_DIN) or (MAJQ1 and MAJQ2) or (MAJQ2 and RX_DIN);
end process majin;
--*********************************************************************
setbitin:process(NX1)-- 9th bit latch
begin
   if NX1'event and NX1 ='1' then
       if (RSHIFT_EN = '1' and DIV2CK1 ='0') then
          if LORCV = '0' then
             BITIN <= MAJOUT;
          else 
             BITIN <= '1';
          end if;
       end if;
    end if;
end process setbitin;
--*********************************************************************
m0in:process(NX1)
begin
   if NX1'event and NX1 = '1' then
       if (S_EN = '1' and DIV2CK1 = '0') then
          MODE0_IN <= RX_DIN;
       end if;
   end if; 
end process m0in;
--*********************************************************************
muxrshiftin:process(MODE0,MODE0_IN,BITIN)
begin
   if MODE0 = '0' then
       RSHIFT_IN <= BITIN;
   else
       RSHIFT_IN <= MODE0_IN;
   end if;
end process muxrshiftin;
--*********************************************************************
setfsrej:process(NX1)
begin
   if NX1'event and NX1 ='1' then
      if RCV = '0' then
          FSREJ <= '0';
      elsif (RX_EN = '1' and DIV2CK1 ='0') then
          FSREJ <= DELRCV;
      end if;
   end if;
end process setfsrej;
--*********************************************************************
setsbuf:process(NX1)
begin
   if NX1'event and NX1 ='1' then
      if CLEAR = '1' then
          SBUF <= "00000000";
      elsif (RISET and DIV2CK1) ='1' then
          SBUF <= FRM;
      end if;
   end if;
end process setsbuf;
--*********************************************************************
setldrcv:process(NX1)
begin
   if NX1'event and NX1 ='1' then
      if (RST16C or CLEAR)= '1' then
          LORCV <= '1';
      elsif (RX_EN = '0' and DIV2CK1 ='0') then
          LORCV <= not RCV;
      end if;
   end if;
end process setldrcv;
--*********************************************************************
set_end_data:process(NX1)
begin
   if NX1'event and NX1 ='1' then
        if (CLEAR or END_DATA or (RCV and not DELRCV)) = '1' then
             END_DATA <= '0';
        elsif (RSHIFT_EN and RCV and (not FRM(0)) and not DIV2CK1) = '1' then
             END_DATA <= '1';
        end if;
   end if;
end process set_end_data;
--*********************************************************************
localout:process(LL_SCON,L_SCON,LTCI,LRCI,LRITI)
-- Rename divider carry outputs (LTCI & LRCI) for verilog compatibility.
begin
   SCON(7 downto 3) <= L_SCON;
   SCON(2 downto 0) <= LL_SCON;
   TCI(3 downto 1) <= LTCI;
   RCI(3 downto 1) <= LRCI;
   RITI <= LRITI;
end process localout;
--*********************************************************************

--*********************************************************************
end m3s028bo_rtl;
--*********************************************************************