func1.asm

来自「another 8051 core porocesssor vhdl sourc」· 汇编 代码 · 共 2,206 行 · 第 1/4 页

$mvx5:  error   E_movx_dptr_indirect	; failed to MOVX using DPTR

$mvx6:  inc     dptr
        movx    a, @dptr         	; get second external data byte
        cjne    a, #data55, $mvx7
        sjmp    popind

$mvx7:  error   E_movx_dptr_indirect	; failed to MOVX using DPTR

;============
;POPIND
;============
;
popind:
	mov	sp, #01h
	mov	b, #20h
	mov	a, #5ah
;
pop1:	push 	a
	cpl	a
	djnz	b, pop1
 
	mov	a, #10h
pop2:	pop	b
	mov 	r0, b
	cjne	r0, #0a5h, pop_err
	pop	b
	mov	r0, b

	cjne	r0, #05ah, pop_err
	dec	a
	djnz	a, pop2
	sjmp	serial_pretest
pop_err: 
	sjmp    pop_err
;
;=======================
; SERIAL INTERFACE TESTS
;=======================
;
;===============
serial_pretest:
;===============
;
; test serial port transmit interrupt
; check for unexpected interrupts and also ensure that
; serial interrupt happens at right time.
;
; entry: no conditions
;  exit: flags a corrupt
;	 all other registers preserved
;
;
; first enable test bench loop-back from TXD to RXD using PORT3.7 control

        mov     p3, #7fh		; enable serial loop back buffer

;
; initialise peripheral SFRs
;
	clr	a
	mov	ie, a			; disable all interrupts
	mov	ip, a			; clear priority
	mov	tmod,a			; initialise tmod
	mov	tl0,a			; initialise low byte
	mov	th0,a			; initialise high byte
	cpl	a
	mov	tl1,a			; initialise low byte
	mov	th1,a			; initialise high byte
	orl	pcon, #80h		; set smod
;
	mov	scon, #0
	mov	tcon, #(tcext1control + tcext0control)
					; select edge-triggered interrupts
;
; check for unexpected interrupt
;
	mov	ie, #(ieenable + ieserialenable)
					; enable int serial
	mov	sbuf, #ffh
	mov	scon, #sctxintflag	; provoke serial int
;
; wait for interrupt timeout
;
	mov	r0, #10
$i0t0:	djnz	r0, $i0t0		; loop until wrap
;
;
;===============
serial_mode_1:
;===============
;
; transmit and receive 91h in mode 1 regardless of 9th bit
	mov	tmod, #20h		; timer 1 in 8 bit reload mode
	mov	tcon, #(tct1on + tcext1control + tcext0control)
					; turn timer1 on

	mov	scon, #50h 		; select serial mode 1 and enable the receiver
        mov	r6, #91h		; load r6 with byte to be transmitted
	lcall	ser_int_check		; check serial interrupt has occurred
        mov	a, r6			; load acc with value transmitted
	cjne	a, sbuf, rx_err		; compare with byte received
        mov	a, #57h			; load acc with expected return value for scon
	cjne	a, scon, rx_err		; compare with current state 
        mov     scon, #70h		; transmit again with SM2 set
        mov	r6, #6Eh		; load r6 with byte to be transmitted
	lcall	ser_int_check		; check serial interrupt has occurred
        mov	a, r6			; load acc with value transmitted
	push	a			; save transmitted word for serial_mode_3 test
	cjne	a, sbuf, rx_err		; compare with byte received
        mov	a, #77h			; load acc with expected return value for scon
	cjne	a, scon, rx_err		; compare with current state 
;
;===============
serial_mode_3:
;===============
;
; transmit A2h in mode 3 regardless of 9th bit
					; turn timer1 on
	mov	scon, #scmode3		; select mode 3 for the serial interface
	orl	scon, #34h		; enable receiver and set both SM2 and RB8
        mov	r6, #A2h		; load r6 with byte to be transmitted
	lcall	ser_int_check		; check serial interrupt has occurred
        pop	a			; load acc with last value received
	cjne	a, sbuf, rx_err		; verify that the receiver buffer is unchanged
        mov	a, #F6h			; load acc with expected return value for scon
	cjne	a, scon, rx_err		; compare with current state 

	mov	scon, #F8h		; enable receiver and set both SM2 and TB8
        mov	r6, #B3h		; load r6 with byte to be transmitted
	lcall	ser_int_check		; check serial interrupt has occurred
        mov	a, r6  			; load acc with last value received
	cjne	a, sbuf, rx_err		; verify that the receiver buffer is unchanged
        mov	a, #FFh			; load acc with expected return value for scon
	cjne	a, scon, rx_err		; compare with current state 
;
;===============
serial_mode_2:
;===============
;
; transmit and receive 55h in mode 2 with 9th bit clear
;
	mov	scon, #90h		; select serial mode 2 and enable Rx
        mov	r6, #55h		; load r6 with byte to be transmitted
	lcall	ser_int_check		; check serial interrupt has occurred
        mov	a, r6			; load acc with value transmitted
	cjne	a, sbuf, rx_err		; compare with byte received
        mov	a, #93h			; load acc with expected return value for scon
	cjne	a, scon, rx_err		; compare with current state 

; disable test bench loop-back from TXD to RXD

        mov     p3, #ffh		; disable serial loop back buffer

;
;===============
serial_mode_0:
;===============
;
; transmit 76h in mode 0 and receive the same time-shifted by one bit.
; This test is dependent on the exact coding sequence given for correct timing
;
	mov	scon, #00h		; select serial mode 0
        mov	a, #76h			; load acc with byte to be transmitted
        mov     sbuf, a			; load buffer and start transmission
        setb    scon.4          	; enable receiver to start reception
        setb	c			; wait for transmission to complete
        rrc	a			; calculate byte expected at receiver
        nop
        nop
        nop
        nop
        nop
        nop
        jnb     scon.1, rx_err		; verify that TI is set
        jnb     scon.0, rx_err		; verify that RI is set
	cjne	a, sbuf, rx_err		; verify with byte received
	sjmp	priority_test		; pass on to the next group of tests

rx_err:	error   E_ser_data_bad		; failed to receive data transmitted
;
;====================
;INTERRUPT PRIORITIES
;====================
;
;=============
priority_test:
;=============
;
; test interrupt priority 
;
	clr	a
	mov	ie, a		;disable all interrupts
;
	mov	a, #50h		;different stack starting at 80
	mov	sp, a		;initialise stack pointer (play safe!)
;
; ensure timer0 and timer1 is stopped
;
	orl	p3, #ffh		;allow time to see action
;
        orl	tcon, #50h
	mov	scon, #0
	mov	a,  #33h
	mov	tmod, a		;initialise tmod
	clr	a  
	mov	tl0, a		;initialise low byte
	mov	th0, a		;initialise high byte
	mov	tl1, a		;initialise low byte
	mov	th1, a		;initialise high byte
	mov	tcon, #(tcext1control + tcext0control)
				;only int on edge transition
;
; test each interrupt in succession with higher priority
; ------------------------------------------------------
;
	mov	b, #bit4		;set serial int high priority
	mov	r1, #tr_int_flag;address of first flag to test
	mov	r2, #(tr_int_flag - i0_int_flag + 1)
;
$10pt:	mov	@r1, #0		;clear flag we are about to test
;	
	mov	r0, #int_counter
	mov	@r0, #1		;set counter to start value
;
	mov	a, b
	mov	ip, a		;set priority
	rr	a
	anl	a, #.not. (bit6 + bit7)
				;dont want to write to these
	mov	b, a		;save next priority

	orl	tcon, #(tcext0edge + tcext1edge + tct0overflow + tct1overflow)
	orl	scon, #(sctxintflag + scrxintflag)
	mov	ie, #(ieenable + ieserialenable + iet1enable + ieext1enable + iet0enable + ieext0enable)
				;enable all int sources
	mov	sbuf, #ffh
;
	cjne	@r1, #1, $90pt	;check for error
	dec	r1		;step to next flag
;
	djnz	r2, $10pt	;loop until all tested
	sjmp	ext_sfr
;
$90pt:	sjmp $90pt		; interrupt priority error loop

; External Interface Test
;=======
ext_sfr:
;=======
	mov	r0, #E8h	; corresponding addr to external SFR
	mov	E8h, #78h	; load external SFR
	mov	@r0, #CDh	; load corresponding address in memory
	inc	E8h
	inc	@r0
	mov	a, #79h
	cjne	a, E8h, esfr1	; ESFR should respond to direct reads
	cjne	@r0, #CEh, esfr1; data memory responds to indirect reads
	sjmp	psave		; pass on to the next test
esfr1:	error	E_ext_sfr	; external SFR failure loop

; Power saving demonstration
;=====
psave:
;=====
	mov	tmod, #02h	; set up timer 0 as an 8 bit timer
	mov	tl0, #FEh	; count two machine cycles before roll
	mov	th0, #00h	; reload value is not important
	mov	ie, #82h	; enable timer 0 interrupt
	mov	tcon, #10h	; start timer 0
	mov	pcon, #01h	; go idle and wait for interrupt
	mov	a, pcon		; inspect PCON after recovery from idle
	jnz	psave1		; PCON register should be clear
done:   ljmp	testok

psave1: error	E_power_control
;
;=============
ser_int_check:
;=============
;
; check serial interrupt
;
; entry: r6 contains data byte for transmission
;  exit: when a serial interrupt has occurred within timeout period
;	 if serial interrupt has not occurred by timeout the loop does not exit
;	 r1 corrupt, ie.4 reset
;
	mov	ie, #(ieenable + ieserialenable)
					; enable serial interrupt
	mov	sbuf, r6		; write data to be transmitted
	mov	r1, #ffh		; maximum number of attempts
$i0c10:	jnb	ie.4, $i0c30		; break out once interrupt is disabled
	djnz	r1, $i0c10		; repeat until timeout
;
; time out error waiting for serial interrupt
;
	mov	scon, #0		; stop interrupt
	error	E_ser_not_occurred
;
$i0c30: ret				; return to main thread
;
;==================
ser2tx_int_service:
;==================
;
; serial interrupt service routine
;
; indicate that this interrupt has occurred
;
; entry: no conditions
; exit:	 flags, a preserved
;
	push	psw		;save flags manually
	push	a		;save acc
	push	01h		;push register 01
        push    00h		;push register 00
;
; ensure we only let this happen once
;
	mov	ie, #0		; disable interrupts
;
; set the interrupt has occurred flag
;
	mov	r1, #ser_int_flag
	mov	@r1, #true
;
	mov	r0, #int_counter;-priority test
	mov	a, @r0		;-priority test
	inc	@r0		;step flag-priority test
	mov	r0, #tr_int_flag;-priority test
	mov	@r0, a

	pop	00h
	pop	01h
	pop	a
	pop	psw		;restore flags manually
	reti			;return from interrupt
;
	org	0E00h
;==========
initialise:
;==========
;
; initialisation for test routine
;
	clr	a
	mov	reg0,a		;initialise register variables
	mov	reg1f,a
	mov	reg6f,a
acall:	acall	init_r0_r7	;test acall
ajmp:	ajmp	init_done	;test ajmp
	error	E_ajmpfailed

init_done:
	nop
	ret
;
init_r0_r7:	mov	r0,a		;initialise r0 - r7
	mov	r1,a
	mov	r2,a
	mov	r3,a
	mov	r4,a
	mov	r5,a
	mov	r6,a
	mov	r7,a
	ret
;
ljmpret:
	ljmp	ljmpcont
	error	E_ljmp_bwd_failed
;
ret_int:	mov	a,#data55
	reti
;
;================
int0_int_service:
;================
;
; interrupt 0 service routine
; indicate that this interrupt has occurred
;
; entry: no conditions
; exit:	 flags, a preserved
;
	push	psw		;save flags manually
	push	a		;save acc
;
; ensure we only let this happen once
;
	anl	ie, #.not. ieext0enable
				;disable ext0 sources
; set the interrupt has occurred flag
;
	orl	psw, #rbsel0	;alternate register bank
;
	mov	r1, #int_counter
	mov	a, @r1
	inc	@r1		;step flag
	mov	r1, #i0_int_flag
	mov	@r1, a
;
	pop	a
	pop	psw		;restore flags manually
	reti			;return from interrupt
;

;
;==============
t0_int_service:
;==============
;
; timer 0 service routines
;
; entry: no conditions
; exit:	 flags, a preserved
;	 r1 of register bank 1 corrupt
;
	push	psw		;save flags manually
	push	a		;save acc
;
	anl	ie, #.not. iet0enable
				;disable timer 0 int
	anl	tcon, #.not. tct0on
				;stop timer 0
;
; set the interrupt has occurred flag
;
	orl	psw, #rbsel0	;alternate register bank
	mov	r1, #int_counter
	mov	a, @r1
	inc	@r1		;step flag
	mov	r1, #t0_int_flag
	mov	@r1, a
;
	pop	a
	pop	psw		;restore flags manually
	reti			;return from interrupt
;

;
;==============
t1_int_service:
;==============
;
; timer 1 service routine
;
; entry: no conditions
; exit:	 flags, a preserved
;	 r1 of register bank 1 corrupt
;
	push	psw		;save flags manually
	push	a		;save acc
;
	anl	ie, #.not. iet1enable
				;disable timer 1 int
	anl	tcon, #.not. tct1on
				;stop timer 1
;
; set the interrupt has occurred flag
;
	orl	psw, #rbsel0	;alternate register bank
	mov	r1, #int_counter
	mov	a, @r1
	inc	@r1		;step flag
	mov	r1, #t1_int_flag
	mov	@r1, a
;
	pop	a		;save acc
	pop	psw		;restore flags manually
	reti			;return from interrupt
;

;
;================
int1_int_service:
;================
;
; interrupt 1 service routine
;
; entry: no conditions
; exit:	 flags, a preserved
;	 r1 of register bank 1 corrupt
;
	push	psw		;save flags manually
	push	a		;save acc
;
	anl	ie, #.not. ieext1enable
				;disable external 1 int
;
; set the interrupt has occurred flag
;
	orl	psw, #rbsel0	;alternate register bank
	mov	r1, #int_counter
	mov	a, @r1
	inc	@r1		;step flag
	mov	r1, #i1_int_flag
	mov	@r1, a
;
	pop	a		;save acc
	pop	psw		;restore flags manually
	reti			;return from interrupt
;

;
;===============
ser_int_service:
;===============
;
; serial service int routine
;
; entry: no conditions
; exit:	 flags, a preserved
;
	push	psw		;save flags manually
	push	a		;save acc
;
	anl	ie, #.not. ieserialenable
				;disable serial int
;
; set the interrupt has occurred flag
;
	orl	psw, #rbsel0	;alternate register bank
	mov	r1, #int_counter
	mov	a, @r1
	inc	@r1		;step flag
	mov	r1, #tr_int_flag
	mov	@r1, a
;
	pop	a
	pop	psw		;restore flags manually
	reti			;return from interrupt
;
;	==================
	org	orgendtest
;	==================
;
;======
testok:	
;======
;
; reach this point if the tests in this module have run correctly
;
; entry: no conditions
;  exit: never
;
	orl	pcon, #02h	; power down

	end			;of subfile