func1.asm

来自「another 8051 core porocesssor vhdl sourc」· 汇编 代码 · 共 2,206 行 · 第 1/4 页

;	 all other registers corrupt
;
;
	mov	a,#data55		;initialise a to 55h
	cjne	a,#data55,$cjne1	;compare to 55h
	sjmp	$cjne2
$cjne1:	error	E_cjne_a_imm_zero_not_set ;failed. cjne jmp taken wrongly
;
$cjne2:	cjne	a,#data2,$cjne3		;compare to 2
	error	E_cjne_a_imm_zero_not_clear ;failed. cjne jmp not taken
;
$cjne3:	mov	b,#dataaa		;initialise b to aah
	mov	a,#dataaa		;initialise a to aah
	cjne	a,b,$cjne4		;compare a to b
	sjmp	djnztest
$cjne4:	error	E_cjne_ab_zero_not_set 	;failed cjne a,b taken wrongly
;
;================
;BRANCH-djnz test
;================

;========
djnztest:
;========
;
; test decrement and jump instructions
;
; entry: no conditions
;  exit: flags, a corrupt
;	 all other registers corrupt
;
;
	mov	r0,#data2		;initialise r0 to 2
	clr	a			;initialise a to 0
$djnz1:	add	a,#data1		;add 1 to a
	djnz	r0,$djnz1
	cjne	a,#data2,$djnz2		;compare a to 2
	sjmp	retitest
;
$djnz2:	error	E_djnz_reg_failed	;failed to loop on djnz
;
;================
;BRANCH-reti test
;================

;=======
retitest:
;=======
;
; test return from interrupt instructions
;
; entry: no conditions
;  exit: flags, a corrupt
;	 all other registers corrupt
;
;
	mov	a,#data0		;initialise a to 0
	lcall	ret_int
	cjne	a,#data55,$reti1	;compare a to 55h
	sjmp	noptest		
;
$reti1:	error	E_reti_failed		;failed return from int test
;
;
;================
;BRANCH-nop test
;================
;=======
noptest:
;=======
;
; test nop instruction
;
; entry:
;  exit: nothing affected
;
	nop
	
;================
;LOGICAL-anl test
;================
;=======
anltest:
;=======
;
; test anl instructions
;
; entry: no conditions
;  exit: flags, a corrupt
;	 all other registers corrupt
;
;
	mov	a, #33h			; initialise accumulator to 33h
	mov	r6, #0Fh		; initialise r6 to 0fh
	anl	a, r6			; AND accumulator with r6
	dec	a			; acc starts at 03h
	dec	a
	dec	a
	jz	$ant1			; test for the correct result
	error	E_anl_a_direct 		; failed to set zero flag on anl

; ensure we can AND carry bit with all bits in B register
 
$ant1:	mov	b,#dataff		; initialise b to ff
	mov	a,#dataff		; initialise acc to ffh
	add	a,#data1		; add 1 to a to get carry
	anl	c,b.0			; AND carry flag with b.0
	anl	c,b.1			; AND carry flag with b.1
	anl	c,b.2			; AND carry flag with b.2
	anl	c,b.3			; AND carry flag with b.3
	anl	c,b.4			; AND carry flag with b.4
	anl	c,b.5			; AND carry flag with b.5
	anl	c,b.6			; AND carry flag with b.6
	anl	c,b.7			; AND carry flag with b.7
	mov	a,#data0		; clear accumulator
	addc	a,#data0		; add carry to accumulator
	cjne	a,#data1,$ant14
	sjmp	$ant15			; logical or test
$ant14:	error	E_anl_c_breg		; failed carry and b reg test
;
$ant15:	mov	b,#data2		; initialise b to 2
	mov	a,#dataff		; initialise acc to ffh
	add	a,#data1		; add 1 to acc to get carry
	anl	c,b.1			; AND carry flag with b.1
	mov	a,#data0		; clear accumulator
	addc	a,#data0		; add carry to accumulator
	cjne	a,#data1,$ant16
	sjmp	orltest			

$ant16:	error	E_anl_carry_breg	; failed to and carry with b reg
;
;================
;LOGICAL-orl test
;================
;=======
orltest:
;=======
;
; test logical OR instructions
;
	mov	r0, #47h		; initialise pointer register
	mov	47h, #ABh		; initialise memory location 47h
	mov	48h, #58h		; initialise memory location 48h
	mov	49h, #0			; initialise memory location 49h

	mov	a, #11h			; initialise acc to 11h
	mov	r7, #12h		; initialise r7 to 12h
	orl	a, r7			; OR contents of acc with r7
	cjne	a, #13h, $orl1		; test for correct result in acc
	sjmp	$orl2
$orl1:	error	E_orl_a_direct		; failed a orl register test

$orl2:	clr	a
	orl	a, #01h			; ORL acc with immmediate byte
	jz	$orl1
	orl	a, 48h			; ORL acc with address 48h
	orl	a, @r0			; ORL acc with address 47h
	cjne	a, #FBh, $orl1		; test for correct acc result
	orl	49h, a			; ORL address 49h with acc
	clr	a			; clear accumulator
	xch	a, 49h			; exchange acc with address 49h
	cjne	a, #FBh, $orl1		; test for correct result

$orl3:	mov	a, #data1
	cpl	a
	mov	b, a			; copy value FEh to B register
	clr	c			; clear carry flag
	orl	c, /b.0			; OR carry flag with comp of b.0
	jnc	orl4
	orl	c, /b.1			; OR carry flag with comp of b.1
	orl	c, /b.2			; OR carry flag with comp of b.2
	orl	c, /b.3			; OR carry flag with comp of b.3
	orl	c, /b.4			; OR carry flag with comp of b.4
	orl	c, /b.5			; OR carry flag with comp of b.5
	orl	c, /b.6			; OR carry flag with comp of b.6
	jnc	orl4
	orl	c, b.7			; OR carry flag with b.7
	jc	xrltest			; pass on to the next test
orl4:	error	E_orl_c_breg		; failed to or carry with b reg

;================
;LOGICAL-xrl test
;================
;=======
xrltest:
;=======
;
; test exclusive or instructions
;
; entry: no conditions
;  exit: flags a corrupt
;	 all other register corrupt
;
	mov	a, #0fh			; initialise acc to ffh
	mov	r4, #data55		; initialise r4 to 55h
	xrl	a, r4			; XOR
	cjne	a, #5ah, $xrl1		; acc should equal 5ah
	sjmp	$xrl2
$xrl1:	error	E_xrl_a_direct		; failed to XOR acc and register
;
$xrl2:	mov	a, #data7f		; initialise acc to 7fh
	mov	b, #data80		; initialise b to 80h
	xrl	a, b			; XOR
	cjne	a, #dataff, $xrl3
	sjmp	clrtest

$xrl3:	error	E_xrl_a_breg		; failed to xor a and b register

;================
;LOGICAL-clr test
;================
;=======
clrtest:
;=======
;
; test clear a instruction
;
; entry: no conditions
;  exit: flags a corrupt
;	 all other registers corrupt
;
;
	clr	a			;clear a
	cjne	a,#data0,$clr1		;compare to zero
	sjmp	$clr2			;go for next test
$clr1:	error	E_clr_a			;failed to clear acc
;
$clr2:	mov	a,#dataff		;initialise a to ffh
	add	a,#data1		;create a carry
	clr	a			;now clear a
	clr	c
	addc	a,#data0		;add carry and 0 to a
	cjne	a,#data1,$clr3		;compare to 1
	error	E_clr_carry		;failed to clear carry
;
$clr3:	mov	b,#dataff		;initialise b to ffh
	mov	a,#data7f		;initialise a to 7fh
	clr	b.7			;clear bit 7
	cjne	a,b,$clr4		;compare a to b
	sjmp	$clr5
$clr4:	error	E_clr_bit		;failed to clear directly addressable bit
;
$clr5:	mov	reg20,#data80		;initialise value at 20h to 80h
	clr	addrbit7			;clear user bit 7
	mov	a,#data0		;initialise a to 0
	cjne	a,reg20,$clr6
	sjmp	cpltest
$clr6:	error	E_clr_bit		;failed to clear bit;
;
;================
;LOGICAL-cpl test
;================
;=======
cpltest:
;=======
;
; test complement a instructions
;
; entry: no conditions
;  exit: flags a corrupt
;	 all other registers corrupt
;
;
	mov	a,#data55		;initialise a to 55h
	cpl	a			;complement a
	cjne	a,#dataaa,$cpl1		;compare to aah
	sjmp	$cpl2			;rotate left test next
$cpl1:	error	E_cpl_a			;failed to complement accumulator
;

;
$cpl2:	clr	c			;clear the carry bit
	mov	a,#data0		;initialise a to 0
	cpl	c			;complement the carry bit
	addc	a,#data0		;add carry and 0 to a
	cjne	a,#data1,$cpl5		;compare to 1
	sjmp	setbtest
$cpl5:	error	E_cpl_carryset		;failed to complement (i.e. set) carry
;

;================
;LOGICAL-setb test
;================
;========
setbtest:
;========
;
; test boolean variable setb and carry instructions
;
; entry: no conditions
;  exit: flags, a corrupt
;	 all other registers corrupt
;
;
	clr	c			;clear carry
	setb	c			;set carry
	jc	$sbt1
	error	E_setb_carrynotset	;carry not set after setb c
;
$sbt1:	mov	reg20,#data0		;clear value at 20h
	setb	addrbit7     		;set bit 7 at 20h
	mov	a,reg20			;get value at 20h
	cjne	a,#data80,$sbt2
	sjmp	rltest
$sbt2:	error	E_setb_bit_direct	;direct bit not set

	clr	a			; clear accumulator
	setb	c			; set carry flag
	mov	E7h, c			; set acc.7 using carry flag
	mov	c, E0h			; clear carry flag using acc.0
	jc	$sbt2			; test for a clear carry flag
	cjne	a, #80h, $sbt2		; test that acc.7 is set

	setb	c			; set carry flag
	anl	c, /E3h			; AND carry flag with NOT acc.3
	jnc	$sbt2			; check that carry remains set
;
;
;================
;LOGICAL-rotate left test without carry
;================
;======
rltest:
;======
;
; test rotate left instructions
;
; entry: no conditions
;  exit: flags a corrupt
;	 all other registers corrupt
;
;
	mov	a,#data80		;initialise a to 80h
	rl	a			;rotate left
	cjne	a,#data1,$rl1
	sjmp	rlctest
$rl1:	error	E_rl_a_b0clear		;failed to rotate a left one bit
;
;================
;LOGICAL-rotate left test with carry
;================
;======
rlctest:
;======
;
; test rotate left carry instructions
;
; entry: no conditions
;  exit: flags a corrupt
;	 all other registers corrupt
;
;
	mov	a,#data80		;initialise a to 80h
	clr	c			;clear carry
	cpl	c			;set carry
	rlc	a			;rotate left
	jc	$rlc1			;carry should be set
	error	E_rlc_carryclear	;failed to set carry when rotate left
;
$rlc1:	cjne	a,#data1,$rlc2		;a should equal 1
	sjmp	rrtest
$rlc2:	error	E_rlc_a_b0clear		;failed rlc test
;
;================
;LOGICAL-rotate right test without carry
;================
;======
rrtest:
;======
;
; test rotate right instructions
;
; entry: no conditions
;  exit: flags a corrupt
;	 all other registers corrupt
;
;
	mov	a,#data1		;initialise a to 1
	rr	a			;rotate right
	cjne	a,#data80,$rr1
	sjmp	rrctest
$rr1:	error	E_rr_a_b7clear			;failed to rotate a right
;
;================
;LOGICAL-rotate right test with carry
;================
;=======
rrctest:
;=======
;
; test rotate right carry instructions
;
; entry: no conditions
;  exit: flags a corrupt
;	 all other registers corrupt
;
;
	clr	c			;clear carry
	cpl	c			;set carry
	mov	a,#data1		;initialise a to 1
	rrc	a			;rotate right
	jc	$rrc1			;carry should be set
	error	E_rrc_carryclear	;failed to set carry with rotate right
;
$rrc1:	cjne	a,#data80,$rrc2		;a should equal 80h
	sjmp	swaptest		;swap nibbles in a
;
$rrc2:	error	E_rrc_a_b7clear		;failed to set bit 7
;
;================
;LOGICAL-swap test 
;================
;=======
swaptest:
;=======
;
; test swap nibbles in instructions
;
; entry: no conditions
;  exit: flags a corrupt
;	 all other registers corrupt
;
;
	mov	a,#data30		;initialise a to 30h
	swap	a			;swap digits
	cjne	a,#data2+data1,swap_1
        mov     psw, #18h		; select register bank 3
        mov     1Ah, #ABh		; load R2 directly
	mov	18h, #7Fh		; load R0 with indirect address
	mov	a, #CDh
	mov	@r0, a
	mov	a, #34h
	xch	a, r2
	xch	a, @r0
	cjne	r2, #34h, swap_2	; check without changing r2
        cjne	a, #CDh, swap_2 	; check without changing acc
        cjne	@r0, #ABh, swap_2	; check without changing @r0
	xchd	a, @r0			; test digit exchange
	xrl	a, #CBh			; only lower nibbles are changed
	jnz	swap_3			; check accumulator result
	cjne	@r0, #ADh, swap_3	; check register result
	anl	psw, #0			; restore register bank number
	sjmp	flagtest
	
;
swap_1:	error	E_swap_a		; failed to swap nibbles
swap_2:	error	E_xch_a			; failed to exchange bytes
swap_3:	error	E_xchd_a		; failed to exchange digits


;============
flagtest:
;============
;
; test 8051 flags
;
; entry: no conditions
;  exit: flags other registers corrupt
;
;
;
	lcall	initialise
;
	clr	c			:clear carry
	mov	a,#dataff		;initialise a to ffh
	add	a,#data1		;add 1 to a
	jc	$ft01			;carry should be set
	error	E_carry_not_set		;failed to set carry

$ft01:	mov	a,#dataf		;initialise a to 0fh
	add	a,#data1		;add 1 to a
	jb	ac,$ft02		;auxilliary carry should be set

	error	E_auxcarry_not_set		;failed to set auxiliary carry
;
$ft02:	mov	a,#data80		;initialise a to 80h
	add	a,#dataff		;add ffh to a
	jb	ov,$ft03		;overflow should be set
	error	E_ovflow_not_set		;failed to set overflow

$ft03:	mov	a,#data7f		;initialise a to 7fh
	add	a,#data1		;add 1 to a
	jb	ov,$ft04		;overflow should be set
	error	E_ovflow_not_set		;failed to set overflow
;
$ft04:	clr	c			;clear carry
	mov	a,#dataff		;initialise a to ffh
	addc	a,#data1		;add 1 to a
	jc	$ft05			;carry should be set
	error	E_carry_not_set		;failed to set carry

$ft05:	jb	ac,$ft06		;auxilliary carry also set
	error	E_auxcarry_not_set	;failed aux carry not set

$ft06:	mov	a,#dataff		;initialise a to ffh again
	addc	a,#data0		;add 0 and carry to a
	jc	$ft07			;carry should be set 
	error	E_carry_not_set		;failed carry not set

$ft07:	jb	ac,$ft08		;auxilliary carry also set
	error	E_auxcarry_not_set	;auxiliary carry not set
;
$ft08:	clr	c			;clear carry
	mov	a,#data7f		;initialise a to 7fh
	addc	a,#data1		;add 1 to a
	jb	ov,$ft09		;overflow should be set
	error	E_ovflow_not_set		;failed to set overflow

$ft09:	clr	ov			;clear overflow
	setb	c			;set carry
	mov	a,#data7f		;initialise a to 7fh
	addc	a,#data0		;add 0 and carry to a
	jb	ov,$ft010		;overflow should be set
	error	E_ovflow_not_set		;failed to set overflow
;
$ft010:	clr	ov			;clear overflow
	clr	c			;clear carry
	mov	a,#dataff		;initialise a to ffh
	addc	a,#data80		;add 80h to a
	jb	ov,$ft011		;overflow should be set
	error	E_ovflow_not_set		;failed to set overflow

$ft011:	clr	ov			;clear overflow
	setb	c			;set carry
	mov	a,#data80		;initialise a to 80h
	addc	a,#data80		;add 80h and carry to a
	jb	ov,$ft012		;overflow should be set
	error	E_ovflow_not_set		;failed to set overflow
;
$ft012:	clr	ov			;clear overflow
	clr	c			;clear carry
	clr	ac			;clear auxilliary carry
	mov	a,#data0		;initialise a to 0
	subb	a,#data1		;subtract 1
	jc	$ft013			;carry should be set
	error	E_carry_not_set		;carry flag not set

$ft013:	jb	ac,$ft014		;auxilliary carry should be set
	error	E_auxcarry_not_set	;failed to set aux carry

$ft014:	clr	ac			;clear auxilliary carry
	setb	c			;set carry
	mov	a,#data0		;initialise a to 0
	subb	a,#data0		;subtract 0 and carry
	jc	$ft015			;carry should be set
	error	E_carry_not_set		;failed to set carry

$ft015:	jb	ac,$ft016		;auxilliary should be set
	error	E_auxcarry_not_set	;failed to set aux carry

$ft016:	clr	ac			;clear auxilliary carry
	clr	c			;clear carry