func1.asm

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ASM
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	list on	symbols;	*******************************************************;							;		  8051 FUNC1;							;	*******************************************************;	title func1.asm: 1 April 1997 - general instruction test module;	(c) Copyright Mentor Graphics Corporation 1997.;	All Rights Reserved.;       Version 2.00 - 21.iv.97: Instruction set coverage improved;                                sufficiently to give complete coverage ;                                of MegaMacro VHDL source at statement;                                and branch levels.;;	NOTE WELL:;;	This assembler does NOT compile cleanly.  Most compilers will;	warn that references to 3Soft specific SFRs (e.g. MSIZ and the;	example ESFR at E8h) are references to non-existant RAM;	addresses.  This does not affect compilation with the AD2500;	software.;;	MODULE FUNCTION;	---------------;;	This module executes a simple test of the instruction;       set and peripheral functions of the M8051 MegaMacro.;;	INCLUDE FILES;	-------------;	list	off	include ..\openloop\inc\defines.inc	include ..\openloop\inc\ramdata.inc	include	..\openloop\inc\romdata.inc	include ..\openloop\inc\macro.inc	include ..\openloop\inc\testdata.inc	include ..\openloop\inc\register.inc	list	on	include ..\openloop\inc\func1.inc;;	PUBLIC DECLARATIONS;	-------------------;;	Program:;;	Data:;;	Absolute:;;	None;;	EXTERNAL REFERENCES;	-------------------;;	Program:;;	Data:;;	Absolute:;;	None;; LOCAL DEFINITIONS; -----------------;tick		equ	252	;4 ticks only;; interrupt flags - int has occurred;int_counter		equ	3fhi0_int_flag		equ	40h	t0_int_flag		equ	41hi1_int_flag		equ	42ht1_int_flag		equ	43htr_int_flag		equ	44h;i0_priority		equ	1	t0_priority		equ	2i1_priority		equ	3t1_priority		equ	4tr_priority		equ	5ser_int_flag	equ	3eh	;address of serial int flagcheck_i1_unexpected		equ	falsecheck_t0_unexpected		equ	falsecheck_t1_unexpected		equ	falsecheck_ser_tx_unexpected		equ	falsecheck_ser_rx_unexpected		equ	false;E_priority		equ	9;	Assembler directive for standard part memory model	CHIP	8051;; ===========; ENTRY POINT; ===========;	org	orgems	ajmp	inittest	;go! go! go! ;; checksum; --------;	org	orgcscsbyte	db	0		;reserved for checksum byte;; external interrupt 0; --------------------;	org	orgx0int	ljmp	int0_int_service	;used in priority test only;; timer 0 interrupt; -----------------;	org	orgt0int	ljmp	t0_int_service	; used in priority and idle mode tests;; external interrupt 1; --------------------;	org	orgx1int	ljmp	int1_int_service ;used in priority test only;; timer 1 interrupt; -----------------;	org	orgt1int	ljmp	t1_int_service;	used in priority test only	;; serial port interrupt; ---------------------;	org	orgserint	ljmp	ser2tx_int_service	;serial port transmit interrupt;;	org	30h;========inittest:;========;; start routine;; entry: no conditions;  exit: all registers and flags corrupt;;=========resettest:;=========;; test that register are as they should be;; entry: no conditions;  exit: flags other registers corrupt;;; check that accumulator is 0;	jz	$rst1		;j if acc equal to zero	error	E_rst_accnotzero	;failed if acc not zero;; check that b register is 0;$rst1:	mov	a, b		;fetch contents of b	jz	$rst2		;j if b reg equal to zero	error	E_rst_bregnotzero	;failed if acc not zero;; check that flags are 0;$rst2:	mov	a, psw		;get flags	jz	$rst3		;j if flags equal to zero	error	E_rst_pswnotzero	;failed if acc not zero;; check that the stack pointer is 7;$rst3:	mov	a, sp		;fetch stack pointer	cjne	a, #07, $rst4	;failed if not = 7	sjmp	$rst5		;j if ok;$rst4:	error	E_rst_spnoteq7;; check that high and low bytes of data ptr are 0;$rst5:	mov	a, dpl		;fetch low data ptr byte	jz	$rst6		;j if dataptr = 0	error	E_rst_dptr_low	;failed if data ptr low not equal 0;$rst6:	mov	a, dph		;fetch high data ptr byte	jz	$rst11		;j if data ptr high = 0	error	E_rst_dptr_high	;failed if data ptr high not equal 0;; check that there is ff on all ports;;; check interrupt priority is 0;$rst11:	mov	a, ip		;fetch ip flag	anl	a, #(bit4 + bit3 + bit2 + bit1 + bit0)	jz	$rst12		;j if zero	error	E_rst_ipnotzero	;failed if ip not equal to 0;; check interrupt enable is 0;$rst12	mov	a, ie		;fetch interrupt enable flag	anl	a, #(bit7 + bit4 + bit3 + bit2 + bit1 + bit0)	jz	$rst13		;j if zero	error	E_rst_ienotzero	;failed if ie not equal to 0;; check timer mode register is 0;$rst13	mov	a, tmod		;fetch timer mode contents	jz	$rst14		;j if zero	error	E_rst_tmodnotzero	;failed if tmod not equal to 0;; check timer control register is 0;$rst14	mov	a, tcon		;fetch timer control contents	jz	$rst15		;j if zero	error	E_rst_tconnotzero	;failed if tcon not equal to 0;; check timer / counter 0 high and low bytes equal 0;$rst15:	mov	a, tl0	jz	$rst16		;j if ok	error	E_rst_tl0_notzero	;failed if timer counter 1 low <> 0;$rst16	mov	a, th0	jz	$rst17		;j if ok	error	E_rst_th0_notzero	;failed if timer counter 0 high <> 0;; check timer / counter 1 high and low bytes equal 0;$rst17:	mov	a, tl1	jz	$rst18		;j if ok	error	E_rst_tl1_notzero	;failed if timer counter 1 low <> 0;$rst18	mov	a, th1	jz	$rst19		;j if ok	error	E_rst_th1_notzero	;failed if timer counter 1 high <> 0;; check serial control register is 0;$rst19:	mov	a, scon	jz	$rst20		;ok	error	E_rst_scon_notzero	;failed if scon not equal 0;; check power control register;$rst20:	mov	a, pcon	anl	a, #(bit7)	jz	$rst21		;ok	error	E_rst_pcon_notzero	;failed if pcon not equal 0;; check memory size register;$rst21:	mov	a, ffh			; address of MSIZ register	xrl	a, #0Fh			; power up value	jz	$rst22			; ok	error	E_rst_msiz_not4k	; failed if MSIZ is not 0Fh;; exercise the port SFRs using a RMW instruction and read port pins;$rst22:	inc	p0			; force a register read	cjne	a, p0, $rst23		; check pins for zero	inc	p1	dec	p0			; restore inactive levels	cjne	a, p1, $rst23		; check pins for zero	inc	p2	dec	p1			; restore inactive levels	cjne	a, p2, $rst23		; check pins for zero	inc	p3	dec	p2			; restore inactive levels	cjne	a, p3, $rst23		; check pins for zero	dec	p3			; restore inactive levels	sjmp	$rst24			; pass on to the next test$rst23:	error	E_port_walk_lame	; port error trap;; Verify that the memory size register may be modified;$rst24: mov	a, #ffh			; load acc with XOR mask	xrl	ffh, a			; complement MSIZ register	mov	a, #f0h			; expected result in MSIZ	cjne	a, ffh, $rst25		; trap a failure	mov	ffh, #0fh		; restore MSIZ to original value	sjmp	lcalltest		; pass on to the next test$rst25	error	E_msiz_complement	; MSIZ SFR trap;=========lcalltest:;=========;; test lcall instructions;; entry: no conditions;  exit: flags, a corrupt;	 all other registers corrupt;;	lcall	initialise	;initialise for test;;================;BRANCH-ljmp test;================;;========ljmptest:;========;; test ljmp instructions;; entry: no conditions;  exit: flags, a corrupt;	 all other registers corrupt;;	ljmp	ljmpret			;try to long jmp	error	E_ljmp_fwd_failed	;failed to take long jump;ljmpcont:	nop;;================;BRANCH-sjmp test;================;;========sjmptest:;========;; test short jmp instructions;; entry: no conditions;  exit: flags, a corrupt;	 all other registers corrupt;;	sjmp	$sjmp2	error	E_sjmp_forward		;failed to take short jump (forward);$sjmp1:	sjmp	jmptest		error	E_sjmp_forward		;failed to take short jump (forward);$sjmp2:	sjmp	$sjmp1	error	E_sjmp_backward		;failed to take short jump (backward);;================;BRANCH-jmp test;================;;=======jmptest:;=======;; test jmp instructions;; entry: no conditions;  exit: flags, a corrupt;	 all other registers corrupt;;	mov	a,#data2+data2		;initialise a to 4	mov	dptr,#j_tbl		;initialise dptr	jmp	@a+dptr			;jump trough table;j_tbl:	ajmp	inc_error		;error	ajmp	inc_error	ajmp	set_acc			;proper entry	ajmp	inc_error;; --------------; table routines; --------------;inc_error:	error	E_jmp_indirect	;failed to jump via jump table;set_acc:	mov	a,#dataff		;set a to ffh	cjne	a,#dataff,$jmp1	sjmp	jnztest;$jmp1:	error	E_jmp_indirect	;failed to set acc after jmp;================;BRANCH-jnz test;================;;=======jnztest:;=======;; test jump on acc not zero instructions;; entry: no conditions;  exit: flags, a corrupt;	 all other registers corrupt;;	mov	a,#data1		;initialise a to 1	jnz	$jnz1	error	E_jnz_zero_not_set	;failed jnz : zero not set;$jnz1:	dec	a			;decrement a	jnz	$jnz2			;j if not zero	sjmp	jztest;$jnz2:	error	E_jnz_zero_not_clear	;failed jnz : zero not clear;;================;BRANCH-jz test;================;;======jztest:;======;;; entry: no conditions;  exit: flags, a corrupt;	 all other registers corrupt;;	clr	a			;initialise a to 0	jz	$jz1	error	E_jz_zero_not_set	;failed jz : zero not set;$jz1:	inc	a			;increment a	jz	$jz2	sjmp	jbtest;$jz2:	error	E_jz_zero_not_clear	;failed jz : zero not cleared;;================;BRANCH-jb test;================;======jbtest:;======;; test boolean variable jump on bit set instructions;; entry: no conditions;  exit: flags, a corrupt;	 all other registers corrupt;; note some jmp instructions already tested in branch.asm;;	mov	reg20,#data80		;initialise value at 20h to 80h	jb	addrbit7, $jb1		; test MSB of data register 20h	error	E_jb_direct		;failed to branch on bit set;$jb1:	clr	addrbit7			;clear value at 20h	jb	addrbit7,$jb2	sjmp	$jbc$jb2:	error	E_jb_direct		;failed to branch on direct bit set;$jbc:	mov	b,#data80		;initialise b to 80h	jbc	b.7,$jbc1		;jump bit 7 set and clear bit 7	error	E_jbc_direct		;failed to branch on bit set;$jbc1:	jbc	b.7,$jbc2		;see if still set	sjmp	jctest;$jbc2:	error	E_jbc_direct		;failed to set bit;;======jctest:;======;; test boolean variable jump on carry set instructions;; entry: no conditions;  exit: flags, a corrupt;	 all other registers corrupt;; note some jmp instructions already tested in branch.asm;;	clr	c			;clear carry	cpl	c			;complement carry	jc	$jc1	error	E_jc_carrynotset	;failed to jump on carry;$jc1:	clr	c			;clear carry	jc	$jc2	sjmp	jnbtest$jc2:	error	E_jc_carryset		;failed to jump on carry clear;;=======jnbtest:;=======;; test boolean variable jnb set instructions;; entry: no conditions;  exit: flags, a corrupt;	 all other registers corrupt;; note some jmp instructions already tested in branch.asm;;	mov	reg20,#data7f		;initialise value at 20h to 7fh	jnb	addrbit7,$jnb1	error	E_jnb_bitset		;bit is set incorrectly;$jnb1:	mov	reg20,#data80		;set bit7 to 1	jnb	addrbit7,$jnb2	sjmp	jnctest$jnb2:	error	E_jnb_bitnotset		;failed if bit not set;;=======jnctest:;=======;; test boolean variable jnc set instructions;; entry: no conditions;  exit: flags, a corrupt;	 all other registers corrupt;; note some jmp instructions already tested in branch.asm;	clr	c			;clear carry	jnc	$jnc1	error	E_jnc_carryset		;carry set when it should not have been;$jnc1:	cpl	c			;set carry	jnc	$jnc2	sjmp	cjnetest$jnc2:	error	E_jnc_carrynotset	;carry not set whne it should have been;;================;BRANCH-cjne test;================;;========cjnetest:;========;;; entry: no conditions;  exit: flags, a corrupt

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