func1.lst

来自「another 8051 core porocesssor vhdl sourc」· LST 代码 · 共 1,209 行 · 第 1/5 页

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  213                          	;
  214          0080            	pwrsmod	equ	bit7	;double baud bit rate
  215                          	; reserved
  216                          	; reserved
  217                          	; reserved
  218          0008            	pwrgflag1	equ	bit3	;general purpose flag bit
  Tue Oct 19 1999 11:33                                                                                                  Page    5

        func1.asm: 1 April 1997 - general instruction test module


  219          0004            	pwrgflag0	equ	bit2	;general purpose flag bit
  220          0002            	pwrdown	equ	bit1	;power down 
  221          0001            	pwridle	equ	bit0	;Idle mode setting
  222                          	;
  223                          	; INTENABLE - interrrupt enable register. bit addressable
  224                          	;
  225          0080            	ieenable	equ	bit7	;enables ints if bit set
  226                          	; reserved
  227          0020            	iet2enable	equ	bit5	;enables timer 2 overflow interrupt (8052 only)
  228          0010            	ieserialenable	equ	bit4	;enables serial port interrupt
  229          0008            	iet1enable	equ	bit3	;enables timer 1 overflow interrupt
  230          0004            	ieext1enable	equ	bit2	;enable external interrrupt 1
  231          0002            	iet0enable	equ	bit1	;enable timer 0 overflow interrupt 0
  232          0001            	ieext0enable	equ	bit0	;enable external interrrupt 0
  233                          	;
  234                          	; INTPRIORITY - interrupt priority register. bit addressable
  235                          	;
  236                          	;reserved
  237                          	;reserved
  238          0020            	ipt2priority	equ	bit5	;defines timer 2 priority level
  239          0010            	ipserial	equ	bit4	;defines serial priority level
  240          0008            	ipt1priority	equ	bit3	;defines timer 1 overflow interrupt
  241          0004            	ipext1priority	equ	bit2	;defines external interrrupt 1
  242          0002            	ipt0priority	equ	bit1	;defines timer 0 overflow interrupt 1
  243          0001            	ipext0priority	equ	bit0	;defines external interrrupt 1
  244                          	;
  245                          	; TIMERCONTROL - timer/counter control register. bit addressable
  246                          	;
  247          0080            	tct1overflow	equ	bit7	;timer 1 overflow flag
  248          0040            	tct1on		equ	bit6	;timer 1 run control bit
  249          0020            	tct0overflow	equ	bit5	;timer 0 overflow flag
  250          0010            	tct0on		equ	bit4	;timer 0 run control bit
  251          0008            	tcext1edge	equ	bit3	;external int 1 edge flag
  252          0004            	tcext1control	equ	bit2	;external int 1 control flag
  253          0002            	tcext0edge	equ	bit1	;external int 0 edge flag
  254          0001            	tcext0control	equ	bit0	;external int 0 control flag
  255                          	;
  256                          	; TIMER2CONTROL - timer 2/counter control register. bit addressable
  257                          	;
  258          0080            	tct2overflow	equ	bit7	;timer 2 overflow flag
  259          0040            	tct2extflag	equ	bit6	;timer 2 external flag
  260          0020            	tct2rclk	equ	bit5	;timer 2 receive clock flag
  261          0010            	tct2tclk	equ	bit4	;timer 2 transmit clock flag
  262          0008            	tct2extenab	equ	bit3	;timer 2 external enable flag
  263          0004            	tct2on		equ	bit2	;timer 2 start bit
  264          0002            	tct2selcntr	equ	bit1	;timer 2 select counter bit
  265          0001            	tct2capture	equ	bit0	;timer 2 capture bit.
  266                          	;
  267          0014            	tct2mdbrg1	equ	tct2on + tct2tclk
  268                          					;baud rate generator with tclk set
  269          0024            	tct2mdbrg2	equ	tct2on + tct2rclk
  270                          					;baud rate generator with tclk set
  271          0034            	tct2mdbrg3	equ	tct2on + tct2tclk + tct2rclk
  272                          					;baud rate generator with tclk and rclk set
  273                          	;
  274                          	; TIMERMODE - timer/counter mode control register. not bit addressable
  275                          	;
  Tue Oct 19 1999 11:33                                                                                                  Page    6

        func1.asm: 1 April 1997 - general instruction test module


  276          0080            	tmt1gate	equ	bit7	;timer 1 external control 
  277                          					;if set timer enabled only when intx and trx on set
  278          0040            	tmt1selcntr	equ	bit6	;timer 1 select counter bit
  279          0030            	tmt1selmode	equ	bit5 + bit4
  280          0000            	tmt1mode0	equ	0
  281          0010            	tmt1mode1	equ	bit4
  282          0020            	tmt1mode2	equ	bit5 
  283          0030            	tmt1mode3	equ	bit5 + bit4
  284                          	
  285          0008            	tmt0gate	equ	bit3	;timer 0 external control bit
  286                          					;when clear timer 0 enabled when tct0on set
  287          0004            	tmt0selcntr	equ	bit2	;timer 0 select counter bit
  288          0003            	tmt0selmode	equ	bit1 + bit0
  289          0000            	tmt0mode0	equ	0
  290          0001            	tmt0mode1	equ	bit0
  291          0002            	tmt0mode2	equ	bit1 
  292          0003            	tmt0mode3	equ	bit1 + bit0
  293                          	;
  294                          	; SERIALCONTROL - Serial port control. bit addressable
  295                          	;
  296          0080            	scsm0		equ	bit7	;sm0
  297          0040            	scsm1		equ	bit6	;sm1
  298          0020            	scsm2		equ	bit5	;sm2
  299                          	
  300          00E0            	scmode		equ	scsm0 + scsm1 + scsm2
  301          0000            	scmode0	equ	0
  302          0040            	scmode1	equ	       scsm1
  303          0080            	scmode2	equ	scsm0
  304          00C0            	scmode3	equ	scsm0 + scsm1
  305                          	
  306          0010            	scrxenable	equ	bit4
  307          0008            	sctx8bit	equ	bit3	;9th bit to transmit in modes 2 and 3
  308          0004            	scrx8bit	equ	bit2	;9th bit to receive in mode 2 and 3
  309          0002            	sctxintflag	equ	bit1	;transmit interrupt flag.
  310          0001            	scrxintflag	equ	bit0	;receive interrupt flag
  311                          	
  312                          	
  313                          	
  314                          	
  315                          	
  316                          	
  317   0000                   		include	..\openloop\inc\romdata.inc
  318                          	;**********************************************************************
  319                          	;
  320                          	;       Module:         romdata.inc
  321                          	;
  322                          	;       Comments:       rom data definitions
  323                          	;
  324                          	;       Date:           28th November 1996
  325                          	;
  326                          	;       Version:        V2.1 revised absolute orgs for longer tests
  327                          	;			     dptr jump is now out of page
  328                          	;
  329                          	;**********************************************************************
  330                          	; (C) Mentor Graphics (UK) Limited 1996
  331                          	; All rights reserved 
  332                          	
  Tue Oct 19 1999 11:33                                                                                                  Page    7

        func1.asm: 1 April 1997 - general instruction test module


  333                          	
  334                          	;**************************
  335                          	;** SYSTEM INCLUDE FILES **
  336                          	;**************************
  337                          	
  338                          	;***************************
  339                          	;** PROGRAM INCLUDE FILES **
  340                          	;***************************
  341                          	
  342                          	;************************
  343                          	;** EXTERNAL FUNCTIONS **
  344                          	;************************
  345                          	
  346                          	;************************
  347                          	;** EXTERNAL VARIABLES **
  348                          	;************************
  349                          	
  350                          	;*********************
  351                          	;** LOCAL FUNCTIONS **
  352                          	;*********************
  353                          	
  354                          	;*********************
  355                          	;** LOCAL VARIABLES **
  356                          	;*********************
  357                          	
  358                          	;
  359          0000            	orgems          equ     0       ; entry point
  360          0002            	orgcs           equ     002h    ; checksum byte lives here
  361          0003            	orgx0int        equ     003h    ; external interrupts routine 0
  362          000B            	orgt0int        equ     00bh    ; timer 0 interrupt
  363          0013            	orgx1int        equ     013h    ; external interrupt routine 1
  364          001B            	orgt1int        equ     01bh    ; timer 1 interrupt
  365          0023            	orgserint       equ     023h    ; rx and tx interrupt
  366          002B            	orgt2int        equ     02bh    ; timer 2 interrupt
  367                          	;
  368          05FE            	orgdptrtable	equ	05FEh	; position for jmp @a+dptr table
  369          0700            	orginitial	equ	0700h	; register initialisation subroutine
  370          0800            	orgextdata      equ     0800h   ; place for program memory test data
  371          0FFD            	orgendtest      equ     0ffdh   ; last place in 4k rom for jump
  372                          	
  373                          	
  374   0000                   		include ..\openloop\inc\macro.inc
  375                          	;**********************************************************************
  376                          	;
  377                          	;	Module:		macro.inc
  378                          	;
  379                          	;	Comments:	macro definitions
  380                          	;
  381                          	;	Date:		26th Jun 1992
  382                          	;
  383                          	;	Version: 	V1.00
  384                          	;
  385                          	;**********************************************************************
  386                          	; (C) 3Soft Limited 1994
  387                          	; All rights reserved 
  388                          	
  389                          	
  Tue Oct 19 1999 11:33                                                                                                  Page    8

        func1.asm: 1 April 1997 - general instruction test module


  390                          	;**************************
  391                          	;** SYSTEM INCLUDE FILES **
  392                          	;**************************
  393                          	
  394                          	;***************************
  395                          	;** PROGRAM INCLUDE FILES **
  396                          	;***************************
  397                          	
  398                          	;************************
  399                          	;** EXTERNAL FUNCTIONS **
  400                          	;************************
  401                          	
  402                          	;************************
  403                          	;** EXTERNAL VARIABLES **
  404                          	;************************
  405                          	
  406                          	;*********************
  407                          	;** LOCAL FUNCTIONS **
  408                          	;*********************
  409                          	
  410                          	;*********************
  411                          	;** LOCAL VARIABLES **
  412                          	;*********************
  413                          	
  414                          	;
  415                          	error	macro	value
  416                          	;
  417                          	$err#:	mov	a, #value
  418                          		jmp	$err#
  419                          	;
  420                          		endm
  421                          	
  422                          	loadsfr	macro	addrsfr,valuesfr
  423                          		mov	addrsfr, #valuesfr
  424                          		endm
  425                          	
  426                          	testsfr	macro	addrsfr,valuesfr
  427                          		clr	a
  428                          		mov	a, addrsfr
  429                          		cjne	a, #valuesfr, $ts1# 
  430                          		sjmp	$ts2#
  431                          	;
  432                          	$ts1#:	ajmp	$ts1#
  433                          	;
  434                          	$ts2#:

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