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📄 speed.v

📁 another 8051 core porocesssor vhdl source code
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//*******************************************************************       ////IMPORTANT NOTICE                                                          ////================                                                          ////Copyright Mentor Graphics Corporation 1996 - 1999.  All rights reserved.  ////This file and associated deliverables are the trade secrets,              ////confidential information and copyrighted works of Mentor Graphics         ////Corporation and its licensors and are subject to your license agreement   ////with Mentor Graphics Corporation.                                         ////                                                                          ////Use of these deliverables for the purpose of making silicon from an IC    ////design is limited to the terms and conditions of your license agreement   ////with Mentor Graphics If you have further questions please contact Mentor  ////Graphics Customer Support.                                                ////                                                                          ////This Mentor Graphics core (m8051 v1999.120) was extracted on              ////workstation hostid _hostid_ Inventra                                      //// Set clock speed and other time constants for M8051 soft core test bench// Copyright Mentor Graphics Corporation and Licensors 1999. All rights reserved// 1.100//******************************************************************************//// File	                :       speed.v// Author               :       M.J.L// Library              :       WORK	// Created on           :       23rd April 1997 RPD 40 MHz operation// Modified on          :       14th October 1999 RPD 50 MHz operation// Purpose              :       TEST BENCH +// Version              :       1.100//////******************************************************************************//`timescale	1 ns / 10 ps	 // Simulator time units and precision`define tick          10.00      // Half clock period of 50 MHz`define clock_on      20.00      // tick * 2`define cycle_period 240.00      // tick * 24`define point9         9.00      // 90% of tick sample point`define point1         1.00      // 10% of tick remainder of period     //******************************************************************************

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