m3s024bo.v

another 8051 core porocesssor vhdl source code

//*******************************************************************       //
//IMPORTANT NOTICE                                                          //
//================                                                          //
//Copyright Mentor Graphics Corporation 1996 - 1999.  All rights reserved.  //
//This file and associated deliverables are the trade secrets,              //
//confidential information and copyrighted works of Mentor Graphics         //
//Corporation and its licensors and are subject to your license agreement   //
//with Mentor Graphics Corporation.                                         //
//                                                                          //
//Use of these deliverables for the purpose of making silicon from an IC    //
//design is limited to the terms and conditions of your license agreement   //
//with Mentor Graphics If you have further questions please contact Mentor  //
//Graphics Customer Support.                                                //
//                                                                          //
//This Mentor Graphics core (m8051 v1999.120) was extracted on              //
//workstation hostid _hostid_ Inventra                                      //
//ALU Controller for M8051
//Copyright Mentor Graphics Corporation and Licensors 1998.  All rights reserved
//v1.005
////////////////////////////////////////////////////////////////////////////////
//
// Verilog file generated by X-HDL - Revision 3.0_11 Beta C April 24, 1998
// Thu Jul  9 22:05:48 1998
//
// Input file : m3s024bo.vhd
// Design name : m3s024bo
// Author : 
// Company : Mentor Graphics - Inventra
//
// Description : 
//
//
////////////////////////////////////////////////////////////////////////////////
//
//*********************************************************************
//%W% %G% SCCS Version Control
//File	        :       m3s024bo.vhd
//Created on    :       11th September 1995
//Purpose       :       ALU control decoder for M8051
//Version       :       1.005
//Mod Date      :       2nd April 1998
//Mod History	:       1.005 _e suffix removed from entity names.
//                      1.004 Name changes
//                      1.003 Sensitivity list revisions. Redundant 
//                            control signals removed.
//                      1.002 INTA removed from decoder for benefit
//                            of synthesis tools.
//
//
//
//*********************************************************************
//Hierarchy record      :
//Called by             :m3s004bo.vhd
//Calls to              :None
//                      :
//                      :
//                      :
//-------------------------------------------------
//*********************************************************************
//Entity Definition
//*********************************************************************
module m3s024bo (ALUC, LODEC_4TOF, NDIVAB, NDJNZD, NDJNZR, NMULAB, DAA, NLJMP,
//*******************************************************************       //
//IMPORTANT NOTICE                                                          //
//================                                                          //
//Copyright Mentor Graphics Corporation 1996 - 1999.  All rights reserved.  //
//This file and associated deliverables are the trade secrets,              //
//confidential information and copyrighted works of Mentor Graphics         //
//Corporation and its licensors and are subject to your license agreement   //
//with Mentor Graphics Corporation.                                         //
//                                                                          //
//Use of these deliverables for the purpose of making silicon from an IC    //
//design is limited to the terms and conditions of your license agreement   //
//with Mentor Graphics If you have further questions please contact Mentor  //
//Graphics Customer Support.                                                //
//                                                                          //
//This Mentor Graphics core (m8051 v1999.120) was extracted on              //
//workstation hostid _hostid_ Inventra                                      //
NLCALL, NOP16, NCPLB, NSETB, NSETC, NORLCN, NORLCB, NMOVCB, NCLRB, NCLRC,
NANLCN, NANLCB, JBC, NCPLC, HIDEC, LODEC, OPC, RET, RETI);

  output[17:0] ALUC;
  reg[17:0] ALUC;
  output LODEC_4TOF;
  reg LODEC_4TOF;
  output NDIVAB;
  reg NDIVAB;
  output NDJNZD;
  reg NDJNZD;
  output NDJNZR;
  reg NDJNZR;
  output NMULAB;
  reg NMULAB;
  output DAA;
  reg DAA;
  output NLJMP;
  reg NLJMP;
  output NLCALL;
  reg NLCALL;
  output NOP16;
  reg NOP16;
  output NCPLB;
  reg NCPLB;
  output NSETB;
  reg NSETB;
  output NSETC;
  reg NSETC;
  output NORLCN;
  reg NORLCN;
  output NORLCB;
  reg NORLCB;
  output NMOVCB;
  reg NMOVCB;
  output NCLRB;
  reg NCLRB;
  output NCLRC;
  reg NCLRC;
  output NANLCN;
  reg NANLCN;
  output NANLCB;
  reg NANLCB;
  output JBC;
  reg JBC;
  output NCPLC;
  reg NCPLC;
  input[15:0] HIDEC;
  input[5:0] LODEC;
  input[3:1] OPC;
  input RET;
  input RETI;

  //*********************************************************************
  //*********************************************************************
  //Signal definitions
  //*********************************************************************
  reg AA; 
  reg AB; 
  reg AC; 
  reg AD; 
  reg AE; 
  reg AF; 
  reg AG; 
  reg AH; 
  reg AI; 
  reg AJ; 
  reg AK; 
  reg AL; 
  reg AM; 
  reg AN; 
  reg AO; 
  reg AP; 
  reg AQ; 
  reg AR; 
  reg AS; 
  reg AT; 
  reg AU; 
  reg AV; 
  reg AW; 
  reg AX; 
  reg AY; 
  reg AZ; 
  reg AAA; 
  reg AAB; 
  reg AAC; 
  reg AAD; 
  reg AAE; 
  reg AAF; 
  reg AAG; 
  reg AAH; 
  reg BA; 
  reg BB; 
  reg BC; 
  reg BD; 
  reg BE; 
  reg CA; 

  always @(OPC or HIDEC or LODEC)
  begin : misc1
    AA <= OPC[2] | OPC[3] ; 
    AB <= HIDEC[1] | HIDEC[9] | HIDEC[11] ; 
    AC <= HIDEC[8] & LODEC[4] ; 
    AD <= HIDEC[15] & LODEC[4] ; 
    AE <= HIDEC[13] & LODEC[5] ; 
    AF <= HIDEC[13] & OPC[3] ; 
    AG <= HIDEC[0] | HIDEC[2] | HIDEC[3] ; 
    AH <= HIDEC[4] | HIDEC[6] ; 
    AI <= OPC[1] | OPC[2] | OPC[3] ; 
    AJ <= HIDEC[10] & LODEC[4] ; 
    AK <= HIDEC[13] & LODEC[4] ; 
    AL <= HIDEC[0] & LODEC[2] ; 
    AM <= HIDEC[1] & LODEC[2] ; 
    AN <= HIDEC[7] | HIDEC[8] | HIDEC[9] | HIDEC[10] ; 
    AO <= HIDEC[14] & LODEC[4] ; 
    AP <= (HIDEC[0] | HIDEC[1]) & LODEC[3] ; 
    AQ <= (HIDEC[2] | HIDEC[3]) & LODEC[3] ; 
    AR <= HIDEC[12] & LODEC[4] ; 
    AS <= HIDEC[2] | HIDEC[3] | HIDEC[9] ; 
    AT <= HIDEC[11] & LODEC[2] ; 
    AU <= HIDEC[13] & LODEC[2] ; 
    AV <= HIDEC[11] & LODEC[3] ; 
    AW <= HIDEC[13] & LODEC[3] ; 
    AX <= HIDEC[10] & LODEC[0] ; 
    AY <= HIDEC[7] & LODEC[2] ; 
    AZ <= HIDEC[10] & LODEC[2] ; 
    AAA <= HIDEC[12] & LODEC[2] ; 
    AAB <= HIDEC[12] & LODEC[3] ; 
    AAC <= HIDEC[11] & LODEC[0] ; 
    AAD <= HIDEC[8] & LODEC[2] ; 
    AAE <= HIDEC[1] & LODEC[0] ; 
    AAF <= HIDEC[3] | HIDEC[9] ; 
    AAG <= (HIDEC[1] | HIDEC[3]) & LODEC[3] ; 
    AAH <= HIDEC[7] | HIDEC[8] | HIDEC[9] | HIDEC[11] | HIDEC[12] | HIDEC[
    13] ; 
  end 

  always @(AD or AJ or AK or AL or AM or AN or LODEC or RET or RETI)
  begin : misc2
    BA <= AD | AJ | AK | (LODEC[3] & AN) ; 
    BB <= AL | RET | RETI | AM ; 
    BC <= (LODEC[3] & AN) | AJ | AK ; 
  end 

  always @(AS or AA or AAH or HIDEC or LODEC)
  begin : misc3
    BD <= (AA & (AS | HIDEC[11])) ; 
    BE <= AAH & LODEC[2] ; 
  end 

  always @(AC or AE or AF or BB)
  begin : misc4
    CA <= AC | AE | AF | BB ; 
  end 

  always @(AA or AB or AC or AD or AE or AF or AG or AH or AI or AO or BA or 
   BB or BC or HIDEC)
  begin : aluout1
    ALUC[0] <= (AA & AB) | AC | AD | AE | AF ; 
    ALUC[1] <= (AA & AG) | (AH & AI) | BA | BB ; 
    ALUC[2] <= ~(AD | AO | BC | (AG & AA) | (AI & HIDEC[6])) ; 
  end 

  always @(AA or AB or AC or AD or AE or AF or AG or AI or AJ or AK or AN or 
   AO or CA or HIDEC or LODEC)
  begin : aluout2
    ALUC[3] <= ~(AD | AO | CA | (AA & AB) | (AI & HIDEC[5])) ; 
    ALUC[4] <= AJ | AK | (AA & AG) | (LODEC[3] & AN) ; 
    ALUC[5] <= AC | AF | AE | (AA & AB) ; 
  end 

  always @(AA or AC or AJ or AP or AQ or AR or AS or AT or AU or AV or AW or 
   AX or AY or AZ)
  begin : aluout3
    ALUC[6] <= AJ | AP | AR ; 
    ALUC[7] <= AC | AQ | AR ; 
    ALUC[8] <= AA & AS ; 
    ALUC[9] <= AT | AU | AV | AW | AX ; 
    ALUC[10] <= AU | AV | AW | AY | AZ ; 
  end 

  always @(AA or AC or AJ or AN or AT or AV or AZ or BD or AAA or AAB or 
   AAC or AAD or AAE or AAF or LODEC)
  begin : aluout4
    ALUC[11] <= ~(AC | AJ | AT | AV | AAA | AAB | AAC | AAE) ; 
    ALUC[12] <= ~(AC | AJ | AV | AZ | AAA | AAB | AAD | AAE) ; 
    ALUC[13] <= AA & AAF ; 
    ALUC[14] <= ~(BD | AC | (AN & LODEC[3])) ; 
  end 

  always @(AC or AJ or AK or AV or AW or AX or AY or AZ or BE or AAB or AAC or 
   AAD or AAE or AAG)
  begin : aluout5
    ALUC[15] <= AJ | AAG ; 
    ALUC[16] <= ~(AC | AJ | AV | AW | AX | AY | AZ | AAB | AAC | AAD) ; 
    ALUC[17] <= ~(BE | AAE) ; 
  end 

  always @(AA or AC or AE or AF or AJ or AK or AL or AM or AN or AT or AU or 
   AW or AX or AY or AZ or LODEC)
  begin : miscout1
    LODEC_4TOF <= AA ; 
    NDIVAB <= ~AC ; 
    NDJNZD <= ~AE ; 
    NDJNZR <= ~AF ; 
    NMULAB <= ~AJ ; 
    DAA <= AK ; 
    NLJMP <= ~AL ; 
    NLCALL <= ~AM ; 
    NOP16 <= ~(LODEC[3] & AN) ; 
    NCPLB <= ~AT ; 
    NSETB <= ~AU ; 
    NSETC <= ~AW ; 
    NORLCN <= ~AX ; 
    NORLCB <= ~AY ; 
    NMOVCB <= ~AZ ; 
  end 

  always @(AAA or AAB or AAC or AAD or AAE or AV)
  begin : miscout2
    NCLRB <= ~AAA ; 
    NCLRC <= ~AAB ; 
    NANLCN <= ~AAC ; 
    NANLCB <= ~AAD ; 
    JBC <= AAE ; 
    NCPLC <= ~AV ; 
  end 
  //*********************************************************************
endmodule