m8051.v

another 8051 core porocesssor vhdl source code

  wire[2:0] BIT_POSN; 
  wire[2:0] PSWC; 
  reg[2:0] DLMSTQ; 
  wire[3:1] CYC; 
  wire[3:0] IACK; 
  wire[3:0] SPC; 
  wire[3:0] TMPADD; 
  wire[4:1] VECTOR_ADDR; 
  wire[4:0] MOVX; 
  wire[7:0] ACCDAT; 
  wire[7:0] ALUDAT; 
  wire[7:0] BREG; 
  wire[7:0] CPRDDM; 
  wire[7:0] IE; 
  wire[7:0] IP; 
  reg[7:0] IMMDAT; 
  reg[7:0] IROMD; 
  wire[7:0] MSIZ; 
  wire[7:0] OPC; 
  wire[7:0] DPH; 
  wire[7:0] DPL; 
  wire[7:0] OAI; 
  wire[7:0] PCON; 
  wire[7:0] PSWDAT; 
  wire[7:0] RAMDI; 
  wire[7:0] RDAT; 
  wire[7:0] SBUF; 
  wire[7:0] SCON; 
  wire[7:0] PORTA; 
  wire[7:0] PORTB; 
  wire[7:0] PORTC; 
  wire[7:0] PORTD; 
  wire[7:0] SFRDAT; 
  wire[7:0] SP; 
  wire[7:0] TCON; 
  wire[7:0] TLA; 
  wire[7:0] TLB; 
  wire[7:0] THA; 
  wire[7:0] THB; 
  wire[7:0] TMOD; 
  wire[7:0] TMPDAT; 
  wire[7:0] LFA; 
  wire[9:0] ACCADD; 
  wire[9:0] ACLDAT; 
  wire[12:1] PCADD; 
  wire[10:0] REGADD; 
  wire[6:1] STATD; 
  wire[15:0] STACK_DATA; 
  wire[15:0] PROGRAM_COUNT; 
  wire[15:0] PROGRAM_ADDR; 
  wire[17:0] ALUC; 
  wire[21:0] SFRW; 
  //*********************************************************************
  //Port Mapping
  //*********************************************************************
  //*********************************************************************
  m3s001bo U1 (.STATD(STATD), .CYC(CYC), .LCYC(LCYC), .DIV2CK1(DIV2CK1), .
  DIV2CK2(DIV2CK2), .S_EN(S_EN), .T_EN(T_EN), .STATE12(STATE12), .RST(RST),
  .GOCYC2(GOCYC2), .MULDIV(MULDIV), .PCON(PCON[0]), .NX1(NX1), .NX2(NX2)); 
  //*********************************************************************
  m3s003bo U2 (.ALUDAT(ALUDAT), .CPRDDM(CPRDDM), .CO(CO), .ACO(ACO), .OV(
  OV), .BBIT(BBIT), .ACLDAT(ACLDAT), .TMPDAT(TMPDAT), .ALUC(ALUC), .ACCDAT(
  ACCDAT[7:7]), .BIT_POSN(BIT_POSN), .NMULAB(NMULAB), .NDIVAB(NDIVAB), .DAA(
  DAA), .ACC0(ACC0)); 
  //*********************************************************************
  m3s004bo U3 (.ACCADD(ACCADD), .PCADD(PCADD), .REGADD(REGADD), .TMPADD(TMPADD),
  .MOVX(MOVX), .ALUC(ALUC), .CODAT(CODAT), .PSWC(PSWC), .SPC(SPC), .ADDR_11BIT(
  ADDR_11BIT), .LOGDI(LOGDI), .JMPADPTR(JMPADPTR), .GOCYC2(GOCYC2), .MULDIV(
  MULDIV), .NMULAB(NMULAB), .NDIVAB(NDIVAB), .DAA(DAA), .CJNE(CJNE), .RETI(
  RETI), .EITHER_RET(EITHER_RET), .RMW(RMW), .JBC(JBC), .IMMB3(IMMB3), .IMMB4(
  IMMB4), .OPC(OPC), .DAAL(DAAL), .DAAH(DAAH)); 
  //*********************************************************************
  m3s005bo U4 (.ACCDAT(ACCDAT), .BREG(BREG), .ACLDAT(ACLDAT), .PAR(PAR), .
  ACC0(ACC0), .DAAL(DAAL), .DAAH(DAAH), .CYC(CYC[1:1]), .PSWDAT(PSWDAT[7:6]),
  .STATD(STATD[6:2]), .ACCADD(ACCADD), .ALUDAT(ALUDAT), .CPRDDM(CPRDDM), .RDAT(
  RDAT), .IMMDAT(IMMDAT), .RAMDI(RAMDI), .SFRW(SFRW[21:20]), .DAA(DAA), .LCYC(
  LCYC), .DIV2CK(DIV2CK2), .CO(CO), .RST(RST), .NX1(NX2)); 
  //*********************************************************************
  m3s006bo U5 (.TMPDAT(TMPDAT), .PROGRAM_COUNT(PROGRAM_COUNT), .RDAT(RDAT),
  .IMMDAT(IMMDAT), .CODAT(CODAT), .DPH(DPH), .DPL(DPL), .BREG(BREG), .TMPADD(
  TMPADD), .CYC(CYC[1:1]), .STATD(STATD[5:2]), .LOGDI(LOGDI), .DIV2CK(DIV2CK2),
  .NX1(NX2), .RST(RST)); 
  //*********************************************************************
  m3s007bo U6 (.C_TRUE(C_TRUE), .ALUDAT(ALUDAT), .OPC(OPC[7:4]), .PSWDAT(
  PSWDAT[7:7]), .CYC(CYC[2:2]), .STATD(STATD[3:3]), .BBIT(BBIT), .DIV2CK(DIV2CK2),
  .NX1(NX2), .RST(RST)); 
  //*********************************************************************
  m3s008bo U7 (.WEP(WEP), .NFOE(NFOE), .NFWE(NFWE), .NSFROE(NSFROE), .NSFRWE(
  NSFRWE), .RAMDI(RAMDI), .FA(LFA), .BIT_POSN(BIT_POSN), .RDAT(RDAT), .SFRW(
  SFRW), .JBC(JBC), .EITHER_RET(EITHER_RET), .C_TRUE(C_TRUE), .NESFR(NESFR),
  .CLEAR(CLEAR), .LCYC(LCYC), .RESINT(RESINT), .DIV2CK(DIV2CK2), .NX1(NX2),
  .RST(RST), .ALUDAT(ALUDAT), .IMMDAT(IMMDAT), .SFRDAT(SFRDAT), .SP(SP), .IROMD(
  IROMD), .FI(FI), .CYC(CYC[2:1]), .OPC(OPC[3:0]), .PSWDAT(PSWDAT[4:3]), .REGADD(
  REGADD), .STATD(STATD[6:1]), .STACK_DATA(STACK_DATA)); 
  //*********************************************************************
  m3s010bo U8 (.EXT_PROG_EN(EXT_PROG_EN), .EXT_ROM(EXT_ROM), .DPL(DPL), .
  DPH(DPH), .STACK_DATA(STACK_DATA), .PROGRAM_COUNT(PROGRAM_COUNT), .PROGRAM_ADDR(
  PROGRAM_ADDR), .NEA(NEA), .LCYC(LCYC), .DLM(LDLM), .DLMSTB(DLMSTB), .INTA(
  INTA), .IDLE(PCON[0]), .C_TRUE(C_TRUE), .CLEAR(CLEAR), .DIV2CK(DIV2CK2), .
  NX1(NX2), .RDAT(RDAT), .ALUDAT(ALUDAT), .IMMDAT(IMMDAT), .VECTOR_ADDR(VECTOR_ADDR),
  .RAMDI(RAMDI), .MSIZ(MSIZ), .CYC(CYC[2:1]), .OPC(OPC[7:5]), .PCADD(PCADD),
  .ADDR_11BIT(ADDR_11BIT), .JMPADPTR(JMPADPTR), .STATD(STATD[6:1]), .SFRW(SFRW[
  15:14])); 
  //*********************************************************************
  m3s015bo U9 (.LOV1(LOV1), .TCON(TCON), .TMOD(TMOD), .TLA(TLA), .TLB(TLB),
  .THA(THA), .THB(THB), .IACK(IACK), .DI(DI[5:2]), .STATD(STATD[6:6]), .RAMDI(
  RAMDI), .SFRW(SFRW[9:4]), .RMW(RMW), .S_EN(S_EN), .T_EN(T_EN), .STATE12(STATE12),
  .DIV2CK1(DIV2CK1), .NX1(NX1), .NX2(NX2), .CLEAR(CLEAR)); 
  //*********************************************************************
  m3s018bo U10 (.ALE(ALE), .NPSEN(NPSEN), .MOEI(MOEI), .EXPMEM(EXPMEM), .
  OAI(OAI), .OB(OB), .OC(OC), .OD(OD), .AE(AE), .BE(BE), .CE(CE), .DE(DE), .
  PORTA(PORTA), .PORTB(PORTB), .PORTC(PORTC), .PORTD(PORTD), .PROGRAM_ADDR(
  PROGRAM_ADDR), .AI(AI), .BI(BI), .CI(CI), .DI(DI), .RAMDI(RAMDI), .DPL(DPL),
  .DPH(DPH), .ACCDAT(ACCDAT), .FA(LFA), .STATD(STATD[6:1]), .MOVX(MOVX), .SFRW(
  SFRW[3:0]), .CYC(CYC[2:1]), .PCON(PCON[0:0]), .XROM(EXT_ROM), .EXT_PROG_EN(
  EXT_PROG_EN), .NEA(NEA), .RXDO(RXDO), .TXDO(TXDO), .RMW(RMW), .DIV2CK(DIV2CK2),
  .NX1(NX1), .NX2(NX2), .CLEAR(CLEAR), .RST(RST), .DLMR(DLMR)); 
  //*********************************************************************
  m3s019bo U11 (.INTA(INTA), .IE(IE), .IP(IP), .VECTOR_ADDR(VECTOR_ADDR),
  .IACK(IACK), .RITI(RITI), .WEP(WEP), .RETI(RETI), .LCYC(LCYC), .T_EN(T_EN),
  .S_EN(S_EN), .DIV2CK(DIV2CK1), .CLEAR(CLEAR), .RST(RST), .NX1(NX1), .NX2(
  NX2), .STATD(STATD[1:1]), .CYC(CYC[2:2]), .TCON(TCON[7:1]), .RAMDI(RAMDI),
  .SFRW(SFRW[13:12])); 
  //*********************************************************************
  m3s020bo U12 (.RESINT(RESINT), .SP(SP), .PCON(PCON), .PSWDAT(PSWDAT), .
  MSIZ(MSIZ), .CO(CO), .ACO(ACO), .OV(OV), .PAR(PAR), .DAA(DAA), .MULDIV(MULDIV),
  .CJNE(CJNE), .OPLOAD(OPLOAD), .INTA(INTA), .LCYC(LCYC), .DIV2CK2(DIV2CK2),
  .CLEAR(CLEAR), .RST(RST), .STATE12(STATE12), .NX1(NX1), .NX2(NX2), .CYC(CYC[
  2:1]), .PSWC(PSWC), .SPC(SPC), .STATD(STATD[6:1]), .RAMDI(RAMDI), .SFRW(SFRW[
  19:16])); 
  //*********************************************************************
  m3s023bo U13 (.SFRDAT(SFRDAT), .FA(LFA[6:0]), .PORTA(PORTA), .PORTB(PORTB),
  .PORTC(PORTC), .PORTD(PORTD), .SP(SP), .DPL(DPL), .DPH(DPH), .PCON(PCON),
  .TCON(TCON), .TMOD(TMOD), .TLA(TLA), .TLB(TLB), .THA(THA), .THB(THB), .SCON(
  SCON), .SBUF(SBUF), .IE(IE), .IP(IP), .PSWDAT(PSWDAT), .ACCDAT(ACCDAT), .
  BREG(BREG), .MSIZ(MSIZ)); 
  //*********************************************************************
  m3s025bo U14 (.OPC(OPC), .OPLOAD(OPLOAD), .IROMD(IROMD), .STATD(STATD[1:
  1]), .PCON(PCON[0:0]), .CLEAR(CLEAR), .RST(RST), .DIV2CK(DIV2CK2), .NX1(NX2),
  .INTA(INTA), .LCYC(LCYC), .DLM(LDLM)); 
  //*********************************************************************
  m3s028bo U15 (.SCON(SCON), .SBUF(SBUF), .RITI(RITI), .RXDO(RXDO), .TXDO(
  TXDO), .DI(DI[0:0]), .STATE12(STATE12), .RAMDI(RAMDI), .PCON(PCON[7:7]), .
  SFRW(SFRW[11:10]), .LOV1(LOV1), .S_EN(S_EN), .T_EN(T_EN), .DIV2CK1(DIV2CK1),
  .NX1(NX1), .NX2(NX2), .CLEAR(CLEAR)); 

  always @(OAI or IROMD or RAMDI or AI or LDLM)
  begin : muxoa
    if (!LDLM)
    begin
      OA <= OAI ; 
      FO <= RAMDI ; 
    end
    else
    begin
      OA <= IROMD ; 
      FO <= AI ; 
    end 
  end 

  always @(DIV2CK2 or STATD or MOVX or PCADD or IMMB4 or LCYC or CYC or LDLM 
  or 
   DI or IMMB3 or DLMSTQ)
  begin : misc1
    // Immediate data register write enable and download mode controls.
    IMMDATEN <= DIV2CK2 & ((STATD[3] & MOVX[0]) | (STATD[1] & IMMB3 & ~LCYC)
    | (STATD[4] & (CYC[1] | IMMB4))) ; 
    DLMSTBI <= (DI[6] & DI[7]) | ~LDLM ; 
    DLMR <= LDLM & ~DI[7] ; 
    DLMSTB <= DLMSTQ[0] & ~DLMSTQ[1] & LDLM ; 
  end 

  always @(MD or AI or STATD or MOVX or EXPMEM)
  begin : muxiromd
    if (!((STATD[3] & MOVX[0]) | EXPMEM))
    begin
      IROMD <= MD ; 
    end
    else
    begin
      IROMD <= AI ; 
    end 
  end 

  always @(posedge NX1 or posedge RST)
  begin : setclear
    if (RST)
    begin
      CLEAR <= 1'b1 ; 
    end
    else
    begin
      // Synchronous clear register.
      if (S_EN & (CYC[1] | CLEAR))
      begin
        CLEAR <= 1'b0 ; 
      end 
    end 
  end 

  always @(posedge NX2)
  begin : setimmdat
    // Immediate program data register
    if (IMMDATEN)
    begin
      IMMDAT <= IROMD ; 
    end  
  end 

  always @(posedge NX1)
  begin : setdlmstq
    // Download mode program counter increment strobe synchroniser
    DLMSTQ[0] <= DLMSTBI ; 
    DLMSTQ[1] <= DLMSTQ[0] ;  
  end 

  always @(RST)
  begin : direction_ap
    // Bi-direct buffer control for PSEN and ALE signals
    NALEN <= RST ; 
  end 

  always @(posedge NX1)
  begin : setdlm
    // Enter download mode during reset only and at least two clock edges
    // after RST goes high, in order to allow ALE and PSEN to tri-state 
    // first.
    LDLM <= RST & ~PSEI & ~ALEI ;  
  end 

  always @(DI or LDLM or MOEI)
  begin : prog_mem_strobes
    // Internal program memory control outputs.
    // Write strobe (NMWE) may only be active during download mode.
    NMWE <= DI[6] | ~LDLM ; 
    NMOE <= (DI[7] | ~LDLM) & (LDLM | ~MOEI) ; 
  end 

  always @(LFA or LDLM or PCON or PROGRAM_ADDR)
  begin : localout
    // Rename internal signals for export beyond MegaMacro boundary.
    FA <= LFA ; 
    DLM <= LDLM ; 
    XOFF <= PCON[1] ; 
    IDLE <= PCON[0] ; 
    M <= PROGRAM_ADDR ; 
  end 
  //*********************************************************************
endmodule