m3s027bo.v

another 8051 core porocesssor vhdl source code

//*******************************************************************       //
//IMPORTANT NOTICE                                                          //
//================                                                          //
//Copyright Mentor Graphics Corporation 1996 - 1999.  All rights reserved.  //
//This file and associated deliverables are the trade secrets,              //
//confidential information and copyrighted works of Mentor Graphics         //
//Corporation and its licensors and are subject to your license agreement   //
//with Mentor Graphics Corporation.                                         //
//                                                                          //
//Use of these deliverables for the purpose of making silicon from an IC    //
//design is limited to the terms and conditions of your license agreement   //
//with Mentor Graphics If you have further questions please contact Mentor  //
//Graphics Customer Support.                                                //
//                                                                          //
//This Mentor Graphics core (m8051 v1999.120) was extracted on              //
//workstation hostid _hostid_ Inventra                                      //
//4 Bit sum sub-block for m8051
//Copyright Mentor Graphics Corporation and Licensors 1998.  All rights reserved
//v1.002
////////////////////////////////////////////////////////////////////////////////
//
// Verilog file generated by X-HDL - Revision 3.0_11 Beta C April 24, 1998
// Thu Jul  9 22:05:52 1998
//
// Input file : m3s027bo.vhd
// Design name : m3s027bo
// Author : 
// Company : Mentor Graphics - Inventra
//
// Description : 
//
//
////////////////////////////////////////////////////////////////////////////////
//
//*********************************************************************
//%W% %G% SCCS Version Control
//File	        :       m3s027bo.vhd
//Created on    :       12th October 1995
//Purpose       :       4 Bit sum sub-block for m8051
//Version       :       1.002
//Mod Date      :       2nd April 1998
//Mod History	:       1.002 _e suffix removed from entity names.
//
//
//
//*********************************************************************
//Hierarchy record      :
//Called by             :m3s011bo.vhd
//Calls to              :None
//                      :
//                      :
//                      :
//-------------------------------------------------
//*********************************************************************
//Entity Definition
//*********************************************************************
module m3s027bo (SUM, NG, P, NCI);
//*******************************************************************       //
//IMPORTANT NOTICE                                                          //
//================                                                          //
//Copyright Mentor Graphics Corporation 1996 - 1999.  All rights reserved.  //
//This file and associated deliverables are the trade secrets,              //
//confidential information and copyrighted works of Mentor Graphics         //
//Corporation and its licensors and are subject to your license agreement   //
//with Mentor Graphics Corporation.                                         //
//                                                                          //
//Use of these deliverables for the purpose of making silicon from an IC    //
//design is limited to the terms and conditions of your license agreement   //
//with Mentor Graphics If you have further questions please contact Mentor  //
//Graphics Customer Support.                                                //
//                                                                          //
//This Mentor Graphics core (m8051 v1999.120) was extracted on              //
//workstation hostid _hostid_ Inventra                                      //

  output[3:0] SUM;
  reg[3:0] SUM;
  input[3:0] NG;
  input[3:0] P;
  input NCI;

  //*********************************************************************
  //*********************************************************************
  //Signal definitions
  //*********************************************************************
  reg AA; 
  reg AB; 
  reg AC; 
  reg AD; 
  reg AE; 
  reg AF; 
  reg AG; 
  reg AH; 
  reg AI; 
  reg AJ; 
  reg BA; 
  reg BB; 
  reg BC; 

  always @(P or NG or NCI)
  begin : misc1
    AA <= P[3] & NG[3] ; 
    AB <= (~P[1]) & NG[2] ; 
    AC <= (~P[0]) & NG[2] & NG[1] ; 
    AD <= NCI & NG[2] & NG[1] & NG[0] ; 
    AE <= P[2] & NG[2] ; 
    AF <= (~P[0]) & NG[1] ; 
    AG <= NCI & NG[1] & NG[0] ; 
    AH <= P[1] & NG[1] ; 
    AI <= NCI & NG[0] ; 
    AJ <= P[0] & NG[0] ; 
  end 

  always @(P or AB or AC or AD or AF or AG or AI)
  begin : misc2
    BA <= (~P[2]) | AB | AC | AD ; 
    BB <= (~P[1]) | AF | AG ; 
    BC <= (~P[0]) | AI ; 
  end 

  always @(AA or AE or AH or AJ or BA or BB or BC or NCI)
  begin : sumout
    SUM[0] <= (~AJ) ^ NCI ; 
    SUM[1] <= (~AH) ^ BC ; 
    SUM[2] <= (~AE) ^ BB ; 
    SUM[3] <= (~AA) ^ BA ; 
  end 
  //*********************************************************************
endmodule