m3s011bo.v

another 8051 core porocesssor vhdl source code

//*******************************************************************       //
//IMPORTANT NOTICE                                                          //
//================                                                          //
//Copyright Mentor Graphics Corporation 1996 - 1999.  All rights reserved.  //
//This file and associated deliverables are the trade secrets,              //
//confidential information and copyrighted works of Mentor Graphics         //
//Corporation and its licensors and are subject to your license agreement   //
//with Mentor Graphics Corporation.                                         //
//                                                                          //
//Use of these deliverables for the purpose of making silicon from an IC    //
//design is limited to the terms and conditions of your license agreement   //
//with Mentor Graphics If you have further questions please contact Mentor  //
//Graphics Customer Support.                                                //
//                                                                          //
//This Mentor Graphics core (m8051 v1999.120) was extracted on              //
//workstation hostid _hostid_ Inventra                                      //
//Program Counter Increment and Relative Offset Generator for M8051
//(c) Copyright Mentor Graphics corporation and Licensors 1998. All rights reserved
//v1.005
//////////////////////////////////////////////////////////////////////////////////////////////
//
// Verilog file generated by X-HDL - Revision 3.0_11 Beta C April 24, 1998
// Thu Jul  9 22:05:12 1998
//
// Input file : m3s011bo.vhd
// Design name : m3s011bo
// Author : 
// Company : Mentor Graphics - Inventra
//
// Description : 
//
//
//////////////////////////////////////////////////////////////////////////////////////////////
//
//*********************************************************************
//%W% %G% SCCS Version Control
//File	        :       m3s011bo.vhd
//Created on    :       23th September 1995
//Purpose       :       Program counter inc and relative offset gen for m8051
//Version       :       1.005
//Mod Date      :       2nd April 1998
//Mod History	:       1.005 _e suffix removed from entity names.
//                      1.004 Name changes only
//                      1.003 ECN 878: Names changed for legibility
//                      1.002-added LNGC,LNPC buses to allow verilog conversion,
//                            no circuit change.
//                      1.001(Original)
//
//
//*********************************************************************
//Hierarchy record      :
//Called by             :m3s010bo.vhd
//Calls to              :m3s027bo.vhd
//                      :m3s040bo.vhd
//                      :
//                      :
//*********************************************************************
//*********************************************************************
//Entity Definition
//*********************************************************************
module m3s011bo (NEXT_REL_PC, PROGRAM_COUNT, IMMDAT, PC_INCR, JMP_REL);
//*******************************************************************       //
//IMPORTANT NOTICE                                                          //
//================                                                          //
//Copyright Mentor Graphics Corporation 1996 - 1999.  All rights reserved.  //
//This file and associated deliverables are the trade secrets,              //
//confidential information and copyrighted works of Mentor Graphics         //
//Corporation and its licensors and are subject to your license agreement   //
//with Mentor Graphics Corporation.                                         //
//                                                                          //
//Use of these deliverables for the purpose of making silicon from an IC    //
//design is limited to the terms and conditions of your license agreement   //
//with Mentor Graphics If you have further questions please contact Mentor  //
//Graphics Customer Support.                                                //
//                                                                          //
//This Mentor Graphics core (m8051 v1999.120) was extracted on              //
//workstation hostid _hostid_ Inventra                                      //

  output[15:0] NEXT_REL_PC;
  wire[15:0] NEXT_REL_PC;
  input[15:0] PROGRAM_COUNT;
  input[7:0] IMMDAT;
  input PC_INCR;
  input JMP_REL;

  //*********************************************************************
  //*********************************************************************
  //Component Definitions
  //*********************************************************************
  //Decode matrix
  //*********************************************************************
  //*********************************************************************
  //Signal definitions
  //*********************************************************************
  reg NCI; 
  reg AA; 
  reg AB; 
  reg AC; 
  reg AD; 
  reg AE; 
  reg AF; 
  reg AG; 
  reg AH; 
  reg AI; 
  reg[7:0] LBUSA; 
  reg[15:0] NG; 
  reg[15:0] P; 
  wire[1:0] LNGC; 
  wire[1:0] LNPC; 
  reg[2:0] NGC; 
  reg[2:0] NPC; 
  reg[2:0] NC; 
  //*********************************************************************
  //Port Mapping
  //*********************************************************************
  //*********************************************************************
  m3s027bo U1 (.SUM(NEXT_REL_PC[15:12]), .NG(NG[15:12]), .P(P[15:12]), .NCI(
  NC[2])); 
  //*********************************************************************
  m3s027bo U2 (.SUM(NEXT_REL_PC[11:8]), .NG(NG[11:8]), .P(P[11:8]), .NCI(
  NC[1])); 
  //*********************************************************************
  m3s027bo U3 (.SUM(NEXT_REL_PC[7:4]), .NG(NG[7:4]), .P(P[7:4]), .NCI(NC[0])); 
  //*********************************************************************
  m3s027bo U4 (.SUM(NEXT_REL_PC[3:0]), .NG(NG[3:0]), .P(P[3:0]), .NCI(NCI)); 
  //*********************************************************************
  m3s040bo U5 (.NGC(LNGC[1]), .NPC(LNPC[1]), .NG(NG[7:4]), .P(P[7:4])); 
  //*********************************************************************
  m3s040bo U6 (.NGC(LNGC[0]), .NPC(LNPC[0]), .NG(NG[3:0]), .P(P[3:0])); 

  always @(IMMDAT or JMP_REL)
  begin : setabus
    LBUSA[0] <= JMP_REL & IMMDAT[0] ; 
    LBUSA[1] <= JMP_REL & IMMDAT[1] ; 
    LBUSA[2] <= JMP_REL & IMMDAT[2] ; 
    LBUSA[3] <= JMP_REL & IMMDAT[3] ; 
    LBUSA[4] <= JMP_REL & IMMDAT[4] ; 
    LBUSA[5] <= JMP_REL & IMMDAT[5] ; 
    LBUSA[6] <= JMP_REL & IMMDAT[6] ; 
    LBUSA[7] <= JMP_REL & IMMDAT[7] ; 
  end 

  always @(LBUSA or PROGRAM_COUNT)
  begin : set_ng
    NG[0] <= ~(PROGRAM_COUNT[0] & LBUSA[0]) ; 
    NG[1] <= ~(PROGRAM_COUNT[1] & LBUSA[1]) ; 
    NG[2] <= ~(PROGRAM_COUNT[2] & LBUSA[2]) ; 
    NG[3] <= ~(PROGRAM_COUNT[3] & LBUSA[3]) ; 
    NG[4] <= ~(PROGRAM_COUNT[4] & LBUSA[4]) ; 
    NG[5] <= ~(PROGRAM_COUNT[5] & LBUSA[5]) ; 
    NG[6] <= ~(PROGRAM_COUNT[6] & LBUSA[6]) ; 
    NG[7] <= ~(PROGRAM_COUNT[7] & LBUSA[7]) ; 
    NG[8] <= ~(PROGRAM_COUNT[8] & LBUSA[7]) ; 
    NG[9] <= ~(PROGRAM_COUNT[9] & LBUSA[7]) ; 
    NG[10] <= ~(PROGRAM_COUNT[10] & LBUSA[7]) ; 
    NG[11] <= ~(PROGRAM_COUNT[11] & LBUSA[7]) ; 
    NG[12] <= ~(PROGRAM_COUNT[12] & LBUSA[7]) ; 
    NG[13] <= ~(PROGRAM_COUNT[13] & LBUSA[7]) ; 
    NG[14] <= ~(PROGRAM_COUNT[14] & LBUSA[7]) ; 
    NG[15] <= ~(PROGRAM_COUNT[15] & LBUSA[7]) ; 
  end 

  always @(LBUSA or PROGRAM_COUNT)
  begin : set_p
    P[0] <= PROGRAM_COUNT[0] | LBUSA[0] ; 
    P[1] <= PROGRAM_COUNT[1] | LBUSA[1] ; 
    P[2] <= PROGRAM_COUNT[2] | LBUSA[2] ; 
    P[3] <= PROGRAM_COUNT[3] | LBUSA[3] ; 
    P[4] <= PROGRAM_COUNT[4] | LBUSA[4] ; 
    P[5] <= PROGRAM_COUNT[5] | LBUSA[5] ; 
    P[6] <= PROGRAM_COUNT[6] | LBUSA[6] ; 
    P[7] <= PROGRAM_COUNT[7] | LBUSA[7] ; 
    P[8] <= PROGRAM_COUNT[8] | LBUSA[7] ; 
    P[9] <= PROGRAM_COUNT[9] | LBUSA[7] ; 
    P[10] <= PROGRAM_COUNT[10] | LBUSA[7] ; 
    P[11] <= PROGRAM_COUNT[11] | LBUSA[7] ; 
    P[12] <= PROGRAM_COUNT[12] | LBUSA[7] ; 
    P[13] <= PROGRAM_COUNT[13] | LBUSA[7] ; 
    P[14] <= PROGRAM_COUNT[14] | LBUSA[7] ; 
    P[15] <= PROGRAM_COUNT[15] | LBUSA[7] ; 
  end 

  always @(AA or AB or AC or AD or AE or AF or AG or AH or AI)
  begin : set_nc
    NC[0] <= AH | AI ; 
    NC[1] <= AE | AF | AG ; 
    NC[2] <= AA | AB | AC | AD ; 
  end 

  always @(PC_INCR or NG or P)
  begin : misc1
    NCI <= ~PC_INCR ; 
    NGC[2] <= NG[8] & NG[9] & NG[10] & NG[11] ; 
    NPC[2] <= ~(P[8] & P[9] & P[10] & P[11]) ; 
  end 

  always @(NGC or NPC or NCI)
  begin : misc2
    AA <= NGC[2] & NPC[2] ; 
    AB <= NGC[2] & NGC[1] & NPC[1] ; 
    AC <= NGC[2] & NGC[1] & NGC[0] & NPC[0] ; 
    AD <= NGC[2] & NGC[1] & NGC[0] & NCI ; 
    AE <= NGC[1] & NPC[1] ; 
    AF <= NGC[1] & NGC[0] & NPC[0] ; 
    AG <= NGC[1] & NGC[0] & NCI ; 
    AH <= NGC[0] & NPC[0] ; 
    AI <= NGC[0] & NCI ; 
  end 

  always @(LNGC or LNPC)
  begin : misc3
    NGC[1:0] <= LNGC ; 
    NPC[1:0] <= LNPC ; 
  end 
  //*********************************************************************
endmodule