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📄 tingchechang.map.rpt

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💻 RPT
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; Registers Removed During Synthesis                                             ;
+---------------------------------------+----------------------------------------+
; Register name                         ; Reason for Removal                     ;
+---------------------------------------+----------------------------------------+
; tingche:inst1|x                       ; Stuck at VCC due to stuck port data_in ;
; sel:inst3|cnt[0]                      ; Merged with HELLO:inst|CntClk[0]       ;
; delay:inst9|q[0]                      ; Merged with HELLO:inst|CntClk[0]       ;
; sel:inst3|cnt[1]                      ; Merged with HELLO:inst|CntClk[1]       ;
; sel:inst3|cnt[2]                      ; Merged with HELLO:inst|CntClk[2]       ;
; HELLO:inst|CntClk[24]                 ; Lost fanout                            ;
; Total Number of Removed Registers = 6 ;                                        ;
+---------------------------------------+----------------------------------------+


+------------------------------------------------------+
; General Register Statistics                          ;
+----------------------------------------------+-------+
; Statistic                                    ; Value ;
+----------------------------------------------+-------+
; Total registers                              ; 107   ;
; Number of registers using Synchronous Clear  ; 0     ;
; Number of registers using Synchronous Load   ; 0     ;
; Number of registers using Asynchronous Clear ; 73    ;
; Number of registers using Asynchronous Load  ; 0     ;
; Number of registers using Clock Enable       ; 6     ;
; Number of registers using Preset             ; 0     ;
+----------------------------------------------+-------+


+-------------------------------------------------------------------------------------------------------------------------------------------------------+
; Multiplexer Restructuring Statistics (Restructuring Performed)                                                                                        ;
+--------------------+-----------+---------------+----------------------+------------------------+------------+-----------------------------------------+
; Multiplexer Inputs ; Bus Width ; Baseline Area ; Area if Restructured ; Saving if Restructured ; Registered ; Example Multiplexer Output              ;
+--------------------+-----------+---------------+----------------------+------------------------+------------+-----------------------------------------+
; 8:1                ; 8 bits    ; 40 LEs        ; 40 LEs               ; 0 LEs                  ; Yes        ; |tingchechang|tingche:inst1|q[0]        ;
; 27:1               ; 3 bits    ; 54 LEs        ; 36 LEs               ; 18 LEs                 ; No         ; |tingchechang|jieguo:inst5|shumaguan[0] ;
+--------------------+-----------+---------------+----------------------+------------------------+------------+-----------------------------------------+


+------------------------------------------------------------------------------+
; Parameter Settings for Inferred Entity Instance: gewei:inst4|lpm_divide:Mod0 ;
+------------------------+----------------+------------------------------------+
; Parameter Name         ; Value          ; Type                               ;
+------------------------+----------------+------------------------------------+
; LPM_WIDTHN             ; 7              ; Untyped                            ;
; LPM_WIDTHD             ; 7              ; Untyped                            ;
; LPM_NREPRESENTATION    ; UNSIGNED       ; Untyped                            ;
; LPM_DREPRESENTATION    ; UNSIGNED       ; Untyped                            ;
; LPM_PIPELINE           ; 0              ; Untyped                            ;
; LPM_REMAINDERPOSITIVE  ; TRUE           ; Untyped                            ;
; MAXIMIZE_SPEED         ; 5              ; Untyped                            ;
; CBXI_PARAMETER         ; lpm_divide_ktl ; Untyped                            ;
; CARRY_CHAIN            ; MANUAL         ; Untyped                            ;
; OPTIMIZE_FOR_SPEED     ; 5              ; Untyped                            ;
; AUTO_CARRY_CHAINS      ; ON             ; AUTO_CARRY                         ;
; IGNORE_CARRY_BUFFERS   ; OFF            ; IGNORE_CARRY                       ;
; AUTO_CASCADE_CHAINS    ; ON             ; AUTO_CASCADE                       ;
; IGNORE_CASCADE_BUFFERS ; OFF            ; IGNORE_CASCADE                     ;
+------------------------+----------------+------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings Tables in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-------------------------------------------------------------------------------+
; Parameter Settings for Inferred Entity Instance: shiwei:inst7|lpm_divide:Div0 ;
+------------------------+----------------+-------------------------------------+
; Parameter Name         ; Value          ; Type                                ;
+------------------------+----------------+-------------------------------------+
; LPM_WIDTHN             ; 7              ; Untyped                             ;
; LPM_WIDTHD             ; 4              ; Untyped                             ;
; LPM_NREPRESENTATION    ; UNSIGNED       ; Untyped                             ;
; LPM_DREPRESENTATION    ; UNSIGNED       ; Untyped                             ;
; LPM_PIPELINE           ; 0              ; Untyped                             ;
; LPM_REMAINDERPOSITIVE  ; TRUE           ; Untyped                             ;
; MAXIMIZE_SPEED         ; 5              ; Untyped                             ;
; CBXI_PARAMETER         ; lpm_divide_e5m ; Untyped                             ;
; CARRY_CHAIN            ; MANUAL         ; Untyped                             ;
; OPTIMIZE_FOR_SPEED     ; 5              ; Untyped                             ;
; AUTO_CARRY_CHAINS      ; ON             ; AUTO_CARRY                          ;
; IGNORE_CARRY_BUFFERS   ; OFF            ; IGNORE_CARRY                        ;
; AUTO_CASCADE_CHAINS    ; ON             ; AUTO_CASCADE                        ;
; IGNORE_CASCADE_BUFFERS ; OFF            ; IGNORE_CASCADE                      ;
+------------------------+----------------+-------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings Tables in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-------------------------------+
; Analysis & Synthesis Messages ;
+-------------------------------+
Info: *******************************************************************
Info: Running Quartus II Analysis & Synthesis
    Info: Version 8.0 Build 215 05/29/2008 SJ Full Version
    Info: Processing started: Mon Sep 30 21:10:43 2002
Info: Command: quartus_map --read_settings_files=on --write_settings_files=off tingchechang -c tingchechang
Info: Found 2 design units, including 1 entities, in source file delay.vhd
    Info: Found design unit 1: delay-delay
    Info: Found entity 1: delay
Info: Found 2 design units, including 1 entities, in source file fenpin.vhd
    Info: Found design unit 1: fenpin-fenpin
    Info: Found entity 1: fenpin
Info: Found 2 design units, including 1 entities, in source file gewei.vhd
    Info: Found design unit 1: gewei-gewei
    Info: Found entity 1: gewei
Info: Found 2 design units, including 1 entities, in source file HELLO.vhd
    Info: Found design unit 1: HELLO-HELLO
    Info: Found entity 1: HELLO
Info: Found 2 design units, including 1 entities, in source file jieguo.vhd
    Info: Found design unit 1: jieguo-jieguo
    Info: Found entity 1: jieguo
Info: Found 2 design units, including 1 entities, in source file sel.vhd
    Info: Found design unit 1: sel-sel
    Info: Found entity 1: sel

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