x86opc.cc

功能较全面的反汇编器：反汇编器ht-2.0.15.tar.gz

/* 17 - GROUP_EXT_01 */
{
{0, {SPECIAL_TYPE_SGROUP, GROUP_SPECIAL_0F01_0}},
{0, {SPECIAL_TYPE_SGROUP, GROUP_SPECIAL_0F01_1}},
{0, {SPECIAL_TYPE_SGROUP, GROUP_SPECIAL_0F01_2}},
{0, {SPECIAL_TYPE_SGROUP, GROUP_SPECIAL_0F01_3}},
{"smsw", {Ew}},
{0},
{"lmsw", {Ew}},
{0, {SPECIAL_TYPE_SGROUP, GROUP_SPECIAL_0F01_7}},
},
/* 18 - GROUP_EXT_18 */
{
{"prefetchnta", {M}},
{"prefetch0", {M}},
{"prefetch1", {M}},
{"prefetch2", {M}},
{"~nop", {Ev}},
{"~nop", {Ev}},
{"~nop", {Ev}},
{"~nop", {Ev}},
},
/* 16 - GROUP_EXT_71 */
{
{0},
{0},
{"psrlw", {PRu, Ib}},
{0},
{"psraw", {PRu, Ib}},
{0},
{"psllw", {PRu, Ib}},
{0},
},
/* 17 - GROUP_EXT_72 */
{
{0},
{0},
{"psrld", {PRu, Ib}},
{0},
{"psrad", {PRu, Ib}},
{0},
{"pslld", {PRu, Ib}},
{0},
},
/* 18 - GROUP_EXT_73 */
{
{0},
{0},
{"psrlq", {PRu, Ib}},
{"psrldq", {PRu, Ib}},
{0},
{0},
{"psllq", {PRu, Ib}},
{"pslldq", {PRu, Ib}},
},
/* 22 - GROUP_EXT_AE */
{
{0, {SPECIAL_TYPE_SGROUP, GROUP_SPECIAL_0FAE_0}},
{0, {SPECIAL_TYPE_SGROUP, GROUP_SPECIAL_0FAE_1}},
{0, {SPECIAL_TYPE_SGROUP, GROUP_SPECIAL_0FAE_2}},
{0, {SPECIAL_TYPE_SGROUP, GROUP_SPECIAL_0FAE_3}},
{0, {SPECIAL_TYPE_SGROUP, GROUP_SPECIAL_0FAE_4}},
{0, {SPECIAL_TYPE_SGROUP, GROUP_SPECIAL_0FAE_5}},
{0, {SPECIAL_TYPE_SGROUP, GROUP_SPECIAL_0FAE_6}},
{0, {SPECIAL_TYPE_SGROUP, GROUP_SPECIAL_0FAE_7}},
},
/* 23 - GROUP_EXT_BA */
{
{0},
{0},
{0},
{0},
{"~bt", {Ev, Ib}},
{"~bts", {Ev, Ib}},
{"~btr", {Ev, Ib}},
{"~btc", {Ev, Ib}},
},
/* 24 - GROUP_EXT_C7 */
{
{0},
{"? |cmpxchg8b|cmpxchg16b", {M}},
{0},
{0},
{0},
{0},
{"vmptrld", {Mq}},
{"vmptrst", {Mq}},
},
/* 25 - GROUP_EXT_66_C7 */
{
{0},
{0},
{0},
{0},
{0},
{0},
{"vmclear", {Mq}},
{0},
},
/* 26 - GROUP_EXT_F3_C7 */
{
{0},
{0},
{0},
{0},
{0},
{0},
{"vmxon", {Mq}},
{0},
},
};

x86opc_insn x86_special_group_insns[X86_SPECIAL_GROUPS][9] = {
/* 0 - GROUP_SPECIAL_0F01_0 */
{
{0},
{"vmcall"},
{"vmlaunch"},
{"vmresume"},
{"vmxoff"},
{0},
{0},
{0},
// with mod!=11:
{"sgdt", {M}},
},
/* 1 - GROUP_SPECIAL_0F01_1 */
{
{"monitor"},
{"mwait"},
{0},
{0},
{0},
{0},
{0},
{0},
// with mod!=11:
{"sidt", {M}},
},
/* 2 - GROUP_SPECIAL_0F01_2 */
{
{"xgetbv"},
{"xsetbv"},
{0},
{0},
{0},
{0},
{0},
{0},
// with mod!=11:
{"lgdt", {M}},
},
/* 3 - GROUP_SPECIAL_0F01_3 */
{
{"vmrun"},
{"vmmcall"},
{"vmload"},
{"vmsave"},
{"stgi"},
{"clgi"},
{"skinit"},
{"invlpga"},
// with mod!=11:
{"lidt", {M}},
},
/* 4 - GROUP_SPECIAL_0F01_7 */
{
{"swapgs"},
{"rdtscp"},
{0},
{0},
{0},
{0},
{0},
{0},
// with mod!=11:
{"invlpg", {M}},
},
/* 5 - GROUP_SPECIAL_0FAE_0 */
{
{0},
{0},
{0},
{0},
{0},
{0},
{0},
{0},
// with mod!=11:
{"fxsave", {M}},
},
/* 6 - GROUP_SPECIAL_0FAE_1 */
{
{0},
{0},
{0},
{0},
{0},
{0},
{0},
{0},
// with mod!=11:
{"fxstor", {M}},
},
/* 7 - GROUP_SPECIAL_0FAE_2 */
{
{0},
{0},
{0},
{0},
{0},
{0},
{0},
{0},
// with mod!=11:
{"ldmxcsr", {Md}},
},
/* 8 - GROUP_SPECIAL_0FAE_3 */
{
{0},
{0},
{0},
{0},
{0},
{0},
{0},
{0},
// with mod!=11:
{"stmxcsr", {Md}},
},
/* 9 - GROUP_SPECIAL_0FAE_4 */
{
{0},
{0},
{0},
{0},
{0},
{0},
{0},
{0},
// with mod!=11:
{"xsave", {M}},
},
/* 10 - GROUP_SPECIAL_0FAE_5 */
{
{"lfence"},
{0},
{0},
{0},
{0},
{0},
{0},
{0},
// with mod!=11:
{"xrstor", {M}},
},
/* 11 - GROUP_SPECIAL_0FAE_6 */
{
{"mfence"},
{0},
{0},
{0},
{0},
{0},
{0},
{0},
// with mod!=11:
{0},
},
/* 12 - GROUP_SPECIAL_0FAE_7 */
{
{"sfence"},
{0},
{0},
{0},
{0},
{0},
{0},
{0},
// with mod!=11:
{"clflush", {M}},
},
};

/*
 *	The ModR/M byte is < 0xC0
 */

x86opc_insn x86_modfloat_group_insns[8][8] = {
/* prefix D8 */
{
{"~fadd", {Ms}},
{"~fmul", {Ms}},
{"~fcom", {Ms}},
{"~fcomp", {Ms}},
{"~fsub", {Ms}},
{"~fsubr", {Ms}},
{"~fdiv", {Ms}},
{"~fdivr", {Ms}},
},
/* prefix D9 */
{
{"~fld", {Ms}},
{0},
{"~fst", {Ms}},
{"~fstp", {Ms}},
{"fldenv", {M}},
{"fldcw", {Mw}},
{"fstenv", {M}},
{"fstcw", {Mw}},
},
/* prefix DA */
{
{"~fiadd", {Md}},
{"~fimul", {Md}},
{"~ficom", {Md}},
{"~ficomp", {Md}},
{"~fisub", {Md}},
{"~fisubr", {Md}},
{"~fidiv", {Md}},
{"~fidivr", {Md}},
},
/* prefix DB */
{
{"~fild", {Md}},
{"~fisttp", {Md}},
{"~fist", {Md}},
{"~fistp", {Md}},
{0},
{"~fld", {Mt}},
{0},
{"~fstp", {Mt}},
},
/* prefix DC */
{
{"~fadd", {Ml}},
{"~fmul", {Ml}},
{"~fcom", {Ml}},
{"~fcomp", {Ml}},
{"~fsub", {Ml}},
{"~fsubr", {Ml}},
{"~fdiv", {Ml}},
{"~fdivr", {Ml}},
},
/* prefix DD */
{
{"~fld", {Ml}},
{"~fisttp", {Mq}},
{"~fst", {Ml}},
{"~fstp", {Ml}},
{"~frstor", {M}},
{0},
{"fsave", {M}},
{"fstsw", {Mw}},
},
/* prefix DE */
{
{"~fiadd", {Mw}},
{"~fimul", {Mw}},
{"~ficom", {Mw}},
{"~ficomp", {Mw}},
{"~fisub", {Mw}},
{"~fisubr", {Mw}},
{"~fidiv", {Mw}},
{"~fidivr", {Mw}},
},
/* prefix DF */
{
{"~fild", {Mw}},
{"~fisttp", {Mw}},
{"~fist", {Mw}},
{"~fistp", {Mw}},
{"~fbld", {Ma}},
{"~fild", {Mq}},
{"~fbstp", {Ma}},
{"~fistp", {Mq}},
}

};

x86opc_insn fgroup_12[8] = {
{"fnop"},
{0},
{0},
{0},
{0},
{0},
{0},
{0},
};

x86opc_insn fgroup_14[8] = {
{"fchs"},
{"fabs"},
{0},
{0},
{"ftst"},
{"fxam"},
{0},
{0},
};

x86opc_insn fgroup_15[8] = {
{"fld1"},
{"fldl2t"},
{"fldl2e"},
{"fldpi"},
{"fldlg2"},
{"fldln2"},
{"fldz"},
{0},
};

x86opc_insn fgroup_16[8] = {
{"f2xm1"},
{"fyl2x"},
{"fptan"},
{"fpatan"},
{"fxtract"},
{"fprem1"},
{"fdecstp"},
{"fincstp"},
};

x86opc_insn fgroup_17[8] = {
{"fprem"},
{"fyl2xp1"},
{"fsqrt"},
{"fsincos"},
{"frndint"},
{"fscale"},
{"fsin"},
{"fcos"},
};

x86opc_insn fgroup_25[8] = {
{0},
{"fucompp"},
{0},
{0},
{0},
{0},
{0},
{0},
};

x86opc_insn fgroup_34[8] = {
{0},
{0},
{"fclex"},
{"finit"},
{0},
{0},
{0},
{0},
};

x86opc_insn fgroup_63[8] = {
{0},
{"fcompp"},
{0},
{0},
{0},
{0},
{0},
{0},
};

x86opc_insn fgroup_74[8] = {
{"fstsw", {X__axw}},
{0},
{0},
{0},
{0},
{0},
{0},
{0},
};

/*
 *	The ModR/M byte is >= 0xC0
 */

x86opc_finsn x86_float_group_insns[8][8] = {
/* prefix D8 */
{
{0, {"fadd", {__st, Ft}}},
{0, {"fmul", {__st, Ft}}},
{0, {"fcom", {__st, Ft}}},
{0, {"fcomp", {__st, Ft}}},
{0, {"fsub", {__st, Ft}}},
{0, {"fsubr", {__st, Ft}}},
{0, {"fdiv", {__st, Ft}}},
{0, {"fdivr", {__st, Ft}}},
},
/* prefix D9 */
{
{0, {"fld", {__st, Ft}}},
{0, {"fxch", {__st, Ft}}},
{(x86opc_insn *)&fgroup_12},
{0},
{(x86opc_insn *)&fgroup_14},
{(x86opc_insn *)&fgroup_15},
{(x86opc_insn *)&fgroup_16},
{(x86opc_insn *)&fgroup_17},
},
/* prefix DA */
{
{0, {"fcmovb", {__st, Ft}}},
{0, {"fcmove", {__st, Ft}}},
{0, {"fcmovbe", {__st, Ft}}},
{0, {"fcmovu", {__st, Ft}}},
{0},
{(x86opc_insn *)&fgroup_25},
{0},
{0},
},
/* prefix DB */
{
{0, {"fcmovnb", {__st, Ft}}},
{0, {"fcmovne", {__st, Ft}}},
{0, {"fcmovnbe", {__st, Ft}}},
{0, {"fcmovnu", {__st, Ft}}},
{(x86opc_insn*)&fgroup_34},
{0, {"fucomi", {__st, Ft}}},
{0, {"fcomi", {__st, Ft}}},
{0},
},
/* prefix DC */
{
{0, {"fadd", {Ft, __st}}},
{0, {"fmul", {Ft, __st}}},
{0},
{0},
{0, {"fsubr", {Ft, __st}}},
{0, {"fsub", {Ft, __st}}},
{0, {"fdivr", {Ft, __st}}},
{0, {"fdiv", {Ft, __st}}},
},
/* prefix DD */
{
{0, {"ffree", {Ft}}},
{0},
{0, {"fst", {Ft}}},
{0, {"fstp", {Ft}}},
{0, {"fucom", {Ft, __st}}},
{0, {"fucomp", {Ft}}},
{0},
{0},
},
/* prefix DE */
{
{0, {"faddp", {Ft, __st}}},
{0, {"fmulp", {Ft, __st}}},
{0},
{(x86opc_insn*)&fgroup_63},
{0, {"fsubrp", {Ft, __st}}},
{0, {"fsubp", {Ft, __st}}},
{0, {"fdivrp", {Ft, __st}}},
{0, {"fdivp", {Ft, __st}}},
},
/* prefix DF */
{
{0, {"ffreep", {Ft}}},
{0},
{0},
{0},
{(x86opc_insn*)&fgroup_74},
{0, {"fucomip", {__st, Ft}}},
{0, {"fcomip", {__st, Ft}}},
{0},
},

};


/*
 * The vex format insns
 */

#define E0(e) static x86opc_vex_insn v##e[] = {
#define E(e) {0}}; static x86opc_vex_insn v##e[] = {
#define Elast {0}}; 
E0(00)
{"vpshufb", _128|_66|_0f38, {Vo, VVo, Wo}},
E(01)
{"vhaddw", _128|_66|_0f38, {Vo, VVo, Wo}},
E(02)
{"vhaddd", _128|_66|_0f38, {Vo, VVo, Wo}},
E(03)
{"vhaddsw", _128|_66|_0f38, {Vo, VVo, Wo}},
E(04)
{"vpermilps", _128|_66|_0f3a, {Vo, Wo, Ib}},
{"vpermilps", _256|_66|_0f3a, {Yy, Xy, Ib}},
{"vmaddubsw", _128|_66|_0f38, {Vo, VVo, Wo}},
E(05)
{"vphsubw", _128|_66|_0f38, {Vo, VVo, Wo}},
{"vpermilpd", _128|_66|_0f3a, {Vo, Wo, Ib}},
{"vpermilpd", _256|_66|_0f3a, {Yy, Xy, Ib}},
E(06)
{"vphsubd", _128|_66|_0f38, {Vo, VVo, Wo}},
{"vperm2f128", _256|_66|_0f3a, {Yy, YVy, Xy, Ib}},
E(07)
{"vphsubsw", _128|_66|_0f38, {Vo, VVo, Wo}},
E(08)
{"vpsignb", _128|_66|_0f38, {Vo, VVo, Wo}},
{"vroundps", _128|_66|_0f3a, {Vo, Wo, Ib}},
{"vroundps", _256|_66|_0f3a, {Yy, Xy, Ib}},
E(09)
{"vpsignw", _128|_66|_0f38, {Vo, VVo, Wo}},
{"vroundpd", _128|_66|_0f3a, {Vo, Wo, Ib}},
{"vroundpd", _256|_66|_0f3a, {Yy, Xy, Ib}},
E(0a)
{"vpsignd", _128|_66|_0f38, {Vo, VVo, Wo}},
{"vroundss", _128|_66|_0f3a, {Vo, Wo, Ib}},
E(0b)
{"vpmulhrsw", _128|_66|_0f, {Vo, VVo, Wo}},
{"vroundsd", _128|_66|_0f3a, {Vo, Wo, Ib}},
E(0c)
{"vblendps", _128|_66|_0f3a, {Vo, VVo, Wo, Ib}},
{"vblendps", _256|_66|_0f3a, {Yy, YVy, Xy, Ib}},
{"vpermilps", _128|_66|_0f38, {Vo, VVo, Wo}},
{"vpermilps", _256|_66|_0f38, {Yy, YVy, Xy}},
E(0d)
{"vpermilpd", _128|_66|_0f38, {Vo, VVo, Wo}},
{"vpermilpd", _256|_66|_0f38, {Yy, YVy, Xy}},
{"vblendpd", _128|_66|_0f3a, {Vo, VVo, Wo, Ib}},
{"vblendpd", _256|_66|_0f3a, {Yy, YVy, Xy, Ib}},
E(0e)
{"vpblendw", _128|_66|_0f3a, {Vo, VVo, Wo, Ib}},
{"vptestps", _128|_66|_0f38, {Vo, Wo}},
{"vptestps", _256|_66|_0f38, {Yy, Xy}},
E(0f)
{"vpalignr", _128|_66|_0f3a, {Vo, VVo, Wo, Ib}},
{"vptestpd", _128|_66|_0f38, {Vo, Wo}},
{"vptestpd", _256|_66|_0f38, {Yy, Xy}},
E(10)
//{"vmovss", _128|_f3|_0f, {Vo, VVo, VRo}},
{"vmovss", _128|_f3|_0f, {Vo, VVo, Wd}},
//{"vmovsd", _128|_f2|_0f, {Vo, VVo, VRo}},
{"vmovsd", _128|_f2|_0f, {Vo, VVo, Wq}},
{"vmovupd", _128|_0f, {Vo, Wo}},
{"vmovupd", _256|_0f, {Yy, Xy}},
{"vmovupd", _128|_66|_0f, {Vo, Wo}},
{"vmovupd", _256|_66|_0f, {Yy, Xy}},
E(11)
//{"vmovss", _128|_f2|_0f, {VRo, VVo, Vo}},
{"vmovss", _128|_f2|_0f, {Wd, VVo, Vo}},
//{"vmovsd", _128|_f2|_0f, {VRo, VVo, Vo}},
{"vmovsd", _128|_f2|_0f, {Wq, VVo, Vo}},
{"vmovups", _128|_0f, {Wo, Vo}},
{"vmovups", _256|_0f, {Xy, Yy}},
{"vmovupd", _128|_66|_0f, {Wo, Vo}},
{"vmovupd", _256|_66|_0f, {Xy, Yy}},
E(12)
{"vmovddup", _128|_f2|_0f, {Vo, Wq}},
{"vmovddup", _256|_f2|_0f, {Yy, Xy}},
{"vmovhlps", _128|_0f, {Vo, VVo, VRo}},
{"vmovlps", _128|_0f, {Vo, VVo, Mq}},
{"vmovlpd", _128|_66|_0f, {Vo, VVo, Mq}},
{"vmovsldup", _128|_f3|_0f, {Vo, Wo}},
{"vmovsldup", _256|_f3|_0f, {Yy, Xy}},
E(13)
{"vmovlps", _128|_0f, {Mq, Vo}},
{"vmovlpd", _128|_66|_0f, {Mq, Vo}},
E(14)
{"vpextrb", _128|_66|_0f3a, {MRbr, Vo, Ib}},
{"vunpcklps", _128|_0f, {Vo, VVo, Wo}},
{"vunpcklps", _256|_0f, {Yy, YVy, Xy}},
{"vunpcklpd", _128|_66|_0f, {Vo, VVo, Wo}},
{"vunpcklpd", _256|_66|_0f, {Yy, YVy, Xy}},
E(15)
{"vpextrw", _128|_66|_0f3a, {MRwr, Vo, Ib}},
{"vunpckhps", _128|_0f, {Vo, VVo, Wo}},
{"vunpckhps", _256|_0f, {Yy, YVy, Xy}},
{"vunpckhpd", _128|_66|_0f, {Vo, VVo, Wo}},
{"vunpckhpd", _256|_66|_0f, {Yy, YVy, Xy}},
E(16)
{"vpextrd", _128|_66|_0f3a|W0, {Ed, Vo, Ib}},
{"vpextrq", _128|_66|_0f3a|W1, {Eq, Vo, Ib}},
{"vmovhps", _128|_0f, {Vo, VVo, Mq}},
{"vmovhpd", _128|_66|_0f, {Vo, VVo, Mq}},
{"vmovlhps", _128|_0f, {Vo, VVo, VRo}},
{"vmovshdup", _128|_f3|_0f, {Vo, Wo}},
{"vmovshdup", _256|_f3|_0f, {Yy, Xy}},
E(17)
{"vmovhps", _128|_0f, {Mq, Vo}},
{"vmovhpd", _128|_66|_0f, {Mq, Vo}},
{"vextractps", _128|_66|_0f3a, {Ed, Vo, Ib}},
{"vextractps", _128|_66|_0f3a|W1, {Eq, Vo, I