ppcopc.cc

功能较全面的反汇编器：反汇编器ht-2.0.15.tar.gz

/*
 *	HT Editor
 *	ppcopc.cc
 *
 *	Copyright (C) 1999-2003 Sebastian Biallas ([e-mail])
 *	Copyright 1994 Free Software Foundation, Inc.
 *	Written by Ian Lance Taylor, Cygnus Support
 *
 *	This program is free software; you can redistribute it and/or modify
 *	it under the terms of the GNU General Public License version 2 as
 *	published by the Free Software Foundation.
 *
 *	This program is distributed in the hope that it will be useful,
 *	but WITHOUT ANY WARRANTY; without even the implied warranty of
 *	MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 *	GNU General Public License for more details.
 *
 *	You should have received a copy of the GNU General Public License
 *	along with this program; if not, write to the Free Software
 *	Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
 */

#include <cstdio>
#include "ppcopc.h"

/* The functions used to insert and extract complicated operands.  */

/* The BA field in an XL form instruction when it must be the same as
   the BT field in the same instruction.  This operand is marked FAKE.
   The insertion function just copies the BT field into the BA field,
   and the extraction function just checks that the fields are the
   same.  */

static uint32 extract_bat(uint32 insn, bool *invalid)
{
	if (invalid != NULL && ((insn >> 21) & 0x1f) != ((insn >> 16) & 0x1f)) *invalid = 1;
	return 0;
}

/* The BB field in an XL form instruction when it must be the same as
   the BA field in the same instruction.  This operand is marked FAKE.
   The insertion function just copies the BA field into the BB field,
   and the extraction function just checks that the fields are the
   same.  */

static uint32 extract_bba(uint32 insn, bool *invalid)
{
	if (invalid != NULL && ((insn >> 16) & 0x1f) != ((insn >> 11) & 0x1f)) *invalid = 1;
	return 0;
}

/* The BD field in a B form instruction.  The lower two bits are
   forced to zero.  */


static uint32 extract_bd(uint32 insn, bool *invalid)
{
	if ((insn & 0x8000) != 0) {
		return (insn & 0xfffc) - 0x10000;
	} else {
		return insn & 0xfffc;
	}
}

/* The BD field in a B form instruction when the - modifier is used.
   This modifier means that the branch is not expected to be taken.
   For chips built to versions of the architecture prior to version 2
   (ie. not Power4 compatible), we set the y bit of the BO field to 1
   if the offset is negative.  When extracting, we require that the y
   bit be 1 and that the offset be positive, since if the y bit is 0
   we just want to print the normal form of the instruction.
   Power4 compatible targets use two bits, "a", and "t", instead of
   the "y" bit.  "at" == 00 => no hint, "at" == 01 => unpredictable,
   "at" == 10 => not taken, "at" == 11 => taken.  The "t" bit is 00001
   in BO field, the "a" bit is 00010 for branch on CR(BI) and 01000
   for branch on CTR.  We only handle the taken/not-taken hint here.  */

static uint32 extract_bdm(uint32 insn, bool *invalid)
{
	if (invalid) {
		if ((insn & (0x17 << 21)) != (0x06 << 21)
		 && (insn & (0x1d << 21)) != (0x18 << 21))
			*invalid = true;
	}
	return ((insn & 0xfffc) ^ 0x8000) - 0x8000;
}

/* The BD field in a B form instruction when the + modifier is used.
   This is like BDM, above, except that the branch is expected to be
   taken.  */

static uint32 extract_bdp(uint32 insn, bool *invalid)
{
	if (invalid) {
		if ((insn & (0x17 << 21)) != (0x07 << 21)
		&& (insn & (0x1d << 21)) != (0x19 << 21))
			*invalid = true;
	}
	return ((insn & 0xfffc) ^ 0x8000) - 0x8000;
}

/* Check for legal values of a BO field.  */

static bool valid_bo(uint32 value)
{
	/* Certain encodings have bits that are required to be zero.
	   These are (z must be zero, a & t may be anything):
		0000z
		0001z
		0100z
		0101z
		001at
		011at
		1a00t
		1a01t
		1z1zz
	*/
	switch (value & 0x14) {
		case 0:
			return (value & 1) == 0;
		case 0x4:
		case 0x10:
			return true;
		case 0x14:
			return value == 0x14;
	}
	return false;
}

/* The BO field in a B form instruction.  Warn about attempts to set
   the field to an illegal value.  */

static uint32 extract_bo(uint32 insn, bool *invalid)
{
	uint32 value;

	value = (insn >> 21) & 0x1f;
	if (invalid != NULL && !valid_bo(value))
		*invalid = true;
	return value;
}

/* The BO field in a B form instruction when the + or - modifier is
   used.  This is like the BO field, but it must be even.  When
   extracting it, we force it to be even.  */
   
static uint32 extract_boe(uint32 insn, bool *invalid)
{
	uint32 value;

	value = (insn >> 21) & 0x1f;
	if (invalid != NULL && !valid_bo(value)) *invalid = true;
	return value & 0x1e;
}

/* The DS field in a DS form instruction.  This is like D, but the
   lower two bits are forced to zero.  */

static uint32 extract_ds(uint32 insn, bool *invalid)
{
	if ((insn & 0x8000) != 0) {
		return (insn & 0xfffc) - 0x10000;
	} else {
		return insn & 0xfffc;
	}
}

/* The DE field in a DE form instruction.  */

static uint32 extract_de(uint32 insn, bool *invalid)
{
	return (insn & 0xfff0) >> 4;
}

/* The DES field in a DES form instruction.  */

static uint32 extract_des(uint32 insn, bool *invalid)
{
	return (((insn >> 2) & 0x3ffc) ^ 0x2000) - 0x2000;
}

/* The DQ field in a DQ form instruction.  This is like D, but the
   lower four bits are forced to zero. */

static uint32 extract_dq(uint32 insn, bool *invalid)
{
	return ((insn & 0xfff0) ^ 0x8000) - 0x8000;
}

/* The LI field in an I form instruction.  The lower two bits are
   forced to zero.  */

static uint32 extract_li(uint32 insn, bool *invalid)
{
	if ((insn & 0x2000000) != 0) {
		return (insn & 0x3fffffc) - 0x4000000;
	} else {
		return insn & 0x3fffffc;
	}
}

/* The MB and ME fields in an M form instruction expressed as a single
   operand which is itself a bitmask.  The extraction function always
   marks it as invalid, since we never want to recognize an
   instruction which uses a field of this type.  */

static uint32 extract_mbe(uint32 insn, bool *invalid)
{
	uint32 ret;
	int mb, me;
	int i;

	if (invalid != NULL) *invalid = 1;

	ret = 0;
	mb = (insn >> 6) & 0x1f;
	me = (insn >> 1) & 0x1f;
	for (i = mb; i < me; i++) ret |= 1 << (31 - i);
	return ret;
}

static uint32 extract_mbe_special1(uint32 insn, bool *invalid)
{
	// slwi
	if (invalid) {
		int sh = (insn >> 11) & 0x1f;
		int mb = (insn >> 6) & 0x1f;
		int me = (insn >> 1) & 0x1f;
		*invalid = !(mb == 0 && me == 31-sh);
	}
	return 0;
}

static uint32 extract_mbe_special2(uint32 insn, bool *invalid)
{
	// srwi
	if (invalid) {
		int sh = (insn >> 11) & 0x1f;
		int mb = (insn >> 6) & 0x1f;
		int me = (insn >> 1) & 0x1f;
		*invalid = !(sh == 32-mb && me == 31);
	}
	return 0;
}

/* The MB or ME field in an MD or MDS form instruction.  The high bit
   is wrapped to the low end.  */


static uint32 extract_mb6(uint32 insn, bool *invalid)
{
	return ((insn >> 6) & 0x1f) | (insn & 0x20);
}

/* The NB field in an X form instruction.  The value 32 is stored as
   0.  */


static uint32 extract_nb(uint32 insn, bool *invalid)
{
	uint32 ret;

	ret = (insn >> 11) & 0x1f;
	if (ret == 0) ret = 32;
	return ret;
}

/* The NSI field in a D form instruction.  This is the same as the SI
   field, only negated.  The extraction function always marks it as
   invalid, since we never want to recognize an instruction which uses
   a field of this type.  */

static uint32 extract_nsi(uint32 insn, bool *invalid)
{
	if (invalid != NULL) *invalid = 1;
	if ((insn & 0x8000) != 0) {
		return - ((insn & 0xffff) - 0x10000);
	} else {
		return - (insn & 0xffff);
	}
}

/* The RA field in a D or X form instruction which is an updating
   load, which means that the RA field may not be zero and may not
   equal the RT field.  */

/* The RB field in an X form instruction when it must be the same as
   the RS field in the instruction.  This is used for extended
   mnemonics like mr.  This operand is marked FAKE.  The insertion
   function just copies the BT field into the BA field, and the
   extraction function just checks that the fields are the same.  */

static uint32 extract_rbs(uint32 insn, bool *invalid)
{
  if (invalid != NULL
	 && ((insn >> 21) & 0x1f) != ((insn >> 11) & 0x1f))
    *invalid = true;
  return 0;
}

static uint32 extract_vab(uint32 insn, bool *invalid)
{
  if (invalid != NULL
	 && ((insn >> 16) & 0x1f) != ((insn >> 11) & 0x1f))
    *invalid = true;
  return 0;
}

/* The SH field in an MD form instruction.  This is split.  */

static uint32 extract_sh6(uint32 insn, bool *invalid)
{
  return ((insn >> 11) & 0x1f) | ((insn << 4) & 0x20);
}

/* The SPR field in an XFX form instruction.  This is flipped--the
   lower 5 bits are stored in the upper 5 and vice- versa.  */

static uint32 extract_spr(uint32 insn, bool *invalid)
{
  return ((insn >> 16) & 0x1f) | ((insn >> 6) & 0x3e0);
}

/* The TBR field in an XFX instruction.  This is just like SPR, but it
   is optional.  When TBR is omitted, it must be inserted as 268 (the
   magic number of the TB register).  These functions treat 0
   (indicating an omitted optional operand) as 268.  This means that
   ``mftb 4,0'' is not handled correctly.  This does not matter very
   much, since the architecture manual does not define mftb as
   accepting any values other than 268 or 269.  */

#define TB (268)

static uint32 extract_tbr(uint32 insn, bool *invalid)
{