ia64opc.h

功能较全面的反汇编器：反汇编器ht-2.0.15.tar.gz

/*
 *	HT Editor
 *	ia64opc.h
 *
 *	Copyright (C) 1999-2002 Sebastian Biallas ([e-mail])
 *
 *	This program is free software; you can redistribute it and/or modify
 *	it under the terms of the GNU General Public License version 2 as
 *	published by the Free Software Foundation.
 *
 *	This program is distributed in the hope that it will be useful,
 *	but WITHOUT ANY WARRANTY; without even the implied warranty of
 *	MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 *	GNU General Public License for more details.
 *
 *	You should have received a copy of the GNU General Public License
 *	along with this program; if not, write to the Free Software
 *	Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
 */

#ifndef IA64OPC_H
#define IA64OPC_H

#include "io/types.h"

#define IA64_SLOT_INVALID 0x00
#define IA64_SLOT_M_UNIT  0x01
#define IA64_SLOT_I_UNIT  0x02
#define IA64_SLOT_L_UNIT  0x03
#define IA64_SLOT_X_UNIT  0x04
#define IA64_SLOT_F_UNIT  0x05
#define IA64_SLOT_B_UNIT  0x06

#define IA64_INST_ROLE_INT   0x00
#define IA64_INST_ROLE_MEM   0x10
#define IA64_INST_ROLE_FP    0x20
#define IA64_INST_ROLE_BR    0x30
#define IA64_INST_ROLE_LONG  0x40
#define IA64_INST_ROLE_COUNT 5

enum IA64EnumOpcode1 {
	IA64_OPCODE_INST_NONE = 0,
	IA64_OPCODE_ILLOP = IA64_OPCODE_INST_NONE,
	IA64_OPCODE_IGNOP,
	IA64_OPCODE_ADD_R1_R2_R3,
	IA64_OPCODE_ADD_R1_R2_R3_1,
	IA64_OPCODE_SUB_R1_R2_R3,
	IA64_OPCODE_SUB_R1_R2_R3_1,
	IA64_OPCODE_ADDP4_R1_R2_R3,
	IA64_OPCODE_AND_R1_R2_R3,
	IA64_OPCODE_ANDCM_R1_R2_R3,
	IA64_OPCODE_OR_R1_R2_R3,
	IA64_OPCODE_XOR_R1_R2_R3,
	IA64_OPCODE_SHLADD_R1_R2_COUNT2_R3,
	IA64_OPCODE_SHLADDP4_R1_R2_COUNT2_R3,
	IA64_OPCODE_SUB_R1_IMM8_R3,
	IA64_OPCODE_AND_R1_IMM8_R3,
	IA64_OPCODE_ANDCM_R1_IMM8_R3,
	IA64_OPCODE_OR_R1_IMM8_R3,
	IA64_OPCODE_XOR_R1_IMM8_R3,
	IA64_OPCODE_ADDS_R1_IMM14_R3,
	IA64_OPCODE_ADDP4_R1_IMM14_R3,
	IA64_OPCODE_ADDL_R1_IMM22_R3,
	IA64_OPCODE_CMP_LT_P1_P2_R2_R3,
	IA64_OPCODE_CMP_LTU_P1_P2_R2_R3,
	IA64_OPCODE_CMP_EQ_P1_P2_R2_R3,
	IA64_OPCODE_CMP_LT_UNC_P1_P2_R2_R3,
	IA64_OPCODE_CMP_LTU_UNC_P1_P2_R2_R3,
	IA64_OPCODE_CMP_EQ_UNC_P1_P2_R2_R3,
	IA64_OPCODE_CMP_EQ_AND_P1_P2_R2_R3,
	IA64_OPCODE_CMP_EQ_OR_P1_P2_R2_R3,
	IA64_OPCODE_CMP_EQ_OR_ANDCM_P1_P2_R2_R3,
	IA64_OPCODE_CMP_NE_AND_P1_P2_R2_R3,
	IA64_OPCODE_CMP_NE_OR_P1_P2_R2_R3,
	IA64_OPCODE_CMP_NE_OR_ANDCM_P1_P2_R2_R3,
	IA64_OPCODE_CMP4_LT_P1_P2_R2_R3,
	IA64_OPCODE_CMP4_LTU_P1_P2_R2_R3,
	IA64_OPCODE_CMP4_EQ_P1_P2_R2_R3,
	IA64_OPCODE_CMP4_LT_UNC_P1_P2_R2_R3,
	IA64_OPCODE_CMP4_LTU_UNC_P1_P2_R2_R3,
	IA64_OPCODE_CMP4_EQ_UNC_P1_P2_R2_R3,
	IA64_OPCODE_CMP4_EQ_AND_P1_P2_R2_R3,
	IA64_OPCODE_CMP4_EQ_OR_P1_P2_R2_R3,
	IA64_OPCODE_CMP4_EQ_OR_ANDCM_P1_P2_R2_R3,
	IA64_OPCODE_CMP4_NE_AND_P1_P2_R2_R3,
	IA64_OPCODE_CMP4_NE_OR_P1_P2_R2_R3,
	IA64_OPCODE_CMP4_NE_OR_ANDCM_P1_P2_R2_R3,
	IA64_OPCODE_CMP_GT_AND_P1_P2_R0_R3,
	IA64_OPCODE_CMP_GT_OR_P1_P2_R0_R3,
	IA64_OPCODE_CMP_GT_OR_ANDCM_P1_P2_R0_R3,
	IA64_OPCODE_CMP_LE_AND_P1_P2_R0_R3,
	IA64_OPCODE_CMP_LE_OR_P1_P2_R0_R3,
	IA64_OPCODE_CMP_LE_OR_ANDCM_P1_P2_R0_R3,
	IA64_OPCODE_CMP_GE_AND_P1_P2_R0_R3,
	IA64_OPCODE_CMP_GE_OR_P1_P2_R0_R3,
	IA64_OPCODE_CMP_GE_OR_ANDCM_P1_P2_R0_R3,
	IA64_OPCODE_CMP_LT_AND_P1_P2_R0_R3,
	IA64_OPCODE_CMP_LT_OR_P1_P2_R0_R3,
	IA64_OPCODE_CMP_LT_OR_ANDCM_P1_P2_R0_R3,
	IA64_OPCODE_CMP4_GT_AND_P1_P2_R0_R3,
	IA64_OPCODE_CMP4_GT_OR_P1_P2_R0_R3,
	IA64_OPCODE_CMP4_GT_OR_ANDCM_P1_P2_R0_R3,
	IA64_OPCODE_CMP4_LE_AND_P1_P2_R0_R3,
	IA64_OPCODE_CMP4_LE_OR_P1_P2_R0_R3,
	IA64_OPCODE_CMP4_LE_OR_ANDCM_P1_P2_R0_R3,
	IA64_OPCODE_CMP4_GE_AND_P1_P2_R0_R3,
	IA64_OPCODE_CMP4_GE_OR_P1_P2_R0_R3,
	IA64_OPCODE_CMP4_GE_OR_ANDCM_P1_P2_R0_R3,
	IA64_OPCODE_CMP4_LT_AND_P1_P2_R0_R3,
	IA64_OPCODE_CMP4_LT_OR_P1_P2_R0_R3,
	IA64_OPCODE_CMP4_LT_OR_ANDCM_P1_P2_R0_R3,
	IA64_OPCODE_CMP_LT_P1_P2_IMM8_R3,
	IA64_OPCODE_CMP_LTU_P1_P2_IMM8_R3,
	IA64_OPCODE_CMP_EQ_P1_P2_IMM8_R3,
	IA64_OPCODE_CMP_LT_UNC_P1_P2_IMM8_R3,
	IA64_OPCODE_CMP_LTU_UNC_P1_P2_IMM8_R3,
	IA64_OPCODE_CMP_EQ_UNC_P1_P2_IMM8_R3,
	IA64_OPCODE_CMP_EQ_AND_P1_P2_IMM8_R3,
	IA64_OPCODE_CMP_EQ_OR_P1_P2_IMM8_R3,
	IA64_OPCODE_CMP_EQ_OR_ANDCM_P1_P2_IMM8_R3,
	IA64_OPCODE_CMP_NE_AND_P1_P2_IMM8_R3,
	IA64_OPCODE_CMP_NE_OR_P1_P2_IMM8_R3,
	IA64_OPCODE_CMP_NE_OR_ANDCM_P1_P2_IMM8_R3,
	IA64_OPCODE_CMP4_LT_P1_P2_IMM8_R3,
	IA64_OPCODE_CMP4_LTU_P1_P2_IMM8_R3,
	IA64_OPCODE_CMP4_EQ_P1_P2_IMM8_R3,
	IA64_OPCODE_CMP4_LT_UNC_P1_P2_IMM8_R3,
	IA64_OPCODE_CMP4_LTU_UNC_P1_P2_IMM8_R3,
	IA64_OPCODE_CMP4_EQ_UNC_P1_P2_IMM8_R3,
	IA64_OPCODE_CMP4_EQ_AND_P1_P2_IMM8_R3,
	IA64_OPCODE_CMP4_EQ_OR_P1_P2_IMM8_R3,
	IA64_OPCODE_CMP4_EQ_OR_ANDCM_P1_P2_IMM8_R3,
	IA64_OPCODE_CMP4_NE_AND_P1_P2_IMM8_R3,
	IA64_OPCODE_CMP4_NE_OR_P1_P2_IMM8_R3,
	IA64_OPCODE_CMP4_NE_OR_ANDCM_P1_P2_IMM8_R3,
	IA64_OPCODE_PADD1_R1_R2_R3,
	IA64_OPCODE_PADD2_R1_R2_R3,
	IA64_OPCODE_PADD4_R1_R2_R3,
	IA64_OPCODE_PADD1_SSS_R1_R2_R3,
	IA64_OPCODE_PADD2_SSS_R1_R2_R3,
	IA64_OPCODE_PADD1_UUU_R1_R2_R3,
	IA64_OPCODE_PADD2_UUU_R1_R2_R3,
	IA64_OPCODE_PADD1_UUS_R1_R2_R3,
	IA64_OPCODE_PADD2_UUS_R1_R2_R3,
	IA64_OPCODE_PSUB1_R1_R2_R3,
	IA64_OPCODE_PSUB2_R1_R2_R3,
	IA64_OPCODE_PSUB4_R1_R2_R3,
	IA64_OPCODE_PSUB1_SSS_R1_R2_R3,
	IA64_OPCODE_PSUB2_SSS_R1_R2_R3,
	IA64_OPCODE_PSUB1_UUU_R1_R2_R3,
	IA64_OPCODE_PSUB2_UUU_R1_R2_R3,
	IA64_OPCODE_PSUB1_UUS_R1_R2_R3,
	IA64_OPCODE_PSUB2_UUS_R1_R2_R3,
	IA64_OPCODE_PAVG1_R1_R2_R3,
	IA64_OPCODE_PAVG2_R1_R2_R3,
	IA64_OPCODE_PAVG1_RAZ_R1_R2_R3,
	IA64_OPCODE_PAVG2_RAZ_R1_R2_R3,
	IA64_OPCODE_PAVGSUB1_R1_R2_R3,
	IA64_OPCODE_PAVGSUB2_R1_R2_R3,
	IA64_OPCODE_PCMP1_EQ_R1_R2_R3,
	IA64_OPCODE_PCMP2_EQ_R1_R2_R3,
	IA64_OPCODE_PCMP4_EQ_R1_R2_R3,
	IA64_OPCODE_PCMP1_GT_R1_R2_R3,
	IA64_OPCODE_PCMP2_GT_R1_R2_R3,
	IA64_OPCODE_PCMP4_GT_R1_R2_R3,
	IA64_OPCODE_PSHLADD2_R1_R2_COUNT2_R3,
	IA64_OPCODE_PSHRADD2_R1_R2_COUNT2_R3,
	IA64_OPCODE_PMPYSHR2_R1_R2_R3_COUNT2,
	IA64_OPCODE_PMPYSHR2_U_R1_R2_R3_COUNT2,
	IA64_OPCODE_PMPY2_R_R1_R2_R3,
	IA64_OPCODE_PMPY2_L_R1_R2_R3,
	IA64_OPCODE_MIX1_R_R1_R2_R3,
	IA64_OPCODE_MIX2_R_R1_R2_R3,
	IA64_OPCODE_MIX4_R_R1_R2_R3,
	IA64_OPCODE_MIX1_L_R1_R2_R3,
	IA64_OPCODE_MIX2_L_R1_R2_R3,
	IA64_OPCODE_MIX4_L_R1_R2_R3,
	IA64_OPCODE_PACK2_USS_R1_R2_R3,
	IA64_OPCODE_PACK2_SSS_R1_R2_R3,
	IA64_OPCODE_PACK4_SSS_R1_R2_R3,
	IA64_OPCODE_UNPACK1_H_R1_R2_R3,
	IA64_OPCODE_UNPACK2_H_R1_R2_R3,
	IA64_OPCODE_UNPACK4_H_R1_R2_R3,
	IA64_OPCODE_UNPACK1_L_R1_R2_R3,
	IA64_OPCODE_UNPACK2_L_R1_R2_R3,
	IA64_OPCODE_UNPACK4_L_R1_R2_R3,
	IA64_OPCODE_PMIN1_U_R1_R2_R3,
	IA64_OPCODE_PMAX1_U_R1_R2_R3,
	IA64_OPCODE_PMIN2_R1_R2_R3,
	IA64_OPCODE_PMAX2_R1_R2_R3,
	IA64_OPCODE_PSAD1_R1_R2_R3,
	IA64_OPCODE_MUX1_R1_R2_MBTYPE4,
	IA64_OPCODE_MUX2_R1_R2_MHTYPE8,
	IA64_OPCODE_PSHR2_R1_R3_R2,
	IA64_OPCODE_PSHR4_R1_R3_R2,
	IA64_OPCODE_SHR_R1_R3_R2,
	IA64_OPCODE_PSHR2_U_R1_R3_R2,
	IA64_OPCODE_PSHR4_U_R1_R3_R2,
	IA64_OPCODE_SHR_U_R1_R3_R2,
	IA64_OPCODE_PSHR2_R1_R3_COUNT5,
	IA64_OPCODE_PSHR4_R1_R3_COUNT5,
	IA64_OPCODE_PSHR2_U_R1_R3_COUNT5,
	IA64_OPCODE_PSHR4_U_R1_R3_COUNT5,
	IA64_OPCODE_PSHL2_R1_R2_R3,
	IA64_OPCODE_PSHL4_R1_R2_R3,
	IA64_OPCODE_SHL_R1_R2_R3,
	IA64_OPCODE_PSHL2_R1_R2_COUNT5,
	IA64_OPCODE_PSHL4_R1_R2_COUNT5,
	IA64_OPCODE_POPCNT_R1_R3,
	IA64_OPCODE_SHRP_R1_R2_R3_COUNT6,
	IA64_OPCODE_EXTR_U_R1_R3_POS6_LEN6,
	IA64_OPCODE_EXTR_R1_R3_POS6_LEN6,
	IA64_OPCODE_DEP_Z_R1_R2_POS6_LEN6,
	IA64_OPCODE_DEP_Z_R1_IMM8_POS6_LEN6,
	IA64_OPCODE_DEP_R1_IMM1_R3_POS6_LEN6,
	IA64_OPCODE_DEP_R1_R2_R3_POS6_LEN4,
	IA64_OPCODE_TBIT_Z_P1_P2_R3_POS6,
	IA64_OPCODE_TBIT_Z_UNC_P1_P2_R3_POS6,
	IA64_OPCODE_TBIT_Z_AND_P1_P2_R3_POS6,
	IA64_OPCODE_TBIT_NZ_AND_P1_P2_R3_POS6,
	IA64_OPCODE_TBIT_Z_OR_P1_P2_R3_POS6,
	IA64_OPCODE_TBIT_NZ_OR_P1_P2_R3_POS6,
	IA64_OPCODE_TBIT_Z_OR_ANDCM_P1_P2_R3_POS6,
	IA64_OPCODE_TBIT_NZ_OR_ANDCM_P1_P2_R3_POS6,
	IA64_OPCODE_TNAT_Z_P1_P2_R3,
	IA64_OPCODE_TNAT_Z_UNC_P1_P2_R3,
	IA64_OPCODE_TNAT_Z_AND_P1_P2_R3,
	IA64_OPCODE_TNAT_NZ_AND_P1_P2_R3,
	IA64_OPCODE_TNAT_Z_OR_P1_P2_R3,
	IA64_OPCODE_TNAT_NZ_OR_P1_P2_R3,
	IA64_OPCODE_TNAT_Z_OR_ANDCM_P1_P2_R3,
	IA64_OPCODE_TNAT_NZ_OR_ANDCM_P1_P2_R3,
	IA64_OPCODE_BREAK_I_IMM21,
	IA64_OPCODE_NOP_I_IMM21,
	IA64_OPCODE_CHK_S_I_R2_TARGET25,
	IA64_OPCODE_MOV_SPTK_B1_R2_TAG13,
	IA64_OPCODE_MOV_SPTK_IMP_B1_R2_TAG13,
	IA64_OPCODE_MOV_B1_R2_TAG13,
	IA64_OPCODE_MOV_IMP_B1_R2_TAG13,
	IA64_OPCODE_MOV_DPTK_B1_R2_TAG13,
	IA64_OPCODE_MOV_DPTK_IMP_B1_R2_TAG13,
	IA64_OPCODE_MOV_RET_SPTK_B1_R2_TAG13,
	IA64_OPCODE_MOV_RET_SPTK_IMP_B1_R2_TAG13,
	IA64_OPCODE_MOV_RET_B1_R2_TAG13,
	IA64_OPCODE_MOV_RET_IMP_B1_R2_TAG13,
	IA64_OPCODE_MOV_RET_DPTK_B1_R2_TAG13,
	IA64_OPCODE_MOV_RET_DPTK_IMP_B1_R2_TAG13,
	IA64_OPCODE_MOV_R1_B2,
	IA64_OPCODE_MOV_PR_R2_MASK17,
	IA64_OPCODE_MOV_PR_ROT_IMM44,
	IA64_OPCODE_MOV_R1_IP,
	IA64_OPCODE_MOV_R1_PR,
	IA64_OPCODE_MOV_I_AR3_R2,
	IA64_OPCODE_MOV_I_AR3_IMM8,
	IA64_OPCODE_MOV_I_R1_AR3,
	IA64_OPCODE_ZXT1_R1_R3,
	IA64_OPCODE_ZXT2_R1_R3,
	IA64_OPCODE_ZXT4_R1_R3,
	IA64_OPCODE_SXT1_R1_R3,
	IA64_OPCODE_SXT2_R1_R3,
	IA64_OPCODE_SXT4_R1_R3,
	IA64_OPCODE_CZX1_L_R1_R3,
	IA64_OPCODE_CZX2_L_R1_R3,
	IA64_OPCODE_CZX1_R_R1_R3,
	IA64_OPCODE_CZX2_R_R1_R3,
	IA64_OPCODE_LD1_R1_R3,
	IA64_OPCODE_LD1_NT1_R1_R3,
	IA64_OPCODE_LD1_NTA_R1_R3,
	IA64_OPCODE_LD2_R1_R3,
	IA64_OPCODE_LD2_NT1_R1_R3,
	IA64_OPCODE_LD2_NTA_R1_R3,
	IA64_OPCODE_LD4_R1_R3,
	IA64_OPCODE_LD4_NT1_R1_R3,
	IA64_OPCODE_LD4_NTA_R1_R3,
	IA64_OPCODE_LD8_R1_R3,
	IA64_OPCODE_LD8_NT1_R1_R3,
	IA64_OPCODE_LD8_NTA_R1_R3,
	IA64_OPCODE_LD1_S_R1_R3,
	IA64_OPCODE_LD1_S_NT1_R1_R3,
	IA64_OPCODE_LD1_S_NTA_R1_R3,
	IA64_OPCODE_LD2_S_R1_R3,
	IA64_OPCODE_LD2_S_NT1_R1_R3,
	IA64_OPCODE_LD2_S_NTA_R1_R3,
	IA64_OPCODE_LD4_S_R1_R3,
	IA64_OPCODE_LD4_S_NT1_R1_R3,
	IA64_OPCODE_LD4_S_NTA_R1_R3,
	IA64_OPCODE_LD8_S_R1_R3,
	IA64_OPCODE_LD8_S_NT1_R1_R3,
	IA64_OPCODE_LD8_S_NTA_R1_R3,
	IA64_OPCODE_LD1_A_R1_R3,
	IA64_OPCODE_LD1_A_NT1_R1_R3,
	IA64_OPCODE_LD1_A_NTA_R1_R3,
	IA64_OPCODE_LD2_A_R1_R3,
	IA64_OPCODE_LD2_A_NT1_R1_R3,
	IA64_OPCODE_LD2_A_NTA_R1_R3,
	IA64_OPCODE_LD4_A_R1_R3,
	IA64_OPCODE_LD4_A_NT1_R1_R3,
	IA64_OPCODE_LD4_A_NTA_R1_R3,
	IA64_OPCODE_LD8_A_R1_R3,
	IA64_OPCODE_LD8_A_NT1_R1_R3,
	IA64_OPCODE_LD8_A_NTA_R1_R3,
	IA64_OPCODE_LD1_SA_R1_R3,
	IA64_OPCODE_LD1_SA_NT1_R1_R3,
	IA64_OPCODE_LD1_SA_NTA_R1_R3,
	IA64_OPCODE_LD2_SA_R1_R3,
	IA64_OPCODE_LD2_SA_NT1_R1_R3,
	IA64_OPCODE_LD2_SA_NTA_R1_R3,
	IA64_OPCODE_LD4_SA_R1_R3,
	IA64_OPCODE_LD4_SA_NT1_R1_R3,
	IA64_OPCODE_LD4_SA_NTA_R1_R3,
	IA64_OPCODE_LD8_SA_R1_R3,
	IA64_OPCODE_LD8_SA_NT1_R1_R3,
	IA64_OPCODE_LD8_SA_NTA_R1_R3,
	IA64_OPCODE_LD1_BIAS_R1_R3,
	IA64_OPCODE_LD1_BIAS_NT1_R1_R3,
	IA64_OPCODE_LD1_BIAS_NTA_R1_R3,
	IA64_OPCODE_LD2_BIAS_R1_R3,
	IA64_OPCODE_LD2_BIAS_NT1_R1_R3,
	IA64_OPCODE_LD2_BIAS_NTA_R1_R3,
	IA64_OPCODE_LD4_BIAS_R1_R3,
	IA64_OPCODE_LD4_BIAS_NT1_R1_R3,
	IA64_OPCODE_LD4_BIAS_NTA_R1_R3,
	IA64_OPCODE_LD8_BIAS_R1_R3,
	IA64_OPCODE_LD8_BIAS_NT1_R1_R3,
	IA64_OPCODE_LD8_BIAS_NTA_R1_R3,
	IA64_OPCODE_LD1_ACQ_R1_R3,
	IA64_OPCODE_LD1_ACQ_NT1_R1_R3,
	IA64_OPCODE_LD1_ACQ_NTA_R1_R3,
	IA64_OPCODE_LD2_ACQ_R1_R3,
	IA64_OPCODE_LD2_ACQ_NT1_R1_R3,
	IA64_OPCODE_LD2_ACQ_NTA_R1_R3,
	IA64_OPCODE_LD4_ACQ_R1_R3,
	IA64_OPCODE_LD4_ACQ_NT1_R1_R3,
	IA64_OPCODE_LD4_ACQ_NTA_R1_R3,
	IA64_OPCODE_LD8_ACQ_R1_R3,
	IA64_OPCODE_LD8_ACQ_NT1_R1_R3,
	IA64_OPCODE_LD8_ACQ_NTA_R1_R3,
	IA64_OPCODE_LD8_FILL_R1_R3,
	IA64_OPCODE_LD8_FILL_NT1_R1_R3,
	IA64_OPCODE_LD8_FILL_NTA_R1_R3,
	IA64_OPCODE_LD1_C_CLR_R1_R3,
	IA64_OPCODE_LD1_C_CLR_NT1_R1_R3,
	IA64_OPCODE_LD1_C_CLR_NTA_R1_R3,
	IA64_OPCODE_LD2_C_CLR_R1_R3,
	IA64_OPCODE_LD2_C_CLR_NT1_R1_R3,
	IA64_OPCODE_LD2_C_CLR_NTA_R1_R3,
	IA64_OPCODE_LD4_C_CLR_R1_R3,
	IA64_OPCODE_LD4_C_CLR_NT1_R1_R3,
	IA64_OPCODE_LD4_C_CLR_NTA_R1_R3,
	IA64_OPCODE_LD8_C_CLR_R1_R3,
	IA64_OPCODE_LD8_C_CLR_NT1_R1_R3,
	IA64_OPCODE_LD8_C_CLR_NTA_R1_R3,
	IA64_OPCODE_LD1_C_NC_R1_R3,
	IA64_OPCODE_LD1_C_NC_NT1_R1_R3,
	IA64_OPCODE_LD1_C_NC_NTA_R1_R3,
	IA64_OPCODE_LD2_C_NC_R1_R3,
	IA64_OPCODE_LD2_C_NC_NT1_R1_R3,
	IA64_OPCODE_LD2_C_NC_NTA_R1_R3,
	IA64_OPCODE_LD4_C_NC_R1_R3,
	IA64_OPCODE_LD4_C_NC_NT1_R1_R3,
	IA64_OPCODE_LD4_C_NC_NTA_R1_R3,
	IA64_OPCODE_LD8_C_NC_R1_R3,
	IA64_OPCODE_LD8_C_NC_NT1_R1_R3,
	IA64_OPCODE_LD8_C_NC_NTA_R1_R3,
	IA64_OPCODE_LD1_C_CLR_ACQ_R1_R3,
	IA64_OPCODE_LD1_C_CLR_ACQ_NT1_R1_R3,
	IA64_OPCODE_LD1_C_CLR_ACQ_NTA_R1_R3,
	IA64_OPCODE_LD2_C_CLR_ACQ_R1_R3,
	IA64_OPCODE_LD2_C_CLR_ACQ_NT1_R1_R3,
	IA64_OPCODE_LD2_C_CLR_ACQ_NTA_R1_R3,
	IA64_OPCODE_LD4_C_CLR_ACQ_R1_R3,
	IA64_OPCODE_LD4_C_CLR_ACQ_NT1_R1_R3,
	IA64_OPCODE_LD4_C_CLR_ACQ_NTA_R1_R3,
	IA64_OPCODE_LD8_C_CLR_ACQ_R1_R3,
	IA64_OPCODE_LD8_C_CLR_ACQ_NT1_R1_R3,
	IA64_OPCODE_LD8_C_CLR_ACQ_NTA_R1_R3,
	IA64_OPCODE_LD1_R1_R3_R2,
	IA64_OPCODE_LD1_NT1_R1_R3_R2,
	IA64_OPCODE_LD1_NTA_R1_R3_R2,
	IA64_OPCODE_LD2_R1_R3_R2,
	IA64_OPCODE_LD2_NT1_R1_R3_R2,
	IA64_OPCODE_LD2_NTA_R1_R3_R2,
	IA64_OPCODE_LD4_R1_R3_R2,
	IA64_OPCODE_LD4_NT1_R1_R3_R2,
	IA64_OPCODE_LD4_NTA_R1_R3_R2,
	IA64_OPCODE_LD8_R1_R3_R2,
	IA64_OPCODE_LD8_NT1_R1_R3_R2,