uart.lst

AVR编写的串口程序

__start:
__text_start:
    0041 E5CF      LDI	R28,0x5F
    0042 E0D4      LDI	R29,4
    0043 BFCD      OUT	P3D,R28
    0044 BFDE      OUT	P3E,R29
    0045 51C0      SUBI	R28,0x10
    0046 40D0      SBCI	R29,0
    0047 EA0A      LDI	R16,0xAA
    0048 8308      STD	R16,0+Y
    0049 2400      CLR	R0
    004A E6E2      LDI	R30,0x62
    004B E0F0      LDI	R31,0
    004C E010      LDI	R17,0
    004D 36E2      CPI	R30,0x62
    004E 07F1      CPC	R31,R17
    004F F011      BEQ	0x0052
    0050 9201      ST	R0,Z+
    0051 CFFB      RJMP	0x004D
    0052 8300      STD	R16,0+Z
    0053 E8E0      LDI	R30,0x80
    0054 E0F0      LDI	R31,0
    0055 E6A0      LDI	R26,0x60
    0056 E0B0      LDI	R27,0
    0057 E010      LDI	R17,0
    0058 38E2      CPI	R30,0x82
    0059 07F1      CPC	R31,R17
    005A F021      BEQ	0x005F
    005B 95C8      LPM
    005C 9631      ADIW	R30,1
    005D 920D      ST	R0,X+
    005E CFF9      RJMP	0x0058
    005F 940E00E7  CALL	_main
_exit:
    0061 CFFF      RJMP	_exit
_show:
  y                    --> R20
  x                    --> R22
    0062 940E0112  CALL	push_gset2
    0064 2F42      MOV	R20,R18
    0065 2F60      MOV	R22,R16
FILE: D:\chengxu\lesson10_1\uart.c
(0001) #include <iom16v.h>
(0002) #include <macros.h>
(0003) #define  uchar unsigned char
(0004) #define  uint  unsigned int
(0005) 
(0006) #define  mclk   8000000
(0007) #pragma interrupt_handler uart_rx:12
(0008) uchar rdata=1,flag=0;
(0009) #pragma data:code
(0010)    const table[]={0x3f,0x06,0x5b,0x4f,0x66,0x6d,0x7d,0x07,0x7f,0x6f,0x77,0x7c,
(0011)                   0x39,0x5e,0x79,0x71};
(0012) void show(uchar x,uchar y)
(0013)    {DDRA|=0x18;
    0066 B38A      IN	R24,P1A
    0067 6188      ORI	R24,0x18
    0068 BB8A      OUT	P1A,R24
(0014)     DDRB=0xff;
    0069 EF8F      LDI	R24,0xFF
    006A BB87      OUT	P17,R24
(0015)     PORTB=table[x];
    006B E082      LDI	R24,2
    006C 9F86      MUL	R24,R22
    006D 01F0      MOVW	R30,R0
    006E E680      LDI	R24,0x60
    006F E090      LDI	R25,0
    0070 0FE8      ADD	R30,R24
    0071 1FF9      ADC	R31,R25
    0072 9005      LD	R0,R0
    0073 9014      LD	R1,R1
    0074 01F0      MOVW	R30,R0
    0075 BBE8      OUT	P18,R30
(0016) 	PORTA|=BIT(3);
    0076 9ADB      SBI	P1B,3
(0017) 	PORTA&=~BIT(3);
    0077 98DB      CBI	P1B,3
(0018) 	PORTB=0XFF;
    0078 EF8F      LDI	R24,0xFF
    0079 BB88      OUT	P18,R24
(0019) 	PORTB&=~BIT(y);
    007A E001      LDI	R16,1
    007B 2F14      MOV	R17,R20
    007C 940E0129  CALL	lsl8
    007E 2E20      MOV	R2,R16
    007F 9420      COM	R2
    0080 B238      IN	R3,P18
    0081 2032      AND	R3,R2
    0082 BA38      OUT	P18,R3
(0020) 	PORTA|=BIT(4);
    0083 9ADC      SBI	P1B,4
(0021) 	PORTA&=~BIT(4);
    0084 98DC      CBI	P1B,4
(0022) 	delay(1);}
    0085 E001      LDI	R16,1
    0086 E010      LDI	R17,0
    0087 D003      RCALL	_delay
    0088 940E011A  CALL	pop_gset2
    008A 9508      RET
_delay:
  i                    --> R20
  j                    --> R22
  ms                   --> R16
    008B 940E0112  CALL	push_gset2
(0023) void delay(uint ms)
(0024) {
(0025)         uint i,j;
(0026) 	for(i=0;i<ms;i++)
    008D 2744      CLR	R20
    008E 2755      CLR	R21
    008F C00B      RJMP	0x009B
(0027) 	   {
(0028) 	   for(j=0;j<1141;j++);
    0090 2766      CLR	R22
    0091 2777      CLR	R23
    0092 C002      RJMP	0x0095
    0093 5F6F      SUBI	R22,0xFF
    0094 4F7F      SBCI	R23,0xFF
    0095 3765      CPI	R22,0x75
    0096 E0E4      LDI	R30,4
    0097 077E      CPC	R23,R30
    0098 F3D0      BCS	0x0093
    0099 5F4F      SUBI	R20,0xFF
    009A 4F5F      SBCI	R21,0xFF
    009B 1740      CP	R20,R16
    009C 0751      CPC	R21,R17
    009D F390      BCS	0x0090
(0029)        }
(0030) }
    009E 940E011A  CALL	pop_gset2
    00A0 9508      RET
_uart_init:
  baud                 --> R10
    00A1 940E0116  CALL	push_gset3
    00A3 0158      MOVW	R10,R16
(0031) 
(0032) void uart_init(uint baud)
(0033) {
(0034)     UCSRB=0x00; 
    00A4 2422      CLR	R2
    00A5 B82A      OUT	P0A,R2
(0035)    UCSRA=0x00; 		    //控制寄存器清零
    00A6 B82B      OUT	P0B,R2
(0036)    UCSRC=(1<<URSEL)|(0<<UPM0)|(3<<UCSZ0);   
    00A7 E886      LDI	R24,0x86
    00A8 BD80      OUT	P20,R24
(0037)                                                         //选择UCSRC，异步模式，禁止                        
(0038)                                                      //   校验，1位停止位，8位数据位
(0039)    baud=mclk/16/baud-1	;   //波特率最大为65K
    00A9 0115      MOVW	R2,R10
    00AA 2444      CLR	R4
    00AB 2455      CLR	R5
    00AC E240      LDI	R20,0x20
    00AD EA51      LDI	R21,0xA1
    00AE E067      LDI	R22,7
    00AF E070      LDI	R23,0
    00B0 925A      ST	R5,-Y
    00B1 924A      ST	R4,-Y
    00B2 923A      ST	R3,-Y
    00B3 922A      ST	R2,-Y
    00B4 018A      MOVW	R16,R20
    00B5 019B      MOVW	R18,R22
    00B6 940E0162  CALL	div32s
    00B8 E041      LDI	R20,1
    00B9 E050      LDI	R21,0
    00BA E060      LDI	R22,0
    00BB E070      LDI	R23,0
    00BC 0118      MOVW	R2,R16
    00BD 0129      MOVW	R4,R18
    00BE 1A24      SUB	R2,R20
    00BF 0A35      SBC	R3,R21
    00C0 0A46      SBC	R4,R22
    00C1 0A57      SBC	R5,R23
    00C2 0151      MOVW	R10,R2
(0040)    UBRRL=baud; 					     	  
    00C3 B8A9      OUT	P09,R10
(0041)    UBRRH=baud>>8; 		   //设置波特率
    00C4 2C23      MOV	R2,R3
    00C5 2433      CLR	R3
    00C6 BC20      OUT	P20,R2
(0042)    UCSRB=(1<<TXEN)|(1<<RXEN)|(1<<RXCIE); 
    00C7 E988      LDI	R24,0x98
    00C8 B98A      OUT	P0A,R24
(0043)                                                        //接收、发送使能，接收中断使能
(0044)    SREG=BIT(7);	                //全局中断开放
    00C9 E880      LDI	R24,0x80
    00CA BF8F      OUT	P3F,R24
(0045)    DDRD|=0X02;	                //配置TX为输出（很重要）
    00CB 9A89      SBI	P11,1
(0046) 
(0047) }
    00CC 940E011D  CALL	pop_gset3
    00CE 9508      RET
(0048) void uart_sendB(uchar data)
(0049) {
(0050)    while(!(UCSRA&(BIT(UDRE)))) ;
_uart_sendB:
  data                 --> R16
    00CF 9B5D      SBIS	P0B,5
    00D0 CFFE      RJMP	_uart_sendB
(0051)    UDR=data;
    00D1 B90C      OUT	P0C,R16
(0052)    while(!(UCSRA&(BIT(TXC))));
    00D2 9B5E      SBIS	P0B,6
    00D3 CFFE      RJMP	0x00D2
(0053)    UCSRA|=BIT(TXC);
    00D4 9A5E      SBI	P0B,6
(0054) }
    00D5 9508      RET
_uart_rx:
    00D6 922A      ST	R2,-Y
    00D7 938A      ST	R24,-Y
    00D8 B62F      IN	R2,P3F
    00D9 922A      ST	R2,-Y
(0055) void uart_rx()
(0056) {
(0057)     UCSRB&=~BIT(RXCIE);
    00DA 9857      CBI	P0A,7
(0058) 	rdata=UDR;
    00DB B02C      IN	R2,P0C
    00DC 92200060  STS	R2,0x60
(0059) 	flag=1;
    00DE E081      LDI	R24,1
    00DF 93800061  STS	R24,0x61
(0060) 	UCSRB|=BIT(RXCIE);
    00E1 9A57      SBI	P0A,7
(0061) }
    00E2 9029      LD	R2,Y+
    00E3 BE2F      OUT	P3F,R2
    00E4 9189      LD	R24,Y+
    00E5 9029      LD	R2,Y+
    00E6 9518      RETI
(0062) void main()
(0063) {
(0064)     //uchar i=4;
(0065) 	//uchar j='a';
(0066)     uart_init(19200);
_main:
    00E7 E000      LDI	R16,0
    00E8 E41B      LDI	R17,0x4B
    00E9 DFB7      RCALL	_uart_init
    00EA C00E      RJMP	0x00F9
(0067) 	while(1)
(0068) 	{show(rdata,0);
    00EB 2722      CLR	R18
    00EC 91000060  LDS	R16,0x60
    00EE DF73      RCALL	_show
(0069) 	   if(flag)
    00EF 90200061  LDS	R2,0x61
    00F1 2022      TST	R2
    00F2 F031      BEQ	0x00F9
(0070) 	   {
(0071) 	      uart_sendB(rdata);
    00F3 91000060  LDS	R16,0x60
    00F5 DFD9      RCALL	_uart_sendB
(0072) 		  flag=0;
    00F6 2422      CLR	R2
    00F7 92200061  STS	R2,0x61
    00F9 CFF1      RJMP	0x00EB
(0073) 	   }
(0074) 	}
(0075) 	
(0076) }FILE: <library>
    00FA 9508      RET
push_gset1:
    00FB 935A      ST	R21,-Y
    00FC 934A      ST	R20,-Y
    00FD 9508      RET
pop_gset1:
    00FE E0E1      LDI	R30,1
pop:
    00FF 9149      LD	R20,Y+
    0100 9159      LD	R21,Y+
    0101 FDE0      SBRC	R30,0
    0102 9508      RET
    0103 9169      LD	R22,Y+
    0104 9179      LD	R23,Y+
    0105 FDE1      SBRC	R30,1
    0106 9508      RET
    0107 90A9      LD	R10,Y+
    0108 90B9      LD	R11,Y+
    0109 FDE2      SBRC	R30,2
    010A 9508      RET
    010B 90C9      LD	R12,Y+
    010C 90D9      LD	R13,Y+
    010D FDE3      SBRC	R30,3
    010E 9508      RET
    010F 90E9      LD	R14,Y+
    0110 90F9      LD	R15,Y+
    0111 9508      RET
push_gset2:
    0112 937A      ST	R23,-Y
    0113 936A      ST	R22,-Y
    0114 940C00FB  JMP	push_gset1
push_gset3:
    0116 92BA      ST	R11,-Y
    0117 92AA      ST	R10,-Y
    0118 940C0112  JMP	push_gset2
pop_gset2:
    011A E0E2      LDI	R30,2
    011B 940C00FF  JMP	pop
pop_gset3:
    011D E0E4      LDI	R30,4
    011E 940C00FF  JMP	pop
neg32:
    0120 9500      COM	R16
    0121 9510      COM	R17
    0122 9520      COM	R18
    0123 9530      COM	R19
    0124 5F0F      SUBI	R16,0xFF
    0125 4F1F      SBCI	R17,0xFF
    0126 4F2F      SBCI	R18,0xFF
    0127 4F3F      SBCI	R19,0xFF
    0128 9508      RET
lsl8:
    0129 2311      TST	R17
    012A F019      BEQ	0x012E
    012B 0F00      LSL	R16
    012C 951A      DEC	R17
    012D CFFB      RJMP	lsl8
    012E 9508      RET
long_prolog:
    012F 928A      ST	R8,-Y
    0130 929A      ST	R9,-Y
    0131 92AA      ST	R10,-Y
    0132 92BA      ST	R11,-Y
    0133 93EA      ST	R30,-Y
    0134 938A      ST	R24,-Y
    0135 939A      ST	R25,-Y
    0136 93AA      ST	R26,-Y
    0137 93BA      ST	R27,-Y
    0138 8589      LDD	R24,9+Y
    0139 859A      LDD	R25,10+Y
    013A 85AB      LDD	R26,11+Y
    013B 85BC      LDD	R27,12+Y
    013C 9508      RET
long_epilog:
    013D 91B9      LD	R27,Y+
    013E 91A9      LD	R26,Y+
    013F 9199      LD	R25,Y+
    0140 9189      LD	R24,Y+
    0141 91E9      LD	R30,Y+
    0142 90B9      LD	R11,Y+
    0143 90A9      LD	R10,Y+
    0144 9099      LD	R9,Y+
    0145 9089      LD	R8,Y+
    0146 9624      ADIW	R28,4
    0147 9508      RET
tstzero1:
    0148 27EE      CLR	R30
    0149 2BE0      OR	R30,R16
    014A 2BE1      OR	R30,R17
    014B 2BE2      OR	R30,R18
    014C 2BE3      OR	R30,R19
    014D 9508      RET
tstzero2:
    014E 27EE      CLR	R30
    014F 2BE8      OR	R30,R24
    0150 2BE9      OR	R30,R25
    0151 2BEA      OR	R30,R26
    0152 2BEB      OR	R30,R27
    0153 9508      RET
NEGMANT2:
    0154 9580      COM	R24
    0155 9590      COM	R25
    0156 95A0      COM	R26
    0157 95B0      COM	R27
    0158 5F8F      SUBI	R24,0xFF
    0159 4F9F      SBCI	R25,0xFF
    015A 4FAF      SBCI	R26,0xFF
    015B 4FBF      SBCI	R27,0xFF
    015C 9508      RET
    015D 2D08      MOV	R16,R8
    015E 2D19      MOV	R17,R9
    015F 2D2A      MOV	R18,R10
    0160 2D3B      MOV	R19,R11
    0161 9508      RET
div32s:
    0162 940E012F  CALL	long_prolog
    0164 D013      RCALL	SDIV
    0165 940C013D  JMP	long_epilog
div32u:
    0167 940E012F  CALL	long_prolog
    0169 D01B      RCALL	UDIV
    016A 940C013D  JMP	long_epilog
mod32s:
    016C 940E012F  CALL	long_prolog
    016E D009      RCALL	SDIV
    016F DFED      RCALL	0x015D
    0170 940C013D  JMP	long_epilog
mod32u:
    0172 940E012F  CALL	long_prolog
    0174 D010      RCALL	UDIV
    0175 DFE7      RCALL	0x015D
    0176 940C013D  JMP	long_epilog
SDIV:
    0178 2333      TST	R19
    0179 F032      BMI	0x0180
    017A 23BB      TST	R27
    017B F44A      BPL	0x0185
    017C DFD7      RCALL	NEGMANT2
resultneg:
    017D D007      RCALL	UDIV
    017E 940C0120  JMP	neg32
parmneg:
    0180 940E0120  CALL	neg32
    0182 23BB      TST	R27
    0183 F7CA      BPL	0x017D
    0184 DFCF      RCALL	NEGMANT2
UDIV:
    0185 940E014E  CALL	tstzero2
    0187 F0E1      BEQ	0x01A4
    0188 2488      CLR	R8
    0189 2499      CLR	R9
    018A 24AA      CLR	R10
    018B 24BB      CLR	R11
    018C 940E0148  CALL	tstzero1
    018E F0A9      BEQ	0x01A4
    018F E2E0      LDI	R30,0x20
    0190 0F00      LSL	R16
    0191 1F11      ROL	R17
    0192 1F22      ROL	R18
    0193 1F33      ROL	R19
    0194 1C88      ROL	R8
    0195 1C99      ROL	R9
    0196 1CAA      ROL	R10
    0197 1CBB      ROL	R11
    0198 1688      CP	R8,R24
    0199 0699      CPC	R9,R25
    019A 06AA      CPC	R10,R26
    019B 06BB      CPC	R11,R27
    019C F028      BCS	0x01A2
    019D 1A88      SUB	R8,R24
    019E 0A99      SBC	R9,R25
    019F 0AAA      SBC	R10,R26
    01A0 0ABB      SBC	R11,R27
    01A1 9503      INC	R16
    01A2 95EA      DEC	R30
    01A3 F761      BNE	0x0190
    01A4 9508      RET