📄 hardware.lst
字号:
// retf
////////////////////////////////////////////////////////////////////////////////
F_SP_SACM_A2000_Init_:
00009160 40 92 r1=0x0000; // 24MHz, Fcpu=Fosc
00009161 19 D3 13 70 [P_SystemClock]=r1 // Frequency 20MHz
00009163 70 92 r1 = 0x0030 // TimerA CKA=Fosc/2 CKB=1 Tout:off
00009164 19 D3 0B 70 [P_TimerA_Ctrl] = r1 // Initial Timer A
00009166 09 93 00 FD r1 = 0xfd00 // 16K
00009168 19 D3 0A 70 [P_TimerA_Data] = r1
0000916A 09 93 A8 00 r1 = 0x00A8 // Set the DAC Ctrl
0000916C 19 D3 2A 70 [P_DAC_Ctrl] = r1
0000916E 09 93 FF FF r1 = 0xffff
00009170 19 D3 11 70 [P_INT_Clear] = r1 // Clear interrupt occuiped events
00009172 40 92 r1 =0x0000 //
00009173 11 93 A4 01 r1 = [R_InterruptStatus] //
00009175 09 A3 00 20 r1 |= C_FIQ_TMA // Enable Timer A FIQ
// r1 |= 0x0004 //开2Hz中断
//R1 |= C_IRQ4_1KHz
00009177 19 D3 A4 01 [R_InterruptStatus] = r1 //
00009179 19 D3 10 70 [P_INT_Ctrl] = r1 //
0000917B 90 9A RETF
//////////////////////////////////////////////////////////////////
// Function: The partial code of hardware setting of SACM_S480_Initial()
// or F_SACM_S480_Initial:
//////////////////////////////////////////////////////////////////
F_SP_SACM_S480_Init_:
0000917C 40 92 r1 = 0x0000 // 24MHz Fosc
0000917D 19 D3 13 70 [P_SystemClock]=r1 // Initial System Clock
0000917F 70 92 r1=0x0030 // TimerA CKA=Fosc/2 CKB=1 Tout:off
00009180 19 D3 0B 70 [P_TimerA_Ctrl]=r1 // Initial Timer A
//R1 = 0xfd00 // 16K
00009182 09 93 ED FC r1 = 0xfced // 15.625K
00009184 19 D3 0A 70 [P_TimerA_Data]=r1
00009186 09 93 A8 00 r1 = 0x00A8 //
00009188 19 D3 2A 70 [P_DAC_Ctrl] = r1 //
0000918A 09 93 FF FF r1 = 0xffff
0000918C 19 D3 11 70 [P_INT_Clear] = r1 // Clear interrupt occuiped events
0000918E 11 93 A4 01 R1 = [R_InterruptStatus] //
00009190 09 A3 00 20 r1 |= C_FIQ_TMA // Enable Timer A FIQ
//=================================
// r1 |= 0x0004 //开2Hz中断
//=================================
//R1 |= C_IRQ4_1KHz // Enable 1KHz IRQ4 for S480 decoder
00009192 19 D3 A4 01 [R_InterruptStatus] = r1 //
00009194 19 D3 10 70 [P_INT_Ctrl] = r1 //
00009196 90 9A RETF
//////////////////////////////////////////////////////////////////
// Function: The partial code of hardware setting of SACM_S240_Initial()
// or F_SACM_S240_Initial:
//////////////////////////////////////////////////////////////////
F_SP_SACM_S240_Init_:
00009197 60 92 r1=0x0020;
00009198 19 D3 13 70 [P_SystemClock]=r1
0000919A 09 93 A8 00 r1 = 0x00A8; //
0000919C 19 D3 2A 70 [P_DAC_Ctrl]= r1
0000919E 70 92 r1 = 0x0030; // TimerA CKA=Fosc/2 CKB=1 Tout:off
0000919F 19 D3 0B 70 [P_TimerA_Ctrl] = r1;
000091A1 09 93 00 FE r1 = 0xfe00; // 24K
000091A3 19 D3 0A 70 [P_TimerA_Data] = r1;
000091A5 09 93 FF FF r1 = 0xffff
000091A7 19 D3 11 70 [P_INT_Clear] = r1 // Clear interrupt occuiped events
000091A9 11 93 A4 01 r1 = [R_InterruptStatus] //
000091AB 09 A3 00 20 r1 |= C_FIQ_TMA // Enable Timer A FIQ
000091AD 19 D3 A4 01 [R_InterruptStatus] = r1 //
000091AF 19 D3 10 70 [P_INT_Ctrl] = r1 //
000091B1 90 9A RETF
//////////////////////////////////////////////////////////////////
// Function: The partial code of hardware setting of SACM_MS01_Initial()
// or F_SACM_MS01_Initial:
//
// Ex: F_SACM_MS01_Initial:
// ...
// call F_SP_SACM_MS01_Init_
// call F_SP_Play_Mode0/1/2/3 ->0,1,2,3 depending on the para1
// ...
// retf
//////////////////////////////////////////////////////////////////
F_SP_SACM_MS01_Init_:
000091B2 40 92 r1 = 0x0000; // 24MHz, Fcpu=Fosc
000091B3 19 D3 13 70 [P_SystemClock] = r1; // Initial System Clock
000091B5 70 92 r1 = 0x0030; // TimerA CKA=Fosc/2 CKB=1 Tout:off
000091B6 19 D3 0B 70 [P_TimerA_Ctrl] = r1 // Initial Timer A
//R1 = 0x0003 // 8K
000091B8 40 92 r1 = 0x0000 // Fosc/2
000091B9 19 D3 0D 70 [P_TimerB_Ctrl] = r1; // Initial Timer B -> 8192
//R1 = 0xFFFF
000091BB 09 93 00 FA r1 = 0xFA00 // Any time for ADPCM channel 0,1
000091BD 19 D3 0C 70 [P_TimerB_Data] = r1 // 8K sample rate
000091BF 09 93 FF FF r1 = 0xffff
000091C1 19 D3 11 70 [P_INT_Clear] = r1 // Clear interrupt occuiped events
000091C3 90 9A RETF
//........................................
F_SP_PlayMode0_: // with F_SP_SACM_MS01_Initial
000091C4 46 92 r1 = 0x0006
000091C5 19 D3 2A 70 [P_DAC_Ctrl] = r1
000091C7 09 93 00 FE r1 = 0xFE00
000091C9 19 D3 0A 70 [P_TimerA_Data] = r1 //
000091CB 11 93 A4 01 r1 = [R_InterruptStatus] //
000091CD 09 A3 10 84 r1 |= C_FIQ_PWM+C_IRQ2_TMB+C_IRQ4_1KHz
000091CF 19 D3 A4 01 [R_InterruptStatus] = r1 //
000091D1 19 D3 10 70 [P_INT_Ctrl] = r1 //
000091D3 90 9A RETF
F_SP_PlayMode1_: // with F_SP_SACM_MS01_Initial
000091D4 09 93 A8 00 r1 = 0x00A8
000091D6 19 D3 2A 70 [P_DAC_Ctrl] = r1
000091D8 09 93 00 FE r1 = 0xFE00
000091DA 19 D3 0A 70 [P_TimerA_Data] = r1 //
000091DC 11 93 A4 01 r1 = [R_InterruptStatus] //
000091DE 09 A3 10 24 r1 |= C_FIQ_TMA+C_IRQ2_TMB+C_IRQ4_1KHz
000091E0 19 D3 A4 01 [R_InterruptStatus] = r1 //
000091E2 19 D3 10 70 [P_INT_Ctrl] = r1 //
000091E4 90 9A RETF
F_SP_PlayMode2_: // with F_SP_SACM_MS01_Initial
000091E5 09 93 A8 00 r1 = 0x00A8
000091E7 19 D3 2A 70 [P_DAC_Ctrl] = r1
000091E9 09 93 9A FD r1 = 0xFD9A
000091EB 19 D3 0A 70 [P_TimerA_Data] = r1 //
000091ED 11 93 A4 01 r1 = [R_InterruptStatus] //
000091EF 09 A3 10 24 r1 |= C_FIQ_TMA+C_IRQ2_TMB+C_IRQ4_1KHz
000091F1 19 D3 A4 01 [R_InterruptStatus] = r1 //
000091F3 19 D3 10 70 [P_INT_Ctrl] = r1 //
000091F5 90 9A RETF
F_SP_PlayMode3_: // with F_SP_SACM_MS01_Initial
000091F6 09 93 A8 00 r1 = 0x00A8
000091F8 19 D3 2A 70 [P_DAC_Ctrl] = r1
000091FA 09 93 00 FD r1 = 0xFD00
000091FC 19 D3 0A 70 [P_TimerA_Data] = r1 //
000091FE 11 93 A4 01 r1 = [R_InterruptStatus] //
00009200 09 A3 10 24 r1 |= C_FIQ_TMA+C_IRQ2_TMB+C_IRQ4_1KHz
00009202 19 D3 A4 01 [R_InterruptStatus] = r1 //
00009204 19 D3 10 70 [P_INT_Ctrl] = r1 //
00009206 90 9A RETF
///////////////////////////////////////////////////////////////////////////////
// Function: The partial code of hardware setting of SACM_MS01_Initial()
// or F_SACM_MS01_Initial:
//
// Ex: F_SACM_DVR_Initial:
// ...
// call F_SP_SACM_DVR_Init_
// call F_SP_Play_Mode0/1/2/3 ->0,1,2,3 depending on the para1
// ...
// retf
// Ex1:
// F_SACM_DVR_Record: (or F_SACM_DVR_InitEncoder)
// ...
// call F_SP_SACM_DVR_Rec_Init
// ...
// retf
// Ex2:
// F_SACM_DVR_Play: (or F_SACM_DVR_InitDecoder)
// ...
// call F_SP_SACM_DVR_Play_Init_
// ...
// retf
///////////////////////////////////////////////////////////////////////////////
F_SP_SACM_DVR_Init_:
00009207 40 92 r1 = 0x0000; // 24MHz, Fcpu=Fosc
00009208 19 D3 13 70 [P_SystemClock] = r1; // Frequency 20MHz
0000920A 70 92 r1 = 0x0030; // TimerA CKA=Fosc/2 CKB=1 Tout:off
0000920B 19 D3 0B 70 [P_TimerA_Ctrl] = r1;
0000920D 09 93 00 FA r1 = 0xfa00; // 8K @ 24.576MHz
//r1 = 0xfb1d; // 8K @ 20MHz
0000920F 19 D3 0A 70 [P_TimerA_Data] = r1;
00009211 75 92 r1 = 0x0035; // ADINI should be open (107)
00009212 19 D3 15 70 [P_ADC_Ctrl] = r1;
00009214 09 93 A8 00 r1 = 0x00A8; // Set the DA Ctrl
00009216 19 D3 2A 70 [P_DAC_Ctrl] = r1;
00009218 09 93 FF FF r1 = 0xffff;
0000921A 19 D3 11 70 [P_INT_Clear] = r1; // Clear interrupt occuiped events
0000921C 11 93 A4 01 r1 = [R_InterruptStatus] //
0000921E 09 A3 00 20 r1 |= C_FIQ_TMA // Enable Timer A FIQ
00009220 19 D3 A4 01 [R_InterruptStatus] = r1 //
00009222 19 D3 10 70 [P_INT_Ctrl] = r1 //
00009224 90 9A RETF
F_SP_SACM_DVR_Rec_Init_: // call by SACM_DVR_Record / SACM_DVR_InitEncoder
00009225 75 92 r1 = 0x0035; //mic input
//r1 = 0x0037 //line_in input
00009226 19 D3 15 70 [P_ADC_Ctrl] = r1; //enable ADC
00009228 09 93 00 FE r1=0xfe00; //24K @ 24.576MHz
0000922A 19 D3 0A 70 [P_TimerA_Data] = r1
0000922C 90 9A RETF
F_SP_SACM_DVR_Play_Init_:
0000922D 40 92 r1 = 0x0000 // call by SACM_DVR_Stop / SACM_DVR_Play
0000922E 19 D3 15 70 [P_ADC_Ctrl] = r1; // Disable ADC
00009230 09 93 00 FD r1 = 0xfd00; // 16K @ 24.576MHz
00009232 19 D3 0A 70 [P_TimerA_Data] = r1;
00009234 90 9A RETF
///////////////////////////////////////////////////////////////////////////////
// Function: Extra Functions provided by Sunplus
// Type:
// 1. DAC Ramp up/down
// 2. IO config/import/export
// 3. Get resource data
//
//
///////////////////////////////////////////////////////////////////////////////
////////////////////////////////////////////////////////
// Function: Ramp Up/Down to avoid speaker "pow" noise
// Destory: R1,R2
////////////////////////////////////////////////////////
_SP_RampUpDAC1: .PROC
F_SP_RampUpDAC1:
00009235 90 D4 push r1,r2 to [sp]
00009236 11 93 17 70 r1=[P_DAC1]
00009238 09 B3 C0 FF r1 &= ~0x003f
0000923A 09 43 00 80 cmp r1,0x8000
0000923C 0E 0E jb L_RU_NormalUp
0000923D 19 5E je L_RU_End
L_RU_DownLoop:
0000923E 40 F0 A1 92 call F_Delay
00009240 41 94 r2 = 0x0001
00009241 1A D5 12 70 [P_Watchdog_Clear] = r2
00009243 09 23 40 00 r1 -= 0x40
00009245 19 D3 17 70 [P_DAC1] = r1
00009247 09 43 00 80 cmp r1,0x8000
00009249 4C 4E jne L_RU_DownLoop
L_RD_DownEnd:
0000924A 0C EE jmp L_RU_End
L_RU_NormalUp:
L_RU_Loop:
0000924B 40 F0 A1 92 call F_Delay
⌨️ 快捷键说明
复制代码
Ctrl + C
搜索代码
Ctrl + F
全屏模式
F11
切换主题
Ctrl + Shift + D
显示快捷键
?
增大字号
Ctrl + =
减小字号
Ctrl + -