📄 hardware.lst
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//
// See. following function for example:
// F_SP_SACM_A2000_Init_:
// F_SP_SACM_S480_Init_:
// F_SP_SACM_S240_Init_:
// F_SP_SACM_MS01_Init_:
// F_SP_SACM_DVR_Init_:
//////////////////////////////////////////////////
000001A4 .IRAM
.PUBLIC R_InterruptStatus
000001A4 00 00 .VAR R_InterruptStatus = 0 //
//////////////////////////////////////////////////
.DEFINE C_RampDelayTime 32
.DEFINE C_QueueSize 144
000001A5 00 00 .VAR R_Queue
000001A6 00 00 00 00 .DW C_QueueSize-1 DUP(0)
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00000235 00 00 .VAR R_ReadIndex
00000236 00 00 .VAR R_WriteIndex
0000910F .CODE
///////////////////////////////////////////
// Function: Initial Queue
// Destory: R1,r2
///////////////////////////////////////////
_SP_InitQueue: .PROC
_SP_InitQueue_A2000:
_SP_InitQueue_S480:
_SP_InitQueue_S240:
_SP_InitQueue_MS01:
_SP_InitQueue_DVR:
F_SP_InitQueue_A2000:
F_SP_InitQueue_S480:
F_SP_InitQueue_S240:
F_SP_InitQueue_MS01:
F_SP_InitQueue_DVR:
F_SP_InitQueue:
0000910F 09 93 A5 01 r1 = R_Queue
00009111 40 94 r2 = 0
L_ClearQueueLoop?:
00009112 D1 D4 [r1++] = r2
00009113 09 43 35 02 cmp r1, R_Queue+C_QueueSize
00009115 44 4E jne L_ClearQueueLoop?
00009116 40 92 r1 = 0
00009117 19 D3 35 02 [R_ReadIndex] = r1
00009119 19 D3 36 02 [R_WriteIndex] = r1
0000911B 90 9A RETF
.ENDP
///////////////////////////////////////////
// Function: Get a data form Queue
// Output: R1: Data
// R2: return value
// Destory: R1,R2
///////////////////////////////////////////
F_SP_ReadQueue_A2000:
F_SP_ReadQueue_S480:
F_SP_ReadQueue_S240:
F_SP_ReadQueue_MS01:
F_SP_ReadQueue_DVR:
F_SP_ReadQueue:
0000911C 12 95 35 02 r2 = [R_ReadIndex]
0000911E 12 45 36 02 cmp r2,[R_WriteIndex]
00009120 0D 5E je L_RQ_QueueEmpty
00009121 0A 05 A5 01 r2 += R_Queue // get queue data address
00009123 C2 92 r1 = [r2]
00009124 12 95 35 02 r2 = [R_ReadIndex]
00009126 41 04 r2 += 1
00009127 0A 45 90 00 cmp r2, C_QueueSize
00009129 01 4E jne L_RQ_NotQueueBottom
0000912A 40 94 r2 = 0
L_RQ_NotQueueBottom:
0000912B 1A D5 35 02 [R_ReadIndex] = r2
//r2 = 0x0000 // get queue data
0000912D 90 9A retf
L_RQ_QueueEmpty:
//r2 = 0x8000 // queue empty
0000912E 90 9A retf
///////////////////////////////////////////
// Function: Get a data from Queue but do
// not change queue index
// R1: output
// Destory: R1,R2
///////////////////////////////////////////
F_SP_ReadQueue_NIC:
F_SP_ReadQueue_NIC_A2000:
F_SP_ReadQueue_NIC_S480:
F_SP_ReadQueue_NIC_S240:
F_SP_ReadQueue_NIC_MS01:
F_SP_ReadQueue_NIC_DVR:
0000912F 12 95 35 02 r2 = [R_ReadIndex]
00009131 12 45 36 02 cmp r2,[R_WriteIndex]
00009133 03 5E je L_RQ_QueueEmpty?
00009134 0A 05 A5 01 r2 += R_Queue // get queue data index
00009136 C2 92 r1 = [r2]
L_RQ_QueueEmpty?:
00009137 90 9A RETF
///////////////////////////////////////////
// Function: Put a data to Queue
// R1: Input
// Destory: R1,R2
///////////////////////////////////////////
F_SP_WriteQueue_A2000:
F_SP_WriteQueue_S480:
F_SP_WriteQueue_S240:
F_SP_WriteQueue_MS01:
F_SP_WriteQueue_DVR:
F_SP_WriteQueue:
00009138 12 95 36 02 r2 = [R_WriteIndex] // put data to queue
0000913A 0A 05 A5 01 r2 += R_Queue
0000913C C2 D2 [r2] = r1
0000913D 12 95 36 02 r2 = [R_WriteIndex]
0000913F 41 04 r2 += 1
00009140 0A 45 90 00 cmp r2, C_QueueSize
00009142 01 4E jne L_WQ_NotQueueBottom
00009143 40 94 r2 = 0
L_WQ_NotQueueBottom:
00009144 1A D5 36 02 [R_WriteIndex] = r2
00009146 90 9A RETF
///////////////////////////////////////////
// Function: Test Queue Status
// o/p: R1
// Destory: R1
///////////////////////////////////////////
F_SP_TestQueue_A2000:
F_SP_TestQueue_S480:
F_SP_TestQueue_S240:
F_SP_TestQueue_MS01:
F_SP_TestQueue_DVR:
F_SP_TestQueue:
//... Test Queue Empty ...
00009147 11 93 35 02 r1 = [R_ReadIndex]
00009149 11 43 36 02 cmp r1,[R_WriteIndex]
0000914B 12 5E je L_TQ_QueueEmpty
//... Test Queue Full ...
0000914C 11 93 35 02 r1 = [R_ReadIndex] // For N Queue Full: 1.R=0 and W=N-1 2. R<>0 and W=R-1
0000914E 05 4E jnz L_TQ_JudgeCond2
0000914F 11 93 36 02 r1 = [R_WriteIndex]
00009151 09 43 8F 00 cmp r1, C_QueueSize-1 // Cond1
00009153 08 5E je L_TQ_QueueFull
L_TQ_JudgeCond2:
00009154 11 93 35 02 r1 = [R_ReadIndex]
00009156 41 22 r1 -=1
00009157 11 43 36 02 cmp r1,[R_WriteIndex]
00009159 02 5E je L_TQ_QueueFull
0000915A 40 92 r1 = 0 // not Full, not empty
0000915B 90 9A retf
L_TQ_QueueFull:
0000915C 41 92 r1 = 1 // full
0000915D 90 9A retf
L_TQ_QueueEmpty:
0000915E 42 92 r1 = 2 // empty
0000915F 90 9A retf
///////////////////////////////////////////////////////////////////////////////
// Function: The partial code of hardware setting of SACM_A2000_Initial()
// or F_SACM_A2000_Initial:
// Note: The following functions are the partial code of original
// initial subroutine. (H/W setting part)
//
// Ex: F_SACM_A2000_Initial:
// ...
// call F_SP_SACM_A2000_Init_ : S480/S240/MS01 is same
// ...
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