amf_pooleddelay_render.asm

ADI SHARC DSP 音频算法标准模块库

// Copyright(c) 2005 Analog Devices, Inc. All Rights Reserved.
// This software is proprietary and confidential to Analog Devices, Inc. and its licensors.

// File    : $Id: //depot/development/visualaudio/modules/2.5.0/SHARC/Source/AMF_Delay_Render.asm#3 $ 
// Part of : VisualAudio V2.5.0 
// Updated : $Date: 2006/10/12 $ by $Author: Fernando $



//    Module Name     : AMF_P00ledDelay_Render.asm 
//    DSP Processor   : 
//    Description     : Delay audio module ASM file.
//    Owner           : Analog Devices
//    Original Author : Kishore DAsari
//    Date               : 05/06/07
//====================================================================================
// Processor resources used:
// 86 words pmem INTERNAL
// 362 max cycles (TickSize=128) (106 + 4*tickSize/2)
// (SIMD not used used)
//====================================================================================

#if 1

    ////////////////////////////////////////////////////////////////////////////////
    //
    // History:
    //
    // 06/05/07 Kishore Dasari: created
    //
    ////////////////////////////////////////////////////////////////////////////////
    //
    // 
    //
    // Special Requirements:
    //        - 
    //        - 
    //
    ////////////////////////////////////////////////////////////////////////////////

#include "processor.h"
#include "AMF_PooledDelay.h"
#include "asm_sprt.h"
//#include "asm_macros.h"

// global routines
.global    _AMF_PooledDelay_Render;
.segment /pm SEG_MOD_FAST_CODE;

////////////////////////////////////////////////////////////////////////////////
// Delay filter
//
_AMF_PooledDelay_Render:
    
 // push context on stack
     puts=mode1;
     
    r0 = m1; puts = r0;
    r0 = i10; puts = r0;  
    r0 = i9; puts = r0; 
    r0 = i8; puts = r0;
    r0 = i5; puts = r0;
    r0=i3; puts=r0;
    r0=i2; puts=r0;
    r0=i1; puts=r0;
    r0=i0; puts=r0;
    r0=b8; puts=r0;
    r0=b2; puts=r0;
    puts = r7; puts = r3;

   
    
    
    i4=r8;                    // i4->*buffers
    r3 = 0;   // Number of valid chans
    
    m1 = 1;
    m12 = 1;
    
       
    i4=r4;                    //i4->testModuleInstance[0]
    r1 = dm(AMF_PooledDelay_inputPinCount,i4);       // buffer base
    r4 = 0;      
    i12 = dm(AMF_PooledDelay_MaxDelayChan,i4);       // Max delay for chan
    
    i3 = r8;  // &buffer[0]
    r0 = r8 + r1;
    i9 = r0; // &buffer[numchannels]
    m4 = 0;

    /*****************************************
	* Check for wether current delay for channel
	* is  exceding max delay size - 1
	******************************************/
    
    i0 = dm(AMF_PooledDelay_DelayChan,i4); // Current delay per channel
    
    r0 =dm(i0,m4), r2 = pm(i12,m12); 
    lcntr = r1, do Check_Current_delay_valid until lce;
    	comp(r0,r2); 
    	if ge r0 = r2-1;
    	dm(i0,m1) = r0, r2 = pm(i12,m12);
Check_Current_delay_valid :
		r0 = dm(i0,m4);
			    	
    i0 = dm(AMF_PooledDelay_MaxDelayChan,i4);       // Max delay for chan
    
    /******************************************
    	Calculate valid channels
    *******************************************/        
    r0 = dm(i0,1);
    r2 = dm(AMF_PooledDelay_DelaySize,i4); // totla delay pool
    lcntr = r1, do Cal_Num_Active_Channels_end until lce;
    	r4 = r4 + r0, r0 = dm(i0,1) ;
    	comp(r4,r2);
    	if le r3 = r3 + 1; // Out side loop not working ??
 Cal_Num_Active_Channels_end:
 	nop; 
 	
 	r8 = 0;
 
 	/*********************************************
 	*	Apply delay algorithm
 	*********************************************/
 	i0 = dm(AMF_PooledDelay_MaxDelayChan,i4);  // Max delay per channels
 	i1 = dm(AMF_PooledDelay_WriteIndexChan,i4); // Write index for channel
 	i12 = dm(AMF_PooledDelay_DelayChan,i4); // Current delay per channel
 	r7 = dm(AMF_PooledDelay_DelayBuffer,i4); // Delay buffer

   	 
 	r0 = dm(i1,m4), r1 = pm(i12,m12);
	lcntr = r3, do Delay_per_channels_loopend until lce;
		r2 = r0 - r1,  r4 = dm(i0,m4);	
		comp(r2,r8),b8 = r7;
		if lt r2 = r2 + r4;
		
		b2 =r7;
		l8 = r4; // read ptr len
		
		r0 = r7 + r0, l2 = r4;
		r2 = r7 + r2, i2 = r0; // Wrt ptr 
		r0 = dm(i3,m1), r1 = pm(i9,m12);
		i8 = r2;  // read ptr
		i5 = r0; // input
		i10 = r1;  // output
		
		 r1 = dm(i5,m1);
		lcntr = r12, do Tick_Size_loopend until lce;
			dm(i2,m1) = r1, r2 = pm(i8,m12);
			r1 = dm(i5,m1), pm(i10,m12) = r2;
		 
	Tick_Size_loopend:		
			nop;
	r1 = i2;
	r0 = r1- r7, r2 = dm(i0,m1); 
			
	r7 = r7 + r2,dm(i1,m1) = r0, r1 = pm(i12,m12); // instance->WriteIndexChan[ch]=index;
		
Delay_per_channels_loopend:
	r0 = dm(i1,m4);

Mute_channels:	
	r8 = 0;  		
	r1 = dm(AMF_PooledDelay_inputPinCount,i4);
	r0 = r1 - r3; // r3 is num valid channels
	comp(r0,r8);
	if eq jump Claer_Len_Reg;
	
	/***************************************
	*	Mute channels if total delay exceeds
	*	given Delay
	***************************************/
	
	lcntr = r0, do Mute_invalid_channels_loopend until lce;
		r1 = pm(i9,m12);
		i10 = r1;  // output
		lcntr = r12, do Mute_tick_loopend until lce;
		Mute_tick_loopend:
		pm(i10,m12) = r8;
		//	nop;
		
Mute_invalid_channels_loopend:
	nop;

	
Claer_Len_Reg:	

	l2 = 0;
	l8 = 0;
	
		
 // pop context off stack
 
 	r3 = gets(1);
 	r7 = gets(2);
    b2=gets(3);
    b8=gets(4);
    i0=gets(5);
    i1=gets(6);
    i2=gets(7);
    i3=gets(8);
    i5=gets(9);
    i8 = gets(10);
    i9=gets(11);
    i10=gets(12);
    m1 = gets(13);
    mode1=gets(14);
    alter(14);

//------------------------------------------------------------------------------------
_AMF_PooledDelay_Render.END:
    leaf_exit; // C-rth requires this instead of rts
//------------------------------------------------------------------------------------
    
.endseg;
#endif