amf_biquad_d_render.asm

ADI SHARC DSP 音频算法标准模块库

// Copyright(c) 2005 Analog Devices, Inc. All Rights Reserved.
// This software is proprietary and confidential to Analog Devices, Inc. and its licensors.

// File    : $Id: //depot/development/visualaudio/modules/2.5.0/SHARC/Source/AMF_Biquad_D_Render.asm#3 $ 
// Part of : VisualAudio V2.5.0 
// Updated : $Date: 2006/10/12 $ by $Author: Fernando $




//    Module Name     : AMF_Biquad_D_Render.asm 
//    DSP Processor   : ADSP21161
//    Original Author : Sami Saab, ported to VA by Tim Stilson    
//    Date               : 2/26/2004
//====================================================================================
// Processor resources used:
//  46 words pmem INTERNAL
//  719 cycles for tickSize=128 (79 + 5*tickSize)
//  (SIMD used)
//====================================================================================

#if 1

    ////////////////////////////////////////////////////////////////////////////////
    //
    // History:
    //
    // 2/26/04 Tim Stilson:
    //        - Created from AMF_Biquad_DS_Render.asm
    //
    ////////////////////////////////////////////////////////////////////////////////

#include <processor.h>
#include "AMF_Biquad_D.h"
#include <asm_sprt.h>

// global routines
.global    _AMF_Biquad_D_Render;            ;

.segment /pm SEG_MOD_FAST_CODE;

////////////////////////////////////////////////////////////////////////////////
// Biquad_D filter

_AMF_Biquad_D_Render:
    
    puts=mode1;
    puts = r3;
    puts = r5;
    puts = r6;
    puts = r9;
    r0 = i1; puts = r0;
    r0 = i2; puts = r0;
    r0 = m2; puts = r0;
    
    bit set mode1 BDCST1 | PEYEN;                // enable Y processing element and i1 broadcast loads

    i4=r8;                    // i4->*buffers
    
 // initialize input and output samples pointers
    i1=dm(0,i4);            // i1->buffers[0]
    i2=dm(1,i4);            // i2->buffers[1]

    i4=r4;                    //i4->testModuleInstance[0]
    
       
 // initialize coefficient pointer
    b12=dm(AMF_Biquad_D_Coefs,i4);      // b12 & i12 point to filter coefficients
    l12 = 10;                           // l12 = number of coefficients
    m12 = 2;
    
 // initialize states pointers
    b4=dm(AMF_Biquad_D_State,i4);       // i4 points to 1st state
    l4 = 4;                             // l4 = number of filter states
    m2 = 2; m4 = 4;
    
    r3 = r12;                           // r3 = number of output samples
                      
////////////////////////////////////////////////////////////////////////////////
 //                                         f9 = load input,  f0 = a1
                                            f9 = dm(i1,m6),   f0 = pm(i12,m12);
                                            
 //                                         f5 = load state1, f1 = a2
                                            f5 = dm(i4,m2),   f1 = pm(i12,m12);
                                            
 //     f12 = a1*state1,                    f6 = load state2, f4 = b0
        f12 = f0 * f5,                      f6 = dm(i4,m4),   f4 = pm(i12,m12);
        
 //     f12 = a2*state2, f8 = f9+a1*state1,                   f2 = b1
        f12 = f1 * f6,   f8 = f9 + f12,                       f2 = pm(i12,m12);
        
    lcntr = r3, do (pc,5) until lce;
    
     // f12 = b1*state1, f5 = f8+a2*state2 = new state,       f3 = b2
        f12 = f2 * f5,   f5 = f8 + f12,                       f3 = pm(i12,m12);
        
     // f8 = b0*new state,                  store new state,  f0 = a1
        f8 = f4 * f5,                       dm(i4,m2) = f5,   f0 = pm(i12,m12);
        
     // f12 = b2*state2, f8 = f8+b1*state1, f6 = load state2, f1 = a2
        f12 = f3 * f6,   f8 = f8 + f12,     f6 = dm(i4,m4),   f1 = pm(i12,m12);
        
     // f12 = a1*state1, f8 = f8+b2*state2, f9 = load input,  f4 = b0
        f12 = f0 * f5,   f8 = f8 + f12,     f9 = dm(i1,m6),   f4 = pm(i12,m12);
        
     // f12 = a2*state2, f8 = f9-a1*state1, store output,     f2 = b1
        f12 = f1 * f6,   f8 = f9 + f12,     dm(i2,m2) = f8,   f2 = pm(i12,m12);
////////////////////////////////////////////////////////////////////////////////

    bit clr mode1 BDCST1 | PEYEN;              // disable Y processing and i1 broadcast loads
        
 // reset length registers
    l4  = 0; l12 = 0;
    
 // pop context off stack
    m2 = gets(1);
    i2 = gets(2);
    i1 = gets(3);
    r9 = gets(4);
    r6 = gets(5);
    r5 = gets(6);
    r3 = gets(7);
    mode1=gets(8);
    alter(8);

//------------------------------------------------------------------------------------
_AMF_Biquad_D_Render.END:
    leaf_exit; // C-rth requires this instead of rts
//------------------------------------------------------------------------------------
    
.endseg;
#endif