amf_clipsym_ds_render.asm

ADI SHARC DSP 音频算法标准模块库

// Copyright(c) 2005 Analog Devices, Inc. All Rights Reserved.
// This software is proprietary and confidential to Analog Devices, Inc. and its licensors.

// File    : $Id: //depot/development/visualaudio/modules/2.5.0/SHARC/Source/AMF_ClipSym_DS_Render.asm#3 $ 
// Part of : VisualAudio V2.5.0 
// Updated : $Date: 2006/10/12 $ by $Author: Fernando $



//    Module Name     : AMF_ClipSym_DS.asm 
//    DSP Processor   : ADSP21161
//    Original Author : Sean Costello    
//    Date               : 3/08/04
//====================================================================================
// Processor resources used:
//    26 words pmem INTERNAL
// 279 cycles, tickSize=128 (23 + 2*tickSize)
//====================================================================================


#if 1

#include "processor.h"
#include "AMF_ClipSym_DS.h"
#include "asm_macros.h"
#include "asm_sprt.h"

.global    _AMF_ClipSym_DS_Render;            ;

.segment /pm SEG_MOD_FAST_CODE;
_AMF_ClipSym_DS_Render:

//====================================================================================
    entry;   
    
//module entry arguments passed in registers: 
//  r4  = instance    (AMF_ClipSym_DS * restrict)
//  r8  = * buffers (float * restrict)
//  r12 = int tickSize

    puts=mode1;
    r0=i0; puts=r0;
    r0=i1; puts=r0;

    m4=2;                        // SIMD loop increment
    
    i4=r4;                        // i4->instance
    
    f2=dm(AMF_ClipSym_DS_ClipLeft,i4);    // f2= float ClipLeft = instance->clipValue[0]
    s2=dm(AMF_ClipSym_DS_ClipRight,i4);    // f2= float ClipRight = instance->clipValue[1]
    
    i4=r8;                        // i4->*buffers
    bit set mode1 PEYEN;        // Enable PEy:SIMD

    i0=dm(0,i4);                // i0=float *in
    i1=dm(1,i4);                // i1=float *out

    f1=dm(i0,m4);                // f1=in[0]     

                                
AMF_ClipSym_DS_Render_loop_start:
    // for (i=0; i<tickSize; i++) 
    LCNTR=r12, DO AMF_ClipSym_DS_Render_loop_end UNTIL LCE;
        f0=CLIP f1 BY f2, f1=dm(i0,m4);        // f0=clip in[i] by amp, f1=in1[i++]
AMF_ClipSym_DS_Render_loop_end: 
        dm(i1,m4)=f0;                // out[i++]=f0

    bit clr mode1 PEYEN;    // Disable PEy:SIMD
        
//====================================================================================

    i1=gets(1);
    i0=gets(2);
    mode1=gets(3);
    alter(3);

//------------------------------------------------------------------------------------
_AMF_ClipSym_DS_Render.END:
    leaf_exit; // C-rth requires this instead of rts
//------------------------------------------------------------------------------------
.endseg;
#endif