start_v2.lst

开发环境为keil166

                          434     ; --- Set INIT_FOCON = 0 to initilize the FOCON register
                          435     $SET (INIT_FOCON = 0) ; /Dave/                                         
                          436     ;
                          437     ; <o> CLKEN: CLKOUT Enable (FOCON.7)
                          438     ; <0=> P3.15 is IO <1=> P3.15 is CLKOUT
 0000                     439     _CLKEN EQU 0 ; 0 = P3.15 is IO pin when _FOUT is 0 /Dave/                             
                                              
                          440                             ; 1 = P3.15 outputs signal CLKOUT
                          441     ;
                          442     ; <o> FORV: Frequency Output Reload Value (FOCON.8 .. FOCON.13) <0-63>
                          443     ; <i> Is copied to FOCNT upon each underflow of FOCNT
 0000                     444     _FORV EQU 0 ; /Dave/                                         
                          445     ;
                          446     ; <o> FOSS: Frequency Output Signal Select (FOCON.14)
                          447     ; <0=> Output of Toggle Latch  <1=> Output of Reload Counter
 0000                     448     _FOSS EQU 0 ; 0 = Output of the toggle latch; 0.5 duty cycle /Dave/                   
                                                        
                          449                             ; 1 = Output of reload counter; duty cycle depends on FORV
                          450     ;
                          451     ; <o> FOEN: Frequency Output Enable (FOCON.15)
                          452     ; <0=> P3.15 is IO <1=> P3.15 outputs f_OUT
 0000                     453     _FOEN EQU 0 ; 0 = P3.15 is IO pin when _CLKEN is 0 /Dave/                             
                                              
                          454                             ; 1 = P3.15 outputs f_OUT when _CLKEN is 0
                          455     ;</e>
                          456     ;
                          457     ;<h> External Bus Configuration
                          458     ;
                          459     ; <e> Configure External Bus (EBC) Behaviour
                          460     ; ==========================================
                          461     ;
                          462     ; --- Set CONFIG_EBC = 0 to initialize the EBCMOD0/EBCMOD1 registers
                          463     $SET (CONFIG_EBC = 1) ; 0 = EBCMOD0/EBCMOD1 are set during reset according the  /Dave/
                                                                           
                          464                             ;     of configuration bus (typical Port0) values.
                          465                             ; 1 = the following external bus configuration values
                          466                             ;      are written to EBCMOD and BUSACT0
                          467     ;
                          468     ; <h> Definitions for EBC Mode 0 register EBCMOD0
                          469     ; ===============================================
                          470     ;
                          471     ; <o> SAPEN: Segment Address Pins Enabled (EBCMOD0.0 .. EBCMOD0.3) <0-8>
A166 MACRO ASSEMBLER  START_V2                                                            04/06/2009 22:15:28 PAGE     9

                          472     ; <i> Number of active Address Lines (A16-A23)
 0002                     473     _SAPEN EQU 2 ; 0 = No segment address pins enabled /Dave/                             
                                              
                          474                             ; 1 = One (A16) segment address pin enabled
                          475                             ; : = :        
                          476                             ; 8 = Eight (A16 .. A23) address pins enabled
                          477                             ; 9 - 15 = reserved
                          478     ;
                          479     ; <o> CSPEN: CSx Pins Enabled (EBCMOD0.4 .. EBCMOD0.7) <0-8>
                          480     ; <i> Number of active ChipSelect pins
 0003                     481     _CSPEN EQU 3 ; 0 = No CS pins enabled /Dave/                                         
                          482                             ; 1 = One CS (CS0) pin enabled
                          483                             ; : = :
                          484                             ; 8 = Eight CS (CS0 .. CS7) pins enabled
                          485                             ; 9 - 15 = reserved
                          486     ; Note: the number of available CS pins depends on the chip used
                          487     ;
                          488     ; <q> ARBEN: Enable Bus Arbitration Pins (EBCMOD0.8)
 0000                     489     _ARBEN EQU 0 ; 0 = HOLD, HLDA and BREQ pins are tristate or act as GPIO /Dave/        
                                                                   
                          490                             ; 1 = HOLD, HLDA and BREQ pins act normally
                          491     ;
                          492     ; <o> SLAVE: SLAVE mode enable (EBCMOD0.9)
                          493     ; <0=> Master Mode  <1=> Slave Mode
 0000                     494     _SLAVE EQU 0 ; 0 = Bus arbiter acts in master mode /Dave/                             
                                              
                          495                             ; 1 = Bus arbiter acts in slave mode
                          496     ;
                          497     ; <q> EBCDIS: Disable EBC pins (EBCMOD0.10)
 0001                     498     _EBCDIS EQU 1 ; 0 = EBC is using the pins for external bus /Dave/                     
                                                      
                          499                             ; 1 = EBC off (pins to be used as GPIO if implemented)
                          500     ;
                          501     ; <o> WRCFG: Configuration for pins WR/WRL and BHE/WRH (EBCMOD0.11)
                          502     ; <0=> WR and BHE  <1=> WRL and WRH
 0000                     503     _WRCFG EQU 0 ; 0 = Pins act as WR and BHE /Dave/                                      
                                     
                          504                             ; 1 = Pins act as WRL and WRH
                          505     ;
                          506     ; <q> BYTDIS: Disable BHE pin (EBCMOD0.12)
 0001                     507     _BYTDIS EQU 1 ; 0 = BHE enabled /Dave/                                         
                          508                             ; 1 = BHE disabled (GPIO function if implemented)
                          509     ;
                          510     ; <q> ALEDIS: Disable ALE pin (EBCMOD0.13)
 0001                     511     _ALEDIS EQU 1 ; 0 = ALE pin enabled /Dave/                                         
                          512                             ; 1 = ALE pin disabled (GPIO function if implemented)
                          513     ;
                          514     ; <q> RDYDIS: Disable READY pin (EBCMOD0.14)
 0001                     515     _RDYDIS EQU 1 ; 0 = READY enabled /Dave/                                         
                          516                             ; 1 = READY disabled (GPIO function if implemented)
                          517     ;
                          518     ; <o> RDYPOL: READY pin polarity (EBCMOD0.15)
                          519     ; <0=> Active Low  <1=> Active High
 0000                     520     _RDYPOL EQU 0 ; 0 = READY pin is active low /Dave/                                    
                                       
                          521                             ; 1 = READY pin is active high
                          522     ;
                          523     ;</h>
                          524     ;
                          525     ; <h>Definitions for EBC Mode 1 register EBCMOD1
                          526     ; ==============================================
                          527     ;
                          528     ; <o> APDIS: Address Port Pins Disable (EBCMOD1.0 .. EBCMOD1.3) <0-15>
 000F                     529     _APDIS EQU 15 ; 0  = Address bus pins 15-1 of PORT1 enabled /Dave/                    
                                                       
                          530                             ; 1  = Pin A15 disabled, A14-1 enabled
A166 MACRO ASSEMBLER  START_V2                                                            04/06/2009 22:15:28 PAGE    10

                          531                             ; 2  = Pin A15-A14 disabled, A13-1 enabled
                          532                             ; ...
                          533                             ; 15 = Pins A15-A1 disabled
                          534     ;
                          535     ; <q> A0PDIS: Address Bit 0 Pin Disable (EBCMOD1.4)
 0000                     536     _A0PDIS    EQU    0     ; 0 = Address bus pin 0 of PORT1 enabled
                          537                             ; 1 = Address bus pin 0 of PORT1 enabled
                          538     ;
                          539     ; <q> ALPDIS: Address Low Pins Disable (EBCMOD1.5)
 0001                     540     _ALPDIS EQU 1 ; 0 = Address bus pin 7-0 generally enabled /Dave/                      
                                                     
                          541                             ; 1 = Address bus pin 7-0 of PORT1 disabled
                          542     ;
                          543     ; <q> DHPDIS: Data High Port Pins Disable (EBCMOD1.6)
 0001                     544     _DHPDIS EQU 1 ; 0 = Data bus pins 15-8 of PORT0 enabled /Dave/                        
                                                   
                          545                             ; 1 = Data bus pins 15-8 disabled (used as GPIO)
                          546     ;
                          547     ; <q> WRPDIS: WR/WRL Pin Disable (EBCMOD1.7)
 0000                     548     _WRPDIS EQU 0 ; 0 = WR/WRL pin of Port P20 enabled /Dave/                             
                                              
                          549                             ; 1 = WR/WRL pin of Port P20 disabled
                          550     ;
                          551     ;</h></e>
                          552     ;
                          553     ; <e> Configure External Bus Behaviour for CS0 area
                          554     ; =================================================
                          555     ;
                          556     ; --- Set CONFIG_CS0 = 1 to initialize the FCONCS0/TCONCS0 registers
                          557     $SET (CONFIG_CS0 = 1) ; /Dave/                                         
                          558     ;
                          559     ; <h>Definitions for Function Configuration Register FCONCS0
                          560     ; =======================================================
                          561     ;
                          562     ; <q> ENCS0: Enable Chip Select (FCONCS0.0)
 0000                     563     _ENCS0 EQU 0 ; 0 = Chip Select 0 disabled /Dave/                                      
                                     
                          564                             ; 1 = Chip Select 0 enabled
                          565     ;
                          566     ; <q> RDYEN0: Ready Enable (FCONCS0.1)
 0000                     567     _RDYEN0 EQU 0 ; 0 = Access time controlled by TCONCS0.PHE0 /Dave/                     
                                                      
                          568                             ; 1 = Access time cont. by TCONCS0.PHE0 and READY signal
                          569     ;
                          570     ; <o> RDYMOD0: Ready Mode (FCONCS0.2) 
                          571     ; <0=> Asynchronous  <1=> Synchronous
 0000                     572     _RDYMOD0 EQU 0 ; 0 = Asynchronous READY /Dave/                                        
                                   
                          573                             ; 1 = Synchronous READY
                          574     ;
                          575     ; <o> BTYP0: Bus Type Selection (FCONCS0.4 .. FCONCS0.5)
                          576     ; <0=> 8-bit Demultiplexed Bus  <1=> 8-bit Multiplexed Bus
                          577     ; <2=> 16-bit Demultiplexed Bus <3=> 16-bit Multiplexed Bus
 0000                     578     _BTYP0 EQU 0 ; 0 = 8 bit Demultiplexed bus /Dave/