and2b.vhd

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LIBRARY IEEE;
USE IEEE.STD_LOGIC_1164.ALL;
USE IEEE.STD_LOGIC_UNSIGNED.ALL;
ENTITY AND2B IS
	PORT(A,B:IN STD_LOGIC;
		C:OUT STD_LOGIC);
END AND2B;
ARCHITECTURE ONE OF AND2B IS
BEGIN
	C<=A AND B;
END ARCHITECTURE ONE;