📄 start91270.asm
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/* THIS SAMPLE CODE IS PROVIDED AS IS AND IS SUBJECT TO ALTERATIONS. FUJITSU */
/* MICROELECTRONICS ACCEPTS NO RESPONSIBILITY OR LIABILITY FOR ANY ERRORS OR */
/* ELIGIBILITY FOR ANY PURPOSES. */
/* (C) Fujitsu Microelectronics Europe GmbH */
;==============================================================================
; 1 Contents
;==============================================================================
; 1 Contents
; 2 Disclaimer
;
; 3 History
;
; 4 Settings
; 4.1 Controller Family
; 4.1.1 Flash wait cycles
; 4.2 Stack Type and Stack Size
; 4.3 Low-Level Library Interface
; 4.4 C++ start-up
; 4.5 Clock Selection
; 4.5.1 Select clock source
; 4.5.2 Select PLL ratio
; 4.5.3 Select CPU and peripheral and external-bus clock divider
; 4.5.4 Select CAN clock
; 4.5.5 Select Clock Modulator
; 4.6 External Bus Interface
; 4.6.1 Select Chip mode
; 4.6.2 Select Chipselect
; 4.6.3 Set memory addressing for Chipselects
; 4.6.4 Configure Chipselect Area
; 4.6.5 Set Wait cycles for Chipselects
; 4.6.6 Select External bus mode (Address lines 23:16)
; 4.6.7 Select External bus mode (Control signals)
;
; 5 Section and Data Declaration
; 5.1 Define Stack Size
; 5.2 Define Sections
;
; 6. S T A R T
; 6.1 Clock startup
; 6.1.1 Set PLL Multiplier
; 6.1.2 Start PLLs
; 6.1.3 Wait for PLL oscillation stabilisation
; 6.1.4 Set Clocks
; 6.1.4.1 Set CPU and Peripheral and External Bus Clock Divider
; 6.1.4.2 Set External Bus Interface Clock
; 6.1.4.3 Set CAN Clock Prescaler
; 6.1.4.4 Switch Main Clock Mode
; 6.1.4.5 Switch Subclock Mode
; 6.1.4.6 Switch to PLL Mode
; 6.2 Set BusInterface
; 6.2.1 Set CS0
; 6.2.2 Set CS1
; 6.2.3 Set CS2
; 6.2.4 Set CS3
; 6.2.5 set Port Function Register
; 6.2.6 Enable used CS
; 6.2.7 Set Flash wait cycles
; 6.3 Initialise Stack Pointer and Table Base register
; 6.4 Clear data
; 6.5 Copy Init Section from ROM to RAM
; 6.6 C Library Initialization
; 6.7 Call C++ Constructors
; 6.8 Call Main Routine
; 6.9 Return from Main Function
;==============================================================================
; 2 Disclaimer
;==============================================================================
; Fujitsu Microelectronics Europe GmbH
; http://emea.fujitsu.com/microelectronics
;
; The following software is for demonstration purposes only. It is not
; fully tested, nor validated in order to fullfill its task under all
; circumstances. Therefore, this software or any part of it must only be
; used in an evaluation laboratory environment.
; This software is subject to the rules of our standard DISCLAIMER, that is
; delivered with our SW-tools on the Fujitsu Microcontrollers CD
; (V3.4 or higher "\START.HTM") or on our Internet Pages:
; http://www.fme.gsdc.de/gsdc.htm
; http://emea.fujitsu.com/microelectronics
;
;==============================================================================
; 3 History
;==============================================================================
;
;==============================================================================
; MB9127x Series C Compiler's
;
; Startup file for memory and basic controller initialisation
;==============================================================================
;History:
;
; 2005-08-04 V1.0 UMa Release first version
; 2006-12-07 V1.1 MHe Add FLASH wait cycles setting
;
;==============================================================================
; 4 Settings
;==============================================================================
;
; CHECK ALL OPTIONS WHETHER THEY FIT TO THE APPLICATION;
;
; Configure this startup file in the "Settings" section. Search for
; comments with leading "; <<<". This points to the items to be set.
;==============================================================================
;
#set OFF 0
#set ON 1
#set LOW_PRIOR 31
;
;==============================================================================
; 4.1 Controller Family
;==============================================================================
#set MB91V280 0 ; FR-60Lite, MB91V280 series
#set MB91F272 1 ; FR-60Lite, MB91F272 series
;
#set FAMILY MB91F272 ; <<< select family
;====================================================================
; 4.1.1 Flash wait cycles
;====================================================================
; With this setting the number of wait cycles for access to FLASH
; memory is set.
#set FLASH_READ_ONLY ON ; <<< setting Flash-mode
; ON: For read-only applications 1 wait cycle is set which allows
; to read at maximum speed. Up to 33 MHz can be operated.
; OFF: For read-and-write applications 3 wait cycles are set.
; Up to 33 MHz can be operated.
; Note: Please check also the 91265-series HW-manual chapter "Flash memory"
;==============================================================================
; 4.2 Stack Type and Stack Size
;==============================================================================
;
#set USRSTACK 0 ; user stack: for main program
#set SYSSTACK 1 ; system stack: for main program and interrupts
;
#set STACKUSE SYSSTACK ; <<< set active stack
;
#set STACK_RESERVE ON ; <<< reserve stack area in this module
#set STACK_SYS_SIZE 0x400-4 ; <<< byte size of System stack
#set STACK_USR_SIZE 2 ; <<< byte size of User stack
;
; - If the active stack is set to SYSSTACK, it is used for main program
; and interrupts. In this case, the user stack could be set to a dummy
; size.
; If the active stack is set to user stack, it is used for the main
; program but the system stack is automatically activated, if an inter-
; rupt is serviced. Both stack areas must have a reasonable size.
; - If STACK_RESERVE is ON, the sections USTACK and SSTACK are reserved
; in this module. Otherwise, they have to be reserved in other modules.
; If STACK_RESERVE is OFF, the size definitions STACK_SYS_SIZE and
; STACK_USR_SIZE have no meaning.
; - Even if they are reserved in other modules, they are still initialised
; in this start-up file.
;
; - If only system stack is used and SSB is linked to a different bank
; than USB, make sure that all C-modules (which generate far pointers
; to stack data) have "#pragma SSB". Applies only to exclusive confi-
; gurations.
; - Note, several library functions require quite a big stack (due to
; ANSI). Check the stack information files (*.stk) in the LIB\911
; directory.
;==============================================================================
; 4.3 Low-Level Library Interface
;==============================================================================
#set CLIBINIT OFF ; <<< select extended library usage
; This option has only to be set, if stream-IO/standard-IO function of
; the C-library have to be used (printf(), fopen()...). This also
; requires low-level functions to be defined by the application
; software.
; For other library functions (like e.g. sprintf()) all this is not
; necessary. However, several functions consume a large amount of stack.
;==============================================================================
; 4.4 C++ start-up
;==============================================================================
#set CPLUSPLUS ON ; <<< activate if c++ files are used
;
; In the C++ specifications, when external or static objects are used,
; a constructor must be called followed by the main function.
; Because four-byte pointers to the main function are stored in the
; EXT_CTOR_DTOR section, call a constructor sequentially from the
; lower address of the four addresses in that section.
;
; If using C++ sources, activate this function to create the section
; EXT_CTOR_DTOR.
;==============================================================================
; 4.5 Clock Selection
;==============================================================================
; There exist 3 internal clock trees.
; CPU clock, peripheral clock and external bus clock
; There is also the possibility to select a specific clock for the CAN Controller
; As first step the internal frequency (PLL, use or not) must be selected.
; Afterwards the 3 clock trees and the CAN Controller must be set-up.
; There is also a clock modulator, intended to minimize the electromagnetic
; interference - EMI.
;==============================================================================
; 4.5.1 Select clock source
;==============================================================================
#set NOCLOCK 0 ; do not touch CKSCR register
#set MAINCLOCK 1 ; select main clock
; (1/2 external)
#set MAINPLLCLOCK 2 ; select main clock with PLL
#set SUBCLOCK 3 ; select subclock
;
#set CLOCKSOURCE MAINPLLCLOCK ; <<< set clock source
;
#set ENABLE_SUBCLOCK OFF ; <<< set if Subclock exists
; ; and should be enabled
;==============================================================================
; 4.5.2 Select PLL ratio
;==============================================================================
; Select the PLL multiplier.
; For the maximum permitted frequency, please refer to the hardware manual.
; The frequency in brackets is the resulting frequency for a source oszillation
; of 4 MHz.
;
#set PLLx1 0x00 ; ext. clock/quartz x1 (4 MHz)
#set PLLx2 0x01 ; ext. clock/quartz x2 (8 MHz)
#set PLLx3 0x02 ; ext. clock/quartz x3 (12 MHz)
#set PLLx4 0x03 ; ext. clock/quartz x4 (16 MHz)
#set PLLx5 0x04 ; ext. clock/quartz x5 (20 MHz)
#set PLLx6 0x05 ; ext. clock/quartz x6 (24 MHz)
#set PLLx7 0x06 ; ext. clock/quartz x7 (28 MHz)
#set PLLx8 0x07 ; ext. clock/quartz x8 (32 MHz)
;
#set PLLSPEED PLLx8 ; <<< set PLL ratio (base clock)
;
;==============================================================================
; 4.5.3 Select CPU and peripheral and External-bus clock
;==============================================================================
; Select the divide ratio for the clocks used for internal device operation.
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