📄 sysend.c
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/* sysEnd.c - System enhanced network interface support library *//* Copyright 1997-2000 Wind River Systems, Inc. */#include "copyright_wrs.h"/*modification history--------------------01u,01may02,scm fix fei self-test... 01t,07feb02,scm remove DIAB warnings...01s,14may01,scm cyclone backplane pci interrupt support...01r,10may01,scm add detection of PCI cards in backplane01q,08may01,scm remove DEC21X40 references...01p,12apr01,scm debug...01o,23jan01,jb Fix the fix to feiResources01n,23jan01,jb Fixing feiResources init01m,16jan01,jb Adding support for new Intel board01l,10jan01,jb Enable built in Mac Address01k,09jan01,jb Fixing cache coherency problem01j,09jan01,jb Changing MAC Address mechanism for 82559ER01i,07dec00,jb Adding support for 82559ER chip01h,13jun00,jgn replace dec21x4x by dec21x40 driver, add support for fei82557 driver (SPRs #31688 and #31689).01g,16feb00,jpd Updated for PD.01f,24jul98,tm fixed misaligned PCI write: sleep mode disable (SPR 21483)01e,04mar98,jpd comments/doc'n changes.01d,29jan98.rlp renamed macro names containing lower case characters.01c,09dec97,tam changed init of endLoadString to prevent tgtsvr checksum error01b,06dec97,tam modified to allow auto detection/initialization of DEC chip; added sysDecPciIntAck() routine.01a,27sep97,rlp written.*//*DESCRIPTIONThis file contains the board-specific routines for Ethernet adapterinitialisation of Intel Pro 100+ adapters.NOTEAt the time of writing, this module has only been tested with the followingEthernet cards: 82559 controller: Intel PRO/100+ Management Adapter 82559ER chip : Intel PRO/100+ chip on motherboardRefer to the BSP man page for any eventual limitations or problems relatedto the BSP.*/#include "vxWorks.h"#include "config.h"#include "vmLib.h"#include "stdio.h"#ifdef INCLUDE_END#include "i80312Pci.h"#include "drv/end/fei82557End.h"#include "end.h"#include "netBufLib.h"/* defines */#define CSR_BASE_MSK 0x7f /* Mask Base Address Register */#define END_LD_STR_SIZE 80#define sysDelay() sysEndDelay()static void sysEndDelay();/* PCI memory base address register configuration mode */#define FORCE 0x00 /* overwrite membase address register */#define AUTO 0x01 /* read membase address register */#define PCI_REG_MOD AUTO /* define the register configuration mode */#define TYPE_ALLOC 1000/* * FEI cards in range 1001 -> 2000 */#define FEI_START TYPE_ALLOC + 1#define PRO100B FEI_START /* Intel EtherExpress PRO-100B PCI */#define I82559ER PRO100B+1#define I82559_PCI_DEVICE_ID 0x1030#define BOARD_TYPE_NB (NELEMENTS(boardResources))#ifdef INCLUDE_FEI82557END/* EEPROM control bits */#define EE_SK 0x01 /* shift clock */#define EE_CS 0x02 /* chip select */#define EE_DI 0x04 /* chip data in */#define EE_DO 0x08 /* chip data out *//* EEPROM opcode */#define EE_CMD_WRITE 0x05 /* WRITE opcode, 101 */#define EE_CMD_READ 0x06 /* READ opcode, 110 */#define EE_CMD_ERASE 0x07 /* ERASE opcode, 111 *//* EEPROM misc. defines */#define EE_CMD_BITS 3 /* number of opcode bits */#define EE_ADDR_BITS 6 /* number of address bits */#define EE_DATA_BITS 16 /* number of data bits */#define EE_SIZE 0x40 /* 0x40 words */#define EE_CHECKSUM 0xbaba /* checksum *//* PC compatibility macros */#define sysOutWord(addr,data) (*((UINT16 *) (addr)) = ((UINT16) (data)))#define sysInWord(addr) (*((UINT16 *) (addr)))#define sysOutLong(addr,data) (*((UINT32 *) (addr)) = ((UINT32) (data)))#define sysInLong(addr) (*((UINT32 *) (addr)))#define FEI_MEMSIZE0 0x00001000#define FEI_INIT_STATE_MASK (-1) /* unused */#define FEI_INIT_STATE (-1) /* unused */#define UNKNOWN (-1)/* Add Support for 82559ER Chip on motherboard */#define I82559ER_PCI_VENDOR_ID PRO100B_PCI_VENDOR_ID#define I82559ER_PCI_DEVICE_ID 0x1209#endif/* typedefs */typedef struct pciResource /* PCI_RESOURCES */ { UINT32 iobaseCsr; /* Base Address Register 0 */ UINT32 membaseCsr; /* Base Address Register 1 */ char irq; /* Interrupt Request Level */ UINT32 irqvec; /* Interrupt Request vector */ UINT32 configType; /* type of configuration */ } PCI_RESOURCES;typedef struct boardResource /* BOARD_RESOURCES */ { UINT32 type; /* type of the board */ UINT32 vendorId; /* Vendor ID */ UINT32 deviceId; /* Device ID */ UINT32 decUsrFlags; /* driver user flags */ } BOARD_RESOURCES;#ifdef INCLUDE_FEI82557ENDtypedef struct feiResource /* FEI_RESOURCE */ { UINT32 membaseCsr; /* Base Address Register 0 */ UINT32 iobaseCsr; /* Base Address Register 1 */ UINT32 membaseFlash; /* Base Address Register 2 */ char irq; /* Interrupt Request Level */ UINT32 configType; /* type of configuration - unused */ UINT32 boardType; /* type of LAN board this unit is */ UINT32 bus; /* Which PCI Bus */ UINT32 slot; /* Which slot */ UINT16 eeprom[EE_SIZE]; /* Ethernet Address of this unit */ INT32 timeout; /* timeout for the self-test */ INT32 str[6]; /* storage for the self-test result */ volatile INT32 *pResults; /* pointer to the self-test result */ UINT memLength; /* required memory size */ UINT initialStateMask; /* mask parameter to vmStateSet */ UINT initialState; /* state parameter to vmStateSet */ } FEI_RESOURCE;#endif/* locals *//* * This array defines the board-specific PCI resources, the base address * register configuration mode and the Ethernet adapter type. It's indexed * using the device number returned from PciFindDevice(). */LOCAL PCI_RESOURCES pciResources [PCI_MAX_DEV] = { {PCI_IO_ADR, PCI_MEM_ADR, PCI_INT_LVL, PCI_INT_VEC, PCI_REG_MOD}, {PCI_IO_ADR, PCI_MEM_ADR, PCI_INT_LVL, PCI_INT_VEC, PCI_REG_MOD}, {PCI_IO_ADR, PCI_MEM_ADR, PCI_INT_LVL, PCI_INT_VEC, PCI_REG_MOD}, {PCI_IO_ADR, PCI_MEM_ADR, PCI_INT_LVL, PCI_INT_VEC, PCI_REG_MOD}, {PCI_IO_ADR, PCI_MEM_ADR, PCI_INT_LVL, PCI_INT_VEC, PCI_REG_MOD}, {PCI_IO_ADR, PCI_MEM_ADR, PCI_INT_LVL, PCI_INT_VEC, PCI_REG_MOD}, {PCI_IO_ADR, PCI_MEM_ADR, PCI_INT_LVL, PCI_INT_VEC, PCI_REG_MOD}, {PCI_IO_ADR, PCI_MEM_ADR, PCI_INT_LVL, PCI_INT_VEC, PCI_REG_MOD}, };/* * This array defines board-specific vendor and device ids, flags to pass to * the drive load routine and the function used to select the media. */LOCAL BOARD_RESOURCES boardResources [] = {#ifdef INCLUDE_FEI82557END {PRO100B, PRO100B_PCI_VENDOR_ID, PRO100B_PCI_DEVICE_ID, 0}, {PRO100B, PRO100B_PCI_VENDOR_ID, I82559_PCI_DEVICE_ID, 0},#endif /* INCLUDE_FEI82557END */#ifdef INCLUDE_FEI82557END {I82559ER, I82559ER_PCI_VENDOR_ID, I82559ER_PCI_DEVICE_ID, 0},#endif /* INCLUDE_FEI82557END */ };/* END load strings */LOCAL char endLoadStr[IQ80310_MAX_END_DEVS][END_LD_STR_SIZE];/* Index of devices */LOCAL int currentEndDevice = 0;#ifdef INCLUDE_FEI82557ENDLOCAL FEI_RESOURCE feiResources [FEI_MAX_UNITS] = { {UNKNOWN, UNKNOWN, UNKNOWN, UNKNOWN, UNKNOWN, UNKNOWN, UNKNOWN, UNKNOWN, {UNKNOWN}, UNKNOWN, {UNKNOWN}, NULL, FEI_MEMSIZE0, FEI_INIT_STATE_MASK, FEI_INIT_STATE}, {UNKNOWN, UNKNOWN, UNKNOWN, UNKNOWN, UNKNOWN, UNKNOWN, UNKNOWN, UNKNOWN, {UNKNOWN}, UNKNOWN, {UNKNOWN}, NULL, FEI_MEMSIZE0, FEI_INIT_STATE_MASK, FEI_INIT_STATE}, {UNKNOWN, UNKNOWN, UNKNOWN, UNKNOWN, UNKNOWN, UNKNOWN, UNKNOWN, UNKNOWN, {UNKNOWN}, UNKNOWN, {UNKNOWN}, NULL, FEI_MEMSIZE0, FEI_INIT_STATE_MASK, FEI_INIT_STATE}, {UNKNOWN, UNKNOWN, UNKNOWN, UNKNOWN, UNKNOWN, UNKNOWN, UNKNOWN, UNKNOWN, {UNKNOWN}, UNKNOWN, {UNKNOWN}, NULL, FEI_MEMSIZE0, FEI_INIT_STATE_MASK, FEI_INIT_STATE}, };LOCAL const char *fei_phys[] = { "None", "i82553-A/B", "i82553-C", "i82503", "DP83840", "80c240", "80c24", "unknown" };enum phy_chips { NonSuchPhy=0, I82553AB, I82553C, I82503, DP83840, S80C240, S80C24, UndefinedPhy };LOCAL const char *fei_connectors[] = {" RJ45", " BNC", " AUI", " MII"};unsigned char i82559erMacAddr[] = I82559ERMAC;#endif /* INCLUDE_FEI82557END *//* imports *//* End device table - should be IQ80310_MAX_END_DEVS+1 entries */IMPORT END_TBL_ENTRY endDevTbl[];#ifdef INCLUDE_FEI82557END/* FEI specific imports */IMPORT FUNCPTR feiEndIntConnect;IMPORT FUNCPTR feiEndIntDisconnect;IMPORT END_OBJ* fei82557EndLoad (char *, void *);IMPORT void sysFlashBoardDelay (void);/* forward declarations */LOCAL UINT16 sys557eepromRead (int unit, int location);LOCAL UINT32 sys557mdioRead (int unit, int phyId, int location);LOCAL UINT32 sys557mdioWrite (int unit, int phyId, int location, int value);LOCAL int sys557IntEnable (int unit);LOCAL int sys557IntDisable (int unit);LOCAL int sys557IntAck (int unit);#endif/********************************************************************************* sysLanPciInit - prepare LAN adapter for initialization** This routine find out the PCI device, and map its memory and I/O address.** RETURNS: N/A*/STATUS sysLanPciInit (void) { PCI_RESOURCES * pRsrc; /* dec resource */ UINT32 pciBus; /* PCI Bus number */ UINT32 pspciBus; /* Pimary or Secondary PCI Bus number */ UINT32 psMemBase; /* Pimary or Secondary PCI Bus number */ UINT32 psIoBase; /* Pimary or Secondary PCI Bus number */ UINT32 pciDevice; /* PCI Device number */ UINT32 pciFunc; /* PCI Function number */ int ix; /* counter */ int iy; /* counter */ int unit = 0; /* unit numbers */ UINT32 membaseCsr; /* Base Address Register 1 */ UINT32 iobaseCsr; /* Base Address Register 0 */ char irq; /* Interrupt Request Level */ UINT32 boardType = NONE; /* board type detected */#ifdef INCLUDE_FEI82557END FEI_RESOURCE * pFeiRes; /* FEI specific info */#endif /* * The following code tries to automatically detect and configure * all instances of supported Ethernet cards. */#ifndef STANDALONE_END for (ix = 0; ix < BOARD_TYPE_NB; ix++)#else for (ix = 0; boardResources[ix].type != -1 && boardResources[ix].vendorId != -1 && boardResources[ix].deviceId != -1 && boardResources[ix].decUsrFlags != -1 ; ix++)#endif { for (iy = 0; iy < IQ80310_MAX_END_DEVS; iy++) { if (i80312PciFindDevice (boardResources[ix].vendorId, boardResources[ix].deviceId, iy, &pciBus, &pciDevice, &pciFunc) != OK) { break; /* skip to next vendor/product pair */ } /* board detected */ pspciBus = pciBus > i80312_PriBusNumber ? 1:0;
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