📄 app.inc
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// ----------------------------------------------------------------------------
// Copyright (c) 2008 Semiconductor Components Industries, LLC
// (d/b/a ON Semiconductor). All Rights Reserved.
//
// This code is the property of ON Semiconductor and may not be redistributed
// in any form without prior written permission from ON Semiconductor. The
// terms of use and warranty for this code are covered by contractual
// agreements between ON Semiconductor and the licensee.
// ----------------------------------------------------------------------------
// app.inc
// - Main application-level include file
// ----------------------------------------------------------------------------
// $Revision: 1.16 $
// $Date: 2008/10/29 18:00:25 $
// ----------------------------------------------------------------------------
#ifndef APP_INC_INCLUDED
#define APP_INC_INCLUDED
#include <wola.inc>
// -----------------------------------------------------------------------------
// Application Version
// -----------------------------------------------------------------------------
#define APP_VERSION_MAJOR 0x01
#define APP_VERSION_MINOR 0x00
#define APP_VERSION_REVISION 0x00
#define APP_VERSION (APP_VERSION_MAJOR << 12 |\
APP_VERSION_MINOR << 8 |\
APP_VERSION_REVISION)
// -----------------------------------------------------------------------------
// Compile-time Configuration Parameters
// -----------------------------------------------------------------------------
//
// WOLA configuration
//
#define WOLA_L 128
#define WOLA_N 32
#set NUM_BANDS (WOLA_N/2)
#define WOLA_OS 4
#define WOLA_DF 4
#set WOLA_R (WOLA_N/WOLA_OS)
#define WOLA_STACKING WOLA_STACKING_EVEN
#define WOLA_MODE WOLA_MODE_MONO
WOLA_CONFIGURE(WOLA_L, WOLA_N, WOLA_OS, WOLA_DF, WOLA_MODE, WOLA_STACKING)
//
// Application defines
//
// WOLA state defines - integers
// These are used with the variable XL_WOLA_STATE.
// The state is updated before each call to a WOLA function.
#define WOLA_STATE_IDLE 0
#define WOLA_STATE_ANALYSIS 1
#define WOLA_STATE_GAIN 2
#define WOLA_STATE_SYNTHESIS 3
// Interrupt flag defines - bit numbers
// These are used with the variable XL_INTERRUPT_FLAGS.
// IOP_INTERRUPT_FLAG is set after each IOP interrupt.
// WOLA_INTERRUPT_FLAG is set after each WOLA interrupt.
#define IOP_INTERRUPT_FLAG 0
#define WOLA_INTERRUPT_FLAG 1
// Set the initial gain value for all bands to 1
#define INITIAL_GAIN 0x7FFF
// Configure all GPIO pins as inputs
#define GPIO_DIR 0xFFFF
//
// IOP Configuration
//
// Configure for mono mode
// The IOP block size (IOP_BLK) is the same as WOLA_R in mono mode
// The IOP window size (IOP_WIN) is the same as WOLA_L in mono mode
#set IOP_BLK (WOLA_R)
#set IOP_WIN (WOLA_L)
// Build IOP_BLK_NN and IOP_WIN_NN keywords
#define IOP_BLK_NN paste(IOP_BLK_, IOP_BLK)
#define IOP_WIN_NN paste(IOP_WIN_, IOP_WIN)
// IOP configuration. Configure mono input and output.
#define IOP_CFG (IOP_ENABLE |\
IOP_WIN_NN |\
IOP_BLK_NN |\
IOP_INPUT_MONO |\
IOP_OUTPUT_MONO |\
IOP_AUTOMUTE_ENABLE |\
IOP_CHAN_INTERLEAVED)
//
// Clocking configuration
//
// External clock configuration:
// SYS_CLK: 3.072 MHz
// MCLK: 1.536 MHz
// PCLK: 1.536 MHz
// WOLACLK: 3.072 MHz
// USRCLK: disabled
// Internal clock configuration:
// SYS_CLK: 2.56 MHz
// MCLK: 1.28 MHz
// PCLK: 1.28 MHz
// WOLACLK: 2.56 MHz
// USRCLK: disabled
// Clocking defines
// The CLOCKING_TYPE define (below) must be set to one of these values
#define CLOCKING_EXTERNAL 0
#define CLOCKING_INTERNAL 1
// Set the clocking type
// Specify CLOCKING_EXTERNAL to use the external clock
// Specify CLOCKING_INTERNAL to use the internal clock
#define CLOCKING_TYPE CLOCKING_EXTERNAL
#if (CLOCKING_TYPE == CLOCKING_EXTERNAL)
// Enable external clock
#define CLK_EXTCLK CLK_EXTCLK_IN_ENABLE
// Disable internal oscillator
#define CLK_CTRL_CFG SYS_CLK_OFF
// MCLK configuration
#define CLK_CONFIG_MCLK CLK_MCLK_PRESCALE_2
#define MCLK 1536000
// PCLK configuration
#define CLK_CONFIG_PCLK CLK_PCLK_PRESCALE_2
#else
// Disable external clock
#define CLK_EXTCLK CLK_EXTCLK_DISABLE
// Configure internal oscillator
#define CLK_CTRL_CFG SYS_CLK_2M56
#define INTERNAL_OSC_CFG FREQ_2M56
// MCLK configuration
#define CLK_CONFIG_MCLK CLK_MCLK_PRESCALE_2
#define MCLK 1280000
// PCLK configuration
#define CLK_CONFIG_PCLK CLK_PCLK_PRESCALE_2
#endif
// Sampling frequency - 16 kHz
#define SAMP_FREQ 16000
// Disable USRCLK
#define CLK_USRCLK CLK_UCLK_DISABLE
// USRCLK configuration (needs to be defined even when USRCLK disabled)
#define CLK_CONFIG_USRCLK CLK_USRCLK_PRESCALE_1
// WOLACLK configuration
#define CLK_CONFIG_WOLACLK CLK_WOLACLK_PRESCALE_1_000
// Watchdog timer configuration
// 3.2768 s based on MCLK = 1.28 MHz
#define WATCHDOG_TIMEOUT WATCHDOG_TIMEOUT_3276M8
// Specify the minimum bootloader version - version 2.7.02
#define MIN_REQ_BOOTLOADER_VER 0x2702
// Calculate the sample frequency field for A_ADC_CTRL
Calc_Sample_Freq_Val(MCLK, SAMP_FREQ)
//
// Analog block configuration
//
// Configure ADC current
#if (CLOCKING_TYPE == CLOCKING_EXTERNAL)
// Assumes MCLK > 1.5 MHz
#define ADC_CTRL_CFG (ADC0_CURRENT_1_0X |\
ADC1_CURRENT_1_0X |\
ADC_HIGH_FREQUENCY_ENABLE)
#else
// Assumes MCLK < 1.5 MHz
#define ADC_CTRL_CFG (ADC0_CURRENT_1_0X |\
ADC1_CURRENT_1_0X |\
ADC_HIGH_FREQUENCY_DISABLE)
#endif
// Configure DAC current and oversampling
#define DAC_CTRL_CFG (DAC1_CURRENT_1_0X |\
DAC0_CURRENT_1_0X |\
OSR_PRESCALE_1 )
// Input stage configuration
// Enable channel 0 on AI0
#define INPUT_CFG (AD0_ENABLE |\
AD0_SEL_AI0 |\
AD1_DISABLE |\
AD1_SEL_AI2)
// Configure the ADC sample delay for no delay
// This is only relevant if both ADCs are enabled
#define SAMPLE_DELAY_INT_CFG (DEL_INT_CTRL_AD0_LEAD |\
(0 << DEL_INT_CTRL_DEL_INT_POS))
#define SAMPLE_DELAY_FRAC_CFG (0 << DEL_FRAC_CTRL_DEL_FRAC_POS)
// Input gain configuration
#define IN_GAIN_CFG (PGAIN0_BYPASS |\
PGAIN1_BYPASS)
// Input filter configuration
#define INFILT_CTRL_CFG (LINE_OUT_INVERT_DISABLE |\
LINE_OUT_DISABLE |\
LPF_IN_ACTIVE_20KHZ |\
DC_REMOVE_CUTOFF_20HZ)
// Define decimation filter gain values for each channel. These values are
// specified as (desired gain)*10^7 and are used by the macro
// Calc_Gain_Factor_Val() to calculate the gain factor values.
#define CH0_DF_GAIN 10000000
#define CH1_DF_GAIN 10000000
// Output stage configuration
// Enable direct digital output 0
#define OUTPUT_CFG (DA0_DISABLE |\
DA1_DISABLE |\
OD0_ENABLE |\
OD1_DISABLE |\
LPF_OUT_ACTIVE_10KHZ |\
OUTPUT_HIGHPOWER_DISABLE)
// Configure output attenuation
// Mute output 1 for mono configuration
#define OUT_ATT_CFG (OUTPUT0_ATTN_BYPASS |\
OUTPUT1_ATTN_BYPASS |\
OUTPUT0_PASS |\
OUTPUT1_MUTE)
//
// Interrupt controller configuration
//
// Enable interrupts from the Watchdog, WOLA, Timer and IOP
#define INT_ENABLE_VAL (INT_EBL_WATCHDOG |\
INT_EBL_WOLA_DONE |\
INT_EBL_TIMER |\
INT_EBL_IO_BLOCK_FULL)
// Configure all interrupts to have the same priority
#define INT_CFG INT_AUTO_ACK_ENABLE
// There are no high priority interrupts
#define INT_HIGHEST_PRIORITY INT_PRIO_DEFAULT
//
// Power supply configuration
//
// Set power supply to high voltage mode, and set SPI port to use
// VDDC for voltage levels (set to VDBL for data logging)
#if (CLOCKING_TYPE == CLOCKING_EXTERNAL)
#define PSU_CFG (VDDC_MODE_HIGH_VOLTAGE | VSPI_MODE_VDDC)
#else
#define PSU_CFG (VDDC_MODE_LOW_VOLTAGE | VSPI_MODE_VDDC)
#endif
// -----------------------------------------------------------------------------
// Application Variables
// -----------------------------------------------------------------------------
.extern XL_INTERRUPT_FLAGS
.extern XL_WOLA_STATE
// -----------------------------------------------------------------------------
// Application Interface
// -----------------------------------------------------------------------------
//
// Routines from app_ISR.ss
//
// Refer to the function headers in app_ISR.ss for more information
// about these routines.
.extern App_IOP_ISR
.extern App_WOLA_ISR
.extern App_WATCHDOG_ISR
//
// Routine from app_init.ss
//
// Refer to the function header in app_init.ss for more information
// about this routine.
.extern App_Initialize
// -----------------------------------------------------------------------------
// External version information
// -----------------------------------------------------------------------------
// Version symbols for included algorithms/utility modules.
// The tone generation version number is defined in Tone.inc.
// A global assembler symbol with the name Tone_Version is set equal to
// this define in Tone.ss.
.extern Tone_Version
#endif // APP_INC_INCLUDED
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