app.ss

AMIS單晶片開發範本

// ---------------------------------------------------------------------------
// Copyright (c) 2008 Semiconductor Components Industries, LLC
// (d/b/a ON Semiconductor). All Rights Reserved.
//
// This code is the property of ON Semiconductor and may not be redistributed
// in any form without prior written permission from ON Semiconductor. The
// terms of use and warranty for this code are covered by contractual
// agreements between ON Semiconductor and the licensee.
// ---------------------------------------------------------------------------
// app.ss
// - Main application-level source file
// ---------------------------------------------------------------------------
// $Revision: 1.16 $
// $Date: 2008/10/29 18:00:31 $
// ---------------------------------------------------------------------------
#include <sk25_hw.inc>
#include <boss.inc>
#include <bat.inc>
#include "app.inc"

// ---------------------------------------------------------------------------
// Application Version
// ---------------------------------------------------------------------------

// Set the global assembler symbol App_Version equal to the
// pre-processor define APP_VERSION that was defined in app.inc
.global App_Version
    .equ App_Version, APP_VERSION

// ---------------------------------------------------------------------------
// Main
// ---------------------------------------------------------------------------
    Mem_Start_Absolute_Segment(app_main_segment, SYSTEM_MEMORY_TYPE_P, 0x1000)

.global main
main:
    // Clear the status register
    CLR ST

    BRA start_app
    
    // Put the application version in P memory at address 0x1003
.data App_Version    

start_app:

    // Set up stack pointers
    LDI R3, SYS_STACK_TOP
    LDI R7, USR_STACK_TOP
  
    // For development purposes, disable restricted mode to make it easier
    // to download a new application.
    // REMOVE THESE LINES IN YOUR FINAL APPLICATION IF YOU REQUIRE
    // RESTRICTED MODE
    LDI R4, D_ACCESS_CFG
    RES (R4), ACCESS_CFG_ACCESS_MODE_POS    

    // Call the application's initialization routine
    CALL App_Initialize

    // Call any algorithm-specific initialization routines here

    // Turn on overflow protection in Status Register
    SET ST, ST_OP

    // Configure and start the IOP
    Set_IOP_Cfg(IOP_CFG)

    // Clear any interrupt requests that may be pending
    Interrupt_Ack(INT_ACK_ALL_INTS)
    
    // Enable interrupts
    Enable_Int

// ---------------------------------------------------------------------------
// Main loop 
// ---------------------------------------------------------------------------
mainloop:
    
    // Disable interrupts while checking flags
    Disable_Int 

    // Check the interrupt flags
    LD A, XL_INTERRUPT_FLAGS, X
    
    // Check IOP interrupt done flag
    TST AH, IOP_INTERRUPT_FLAG
    BRA iop_done, NZ    
    
    // Check the WOLA interrupt flag
    TST AH, WOLA_INTERRUPT_FLAG
    BRA process_wola_interrupt, NZ
                        
    // Refresh the Watchdog
    Watchdog_Refresh

    // Re-enable interrupts and sleep until an interrupt is received.
    SLEEP IE

    // Loop back to see which interrupt has occurred
    BRA mainloop    


// ---------------------------------------------------------------------------
// IOP done
// ---------------------------------------------------------------------------
iop_done:

    // Clear the IOP done flag
    RES AH, IOP_INTERRUPT_FLAG
    LD XL_INTERRUPT_FLAGS, A, X

    // Re-enable interrupts
    Enable_Int
    
    // Do Pre-Analysis processing here

    // Advance the WOLA state
    LDSI A, WOLA_STATE_ANALYSIS
    LD XL_WOLA_STATE, A, X
    
    // Launch WOLA Analysis
    WOLA_Start(UCODE_ANALYSIS_FUNCTION)

    // Do While Analysis processing here

    // Check if any more interrupts have occurred
    BRA mainloop    


// ---------------------------------------------------------------------------
// Process WOLA interrupt
// ---------------------------------------------------------------------------               
process_wola_interrupt:

    // Clear WOLA interrupt flag
    RES AH, WOLA_INTERRUPT_FLAG
    LD XL_INTERRUPT_FLAGS, A, X

    // Re-enable interrupts
    Enable_Int  

    // Determine which WOLA function just completed
    LD A, XL_WOLA_STATE, X

    // Check for Analysis done
    CMSI A, WOLA_STATE_ANALYSIS
    BRA wola_analysis_done, Z

    // Check for Gain Application done
    CMSI A, WOLA_STATE_GAIN
    BRA wola_gain_application_done, Z

    // Check for Synthesis done
    CMSI A, WOLA_STATE_SYNTHESIS
    BRA wola_synthesis_done, Z

    // Shouldn抰 get here - break if debugging
    BREAK
    BRA mainloop


// ---------------------------------------------------------------------------
// WOLA Analysis done
// ---------------------------------------------------------------------------
wola_analysis_done:

    // Do Post Analysis processing here
    // If Audio Mode is MONO_IN_STEREO_OUT :
    // To achieve mono in/stereo out, we perform stereo WOLA analysis but 
    // overwrite the analysis results for channel 1 with analysis results  
    // for channel 0.
    // Depending on whether even or odd stacking is used for the WOLA
    // filterbank, the analysis results are stored in the X memory
    // differently. Therefore, different methods are used to copy
    // analysis results depending of the WOLA stacking. 
    // NOTE: For channel 0, the analysis results for the lower-indexed 
    // bands are stored at lower memory addresses.  On the other 
    // hand, for channel 1, the analysis results for the 
    // lower-indexed bands are stored at higher memory addresses.
    // See the Hardware Reference Manual for details

    #if WOLA_CHANNEL_CONFIG == MONO_IN_STEREO_OUT    

        #if WOLA_STACKING == WOLA_STACKING_ODD
            // ODD stacking:
            // Starting at band 0, we copy the analysis results from channel 0
            // to channel 1.
            
            // Configure PCFG1 so that R1 runs in non-circular mode with step 
            // size of -3. (i.e. R1+! decrements R1 by 3)  
            Config_Addr_Reg(1, 0, PCFG_POWER_OF_TWO, -3)
                                     
            // Copy the real-part of the analysis results
            LDI R0, D_WOLA_RESULT_BASE   // This location stores the 
                                         // real-part of the analysis 
                                         // result of band 0 for channel 0. 
            LDI R1, D_WOLA_RESULT_BASE+(4*NUM_BANDS )-2 
                                         // This location stores the 
                                         // real-part of the analysis result
                                         // of band 0 for channel 1 
        
            LDSI LC0, (NUM_BANDS -1)// Repeat the next lines NUM_Bands times
 
        copy_analysis_result_odd:
                LD AL, (R0+)        // Copy the real part first. Increment both
                LD (R1+), AL        // R0 and R1 to point to the imaginary part.
                LD AL, (R0+)        // Copy the imaginary part and increment R0 
                LD (R1+!), AL       // and decrement R1 to point to the next 
                                    // real part.  
            
            DBNZ0 copy_analysis_result_odd
    
        
        #else
            // EVEN stacking:
            // We copy the analysis results of the DC and Nyquist bands first.
            // Then, the analysis results for the rest of the bands are copied.
        
            // In even stacking, the memory locations at D_WOLA_RESULT_BASE  
            // and (D_WOLA_RESULT_BASE+1) store the DC band analysis results 
            // for channel 0 and channel 1, respectively.  
            LDI R0, D_WOLA_RESULT_BASE
            LDI R1, D_WOLA_RESULT_BASE+1
    
            LD  AL, (R0)            // Overwrite the DC band analysis result of 
            LD  (R1), AL            // channel 1 with the DC band analysis 
                                    // result of channel 0. 
                                                            
            // In even stacking, the memory locations at  
            // (D_WOLA_RESULT_BASE+2*NUM_BANDS ) and 
            // (D_WOLA_RESULT_BASE+2*NUM_BANDS +1) 
            // store the Nyquist band analysis results for channel 0 and 
            // channel 1, respectively. 
            LDI R0, D_WOLA_RESULT_BASE+(2*NUM_BANDS )
            LDI R1, D_WOLA_RESULT_BASE+(2*NUM_BANDS )+1
            LD  AL, (R0)            // Overwrite the Nyquist band analysis  
                                    // result of channel 1 with the Nyquist
            LD  (R1), AL            // band analysis result of channel 0. 
            
            // Configure PCFG1 so that R1 runs in non-circular mode with step 
            // size of -3. (i.e. R1+! decrements R1 by 3)   
            Config_Addr_Reg(1, 0, PCFG_POWER_OF_TWO, -3)
                                    
            // Copy the rest of analysis results (the real part) from channel 0 
            // to channel 1                             
            LDI R0, D_WOLA_RESULT_BASE+2
            LDI R1, D_WOLA_RESULT_BASE+(4*NUM_BANDS )-2
    
            LDSI LC0, (NUM_BANDS -2)// Repeat the next lines (NUM_BANDS-1) times
        copy_analysis_result_even:
                LD AL, (R0+)       // Copy the real part first. Increment both
                LD (R1+), AL       // R0 and R1 to point to the imaginary part.
                LD AL, (R0+)       // Copy the imaginary part and increment R0 
                LD (R1+!), AL      // and decrement R1 to point to the next 
                                   // real part.                         
            DBNZ0 copy_analysis_result_even
    
           
        #endif
    #endif


    // Advance the WOLA state
    LDSI A, WOLA_STATE_GAIN
    LD XL_WOLA_STATE, A, X
    
    // Launch WOLA Gain Application
    WOLA_Start(UCODE_GAIN_FUNCTION)

    // Do While Gain Application processing here

    // Check if any more interrupts have occurred
    BRA mainloop    


// ---------------------------------------------------------------------------
// WOLA Gain Application done
// ---------------------------------------------------------------------------
wola_gain_application_done:

    // Do Post Gain Application processing here

    // Advance the WOLA state
    LDSI A, WOLA_STATE_SYNTHESIS
    LD XL_WOLA_STATE, A, X

    // Launch WOLA Synthesis
    WOLA_Start(UCODE_SYNTHESIS_FUNCTION)

    // Do While Synthesis processing here

    // Check if any more interrupts have occurred
    BRA mainloop    


// ---------------------------------------------------------------------------
// WOLA Synthesis done
// ---------------------------------------------------------------------------
wola_synthesis_done:

    // Advance the WOLA state
    LDSI A, WOLA_STATE_IDLE
    LD XL_WOLA_STATE, A, X
  
    // Do Post Synthesis processing here

    // Check if any more interrupts have occurred
    BRA mainloop