sed_drv.h~

Linux kernel driver for Epson s1d13700 LCD controller.

#ifndef _SEDDRV_H
#define _SEDDRV_H

#include <linux/ioctl.h>
#include "def_unix_types.h"
#define DEBUG_MSG
#define PACKED __attribute__((packed))
#define MAJOR_NUM 	250
#define IOCTL_INIT_LCD  	_IO (MAJOR_NUM, 1)
#define IOCTL_CLEAN_LCD  	_IO (MAJOR_NUM, 2)
#define IOCTL_TEST_OUT  	_IO (MAJOR_NUM, 3)
#define IOCTL_SHOW_LOGO 	_IO (MAJOR_NUM, 4)
#define IOCTL_GRAPH_CTL 	_IOR  (MAJOR_NUM, 5, char*)
#define IOCTL_GET_REGION 	_IOWR (MAJOR_NUM, 6, char*)
#define IOCTL_PUT_REGION 	_IOWR (MAJOR_NUM, 7, char*)
#define IOCTL_BUF_WRITE 	_IOWR (MAJOR_NUM, 8, char*)
#define IOCTL_BUF_READ 		_IOWR (MAJOR_NUM, 9, char*)
#define IOCTL_COPY_LCD 		_IO (MAJOR_NUM,10)

#define SED_ERR_NO_ERROR 0
#define SED_ERR_FROM_USER 1
#define SED_ERR_TO_USER 2
#define SED_ERR_UNSUPPORTED 3
struct M7IoControlStruct
{
    void *lpInBuffer;
    DWORD nInBufferSize;
    void *lpOutBuffer;
    DWORD nOutBufferSize;
}PACKED;




#define DEVICE_NAME 	"sed_drv"

#define BASE_ADDR 	0x50000000	//Base address for NCS4 - SED
#define ADDR_LEN 	0xFFFF	//First 64 Kb

#define TST_FPGA_REG 	0x100	// Here is test register for read in FPGA

//#######################################################
//consts for init lcd
#define REG0000_SYSTEMSET_P1		0x00
#define REG0001_SYSTEMSET_P2		0x01
#define REG0002_SYSTEMSET_P3		0x02
#define REG0003_SYSTEMSET_P4		0x03
#define REG0004_SYSTEMSET_P5		0x04
#define REG0005_SYSTEMSET_P6		0x05
#define REG0006_SYSTEMSET_P7		0x06
#define REG0007_SYSTEMSET_P8		0x07
#define REG0008_SLEEPIN			0x08
#define REG0009_DISPONOFF		0x09
#define REG000A_DISPONOFF_P1	0x0a//10
#define REG000B_SCROLL_P1		0x0b//11
#define REG000C_SCROLL_P2		0x0c//12
#define REG000D_SCROLL_P3		0x0d//13
#define REG000E_SCROLL_P4		0x0e//14
#define REG000F_SCROLL_P5		0x0f//15
#define REG0010_SCROLL_P6		0x10//16
#define REG0011_SCROLL_P7		0x11//17
#define REG0012_SCROLL_P8		0x12//18
#define REG0013_SCROLL_P9		0x13//19
#define REG0014_SCROLL_P10		0x14//20
#define REG0015_CSRFORM_P1		0x15//21
#define REG0016_CSRFORM_P2		0x16//22
#define REG0017_CSRDIR_P1		0x17//23
#define REG0018_OVLAY_P1		0x18//24
#define REG0019_CGRAMADDR_P1		0x19//25
#define REG001A_CGRAMADDR_P2		0x1A//26
#define REG001B_HDOTSCR_P1		0x1b//27
#define REG001C_CSRW_P1			0x1c//28
#define REG001D_CSRW_P2			0x1d//29
#define REG001E_CSRR_P1			0x1e//30
#define REG001F_CSRR_P2			0x1f//31
#define REG0020_GRAYSCALE_P1		0x20//32

struct S1D_REGS
{
	WORD  Index;
	BYTE  Value;
};


#define PANEL_WIDTH	320
#define PANEL_HEIGHT	240


static struct S1D_REGS aS1DRegs[] = 
{
	{ REG0000_SYSTEMSET_P1,		0x31 },
	{ REG0001_SYSTEMSET_P2,		0x87 },
	{ REG0002_SYSTEMSET_P3,		0x07 },
	{ REG0003_SYSTEMSET_P4,		0x27 },
	{ REG0004_SYSTEMSET_P5,		0x32 },
	{ REG0005_SYSTEMSET_P6,		0xEF },
	{ REG0006_SYSTEMSET_P7,		0x28 },
	{ REG0007_SYSTEMSET_P8,		0x00 },
	{ REG0008_SLEEPIN,		0x00 },
	{ REG0009_DISPONOFF,		0x01 },
	{ REG000A_DISPONOFF_P1,		0x05 },
	{ REG000B_SCROLL_P1,		0x00 },
	{ REG000C_SCROLL_P2,		0x00 },
	{ REG000D_SCROLL_P3,		0xc7 },
	{ REG000E_SCROLL_P4,		0x80 },
	{ REG000F_SCROLL_P5,		0x1f },
	{ REG0010_SCROLL_P6,		0x27 },
	{ REG0011_SCROLL_P7,		0x20 },
	{ REG0012_SCROLL_P8,		0x30 },
	{ REG0013_SCROLL_P9,		0x24 },
	{ REG0014_SCROLL_P10,		0x60 },
	{ REG0015_CSRFORM_P1,		0x07 },
	{ REG0016_CSRFORM_P2,		0x87 },
	{ REG0017_CSRDIR_P1,		0x00 },
	{ REG0018_OVLAY_P1,		0x00 },
	{ REG0019_CGRAMADDR_P1,		0x00 },
	{ REG001A_CGRAMADDR_P2,		0x70 },
	{ REG001B_HDOTSCR_P1,		0x00 },
	{ REG001C_CSRW_P1,		0x00 },
	{ REG001D_CSRW_P2,		0x00 },
	{ REG0020_GRAYSCALE_P1,		0x00 },
};
#endif