interrupt_controller.h

Leon3 & GPLIB libraries for CYGWIN/UNIX

#ifndef INTERRUPT_CONTROLLER_HEADER
#define INTERRUPT_CONTROLLER_HEADER

/*
 *  Interrupt controller register offsets
 */
#define INT_CNTL_IRQ_LEVEL_REG_OFFSET             0x00
#define INT_CNTL_IRQ_PENDING_REG_OFFSET           0x04
#define INT_CNTL_IRQ_FORCE_REG_OFFSET             0x08
#define INT_CNTL_IRQ_CLEAR_REG_OFFSET             0x0C
#define INT_CNTL_MSR_OFFSET                       0x10
#define INT_CNTL_BROADCAST_REG_OFFSET             0x14

#define INT_CNTL_PROCESSOR_IRQ_MASK_REG_OFFSET    0x40
#define INT_CNTL_PROCESSOR_IRQ_FORCE_REG_OFFSET   0x80

/*
 *  Interrupt controller register addresses
 */
#define INT_CNTL_IRQ_LEVEL_REG                  (INT_CTRL_BASE_ADDR + INT_CNTL_IRQ_LEVEL_REG_OFFSET)
#define INT_CNTL_IRQ_PENDING_REG                (INT_CTRL_BASE_ADDR + INT_CNTL_IRQ_PENDING_REG_OFFSET)
#define INT_CNTL_IRQ_FORCE_REG                  (INT_CTRL_BASE_ADDR + INT_CNTL_IRQ_FORCE_REG_OFFSET)
#define INT_CNTL_IRQ_CLEAR_REG                  (INT_CTRL_BASE_ADDR + INT_CNTL_IRQ_CLEAR_REG_OFFSET)
#define INT_CNTL_MSR                            (INT_CTRL_BASE_ADDR + INT_CNTL_MSR_OFFSET)
#define INT_CNTL_BROADCAST_REG                  (INT_CTRL_BASE_ADDR + INT_CNTL_BROADCAST_REG_OFFSET)
#define INT_CNTL_PROCESSOR_IRQ_MASK_REG         (INT_CTRL_BASE_ADDR + INT_CNTL_PROCESSOR_IRQ_MASK_REG_OFFSET)
#define INT_CNTL_PROCESSOR_IRQ_FORCE_REG        (INT_CTRL_BASE_ADDR + INT_CNTL_PROCESSOR_IRQ_FORCE_REG_OFFSET)

#endif