io_map.c

飞思卡尔ee的运用

volatile PERMSTR _PERM;                                    /* Port M Pull Device Enable Register; 0x00000214 */
volatile PPSMSTR _PPSM;                                    /* Port M Polarity Select Register; 0x00000215 */
volatile WOMMSTR _WOMM;                                    /* Port M Wired-Or Mode Register; 0x00000216 */
volatile PTPSTR _PTP;                                      /* Port P I/O Register; 0x00000218 */
volatile PTIPSTR _PTIP;                                    /* Port P Input Register; 0x00000219 */
volatile DDRPSTR _DDRP;                                    /* Port P Data Direction Register; 0x0000021A */
volatile RDRPSTR _RDRP;                                    /* Port P Reduced Drive Register; 0x0000021B */
volatile PERPSTR _PERP;                                    /* Port P Pull Device Enable Register; 0x0000021C */
volatile PPSPSTR _PPSP;                                    /* Port P Polarity Select Register; 0x0000021D */
volatile WOMPSTR _WOMP;                                    /* Port P Wired-OR Mode Register; 0x0000021E */
volatile PTLSTR _PTL;                                      /* Port L I/O Register; 0x00000230 */
volatile PTILSTR _PTIL;                                    /* Port L Input Register; 0x00000231 */
volatile DDRLSTR _DDRL;                                    /* Port L Data Direction Register; 0x00000232 */
volatile RDRLSTR _RDRL;                                    /* Port L Reduced Drive Register; 0x00000233 */
volatile PERLSTR _PERL;                                    /* Port L Pull Device Enable Register; 0x00000234 */
volatile PPSLSTR _PPSL;                                    /* Port L Polarity Select Register; 0x00000235 */
volatile PTUSTR _PTU;                                      /* Port U I/O Register; 0x00000238 */
volatile PTIUSTR _PTIU;                                    /* Port U Input Register; 0x00000239 */
volatile DDRUSTR _DDRU;                                    /* Port U Data Direction Register; 0x0000023A */
volatile SRRUSTR _SRRU;                                    /* Port U Slew Rate Register; 0x0000023B */
volatile PERUSTR _PERU;                                    /* Port U Pull Device Enable Register; 0x0000023C */
volatile PPSUSTR _PPSU;                                    /* Port U Polarity Select Register; 0x0000023D */
volatile PTVSTR _PTV;                                      /* Port V I/O Register; 0x00000240 */
volatile PTIVSTR _PTIV;                                    /* Port V Input Register; 0x00000241 */
volatile DDRVSTR _DDRV;                                    /* Port V Data Direction Register; 0x00000242 */
volatile SRRVSTR _SRRV;                                    /* Port V Reduced Drive Register; 0x00000243 */
volatile PERVSTR _PERV;                                    /* Port V Pull Device Enable Register; 0x00000244 */
volatile PPSVSTR _PPSV;                                    /* Port V Polarity Select Register; 0x00000245 */
volatile PTADSTR _PTAD;                                    /* Port AD I/O Register; 0x00000251 */
volatile PTIADSTR _PTIAD;                                  /* Port AD Input Register; 0x00000253 */
volatile DDRADSTR _DDRAD;                                  /* Port AD Data Direction Register; 0x00000255 */
volatile RDRADSTR _RDRAD;                                  /* Port AD Reduced Drive Register; 0x00000257 */
volatile PERADSTR _PERAD;                                  /* Port AD Pull Device Enable Register; 0x00000259 */
volatile PPSADSTR _PPSAD;                                  /* Port AD Polarity Select Register; 0x0000025B */
volatile PIEADSTR _PIEAD;                                  /* Port AD Interrupt Enable Register; 0x0000025D */
volatile PIFADSTR _PIFAD;                                  /* Port AD Interrupt Flag Register; 0x0000025F */
volatile RTZ0CTLSTR _RTZ0CTL;                              /* SSD 0 Return to Zero Control register; 0x00000288 */
volatile MDC0CTLSTR _MDC0CTL;                              /* SSD 0 Modulus Down Counter Control register; 0x00000289 */
volatile SSD0CTLSTR _SSD0CTL;                              /* SSD 0 Stepper Stall Detector Control register; 0x0000028A */
volatile SSD0FLGSTR _SSD0FLG;                              /* SSD 0 Stepper Stall Detector Flag register; 0x0000028B */
volatile RTZ1CTLSTR _RTZ1CTL;                              /* SSD 1 Return to Zero Control register; 0x00000290 */
volatile MDC1CTLSTR _MDC1CTL;                              /* SSD 1 Modulus Down Counter Control register; 0x00000291 */
volatile SSD1CTLSTR _SSD1CTL;                              /* SSD 1 Stepper Stall Detector Control register; 0x00000292 */
volatile SSD1FLGSTR _SSD1FLG;                              /* SSD 1 Stepper Stall Detector Flag register; 0x00000293 */
/* NVFPROT0 - macro for reading non volatile register      Non volatile Block 0 Flash Protection Register; 0x0000FF0D */
/* NVFSEC - macro for reading non volatile register        Non volatile Flash Security Register; 0x0000FF0F */


/* * * * *  16-BIT REGISTERS  * * * * * * * * * * * * * * * */
volatile PARTIDSTR _PARTID;                                /* Part ID Register; 0x0000001A */
volatile DBGTBSTR _DBGTB;                                  /* Debug Trace Buffer Register; 0x00000022 */
volatile DBGCCSTR _DBGCC;                                  /* Debug Comparator C Register; 0x00000026 */
volatile DBGCASTR _DBGCA;                                  /* Debug Comparator A Register; 0x0000002B */
volatile DBGCBSTR _DBGCB;                                  /* Debug Comparator B Register; 0x0000002E */
volatile TCNTSTR _TCNT;                                    /* Timer Count Register; 0x00000044 */
volatile TC0STR _TC0;                                      /* Timer Input Capture/Output Compare Register 0; 0x00000050 */
volatile TC1STR _TC1;                                      /* Timer Input Capture/Output Compare Register 1; 0x00000052 */
volatile TC2STR _TC2;                                      /* Timer Input Capture/Output Compare Register 2; 0x00000054 */
volatile TC3STR _TC3;                                      /* Timer Input Capture/Output Compare Register 3; 0x00000056 */
volatile TC4STR _TC4;                                      /* Timer Input Capture/Output Compare Register 4; 0x00000058 */
volatile TC5STR _TC5;                                      /* Timer Input Capture/Output Compare Register 5; 0x0000005A */
volatile TC6STR _TC6;                                      /* Timer Input Capture/Output Compare Register 6; 0x0000005C */
volatile TC7STR _TC7;                                      /* Timer Input Capture/Output Compare Register 7; 0x0000005E */
volatile PACNTSTR _PACNT;                                  /* Pulse Accumulators Count Register; 0x00000062 */
volatile ATDCTL01STR _ATDCTL01;                            /* ATD Control Register 01; 0x00000080 */
volatile ATDCTL23STR _ATDCTL23;                            /* ATD Control Register 23; 0x00000082 */
volatile ATDCTL45STR _ATDCTL45;                            /* ATD Control Register; 0x00000084 */
volatile ATDDIENSTR _ATDDIEN;                              /* ATD Input Enable Register; 0x0000008C */
volatile PORTADSTR _PORTAD;                                /* Port AD0 Data; 0x0000008E */
volatile ATDDR0STR _ATDDR0;                                /* ATD Conversion Result Register 0; 0x00000090 */
volatile ATDDR1STR _ATDDR1;                                /* ATD Conversion Result Register 1; 0x00000092 */
volatile ATDDR2STR _ATDDR2;                                /* ATD Conversion Result Register 2; 0x00000094 */
volatile ATDDR3STR _ATDDR3;                                /* ATD Conversion Result Register 3; 0x00000096 */
volatile ATDDR4STR _ATDDR4;                                /* ATD Conversion Result Register 4; 0x00000098 */
volatile ATDDR5STR _ATDDR5;                                /* ATD Conversion Result Register 5; 0x0000009A */
volatile ATDDR6STR _ATDDR6;                                /* ATD Conversion Result Register 6; 0x0000009C */
volatile ATDDR7STR _ATDDR7;                                /* ATD Conversion Result Register 7; 0x0000009E */
volatile SCI0BDSTR _SCI0BD;                                /* SCI 0 Baud Rate Register; 0x000000C8 */
volatile PWMCNT01STR _PWMCNT01;                            /* PWM Channel Counter 01 Register; 0x000000EC */
volatile PWMCNT23STR _PWMCNT23;                            /* PWM Channel Counter 23 Register; 0x000000EE */
volatile PWMCNT45STR _PWMCNT45;                            /* PWM Channel Counter 45 Register; 0x000000F0 */
volatile PWMPER01STR _PWMPER01;                            /* PWM Channel Period 01 Register; 0x000000F2 */
volatile PWMPER23STR _PWMPER23;                            /* PWM Channel Period 23 Register; 0x000000F4 */
volatile PWMPER45STR _PWMPER45;                            /* PWM Channel Period 45 Register; 0x000000F6 */
volatile PWMDTY01STR _PWMDTY01;                            /* PWM Channel Duty 01 Register; 0x000000F8 */
volatile PWMDTY23STR _PWMDTY23;                            /* PWM Channel Duty 23 Register; 0x000000FA */
volatile PWMDTY45STR _PWMDTY45;                            /* PWM Channel Duty 45 Register; 0x000000FC */
volatile CAN0RXTSRSTR _CAN0RXTSR;                          /* MSCAN 0 Receive Time Stamp Register; 0x0000016E */
volatile CAN0TXTSRSTR _CAN0TXTSR;                          /* MSCAN 0 Transmit Time Stamp Register; 0x0000017E */
volatile MCPERSTR _MCPER;                                  /* Motor Controller Period Register, with DITH = 0; 0x000001C2 */
volatile MCDC0STR _MCDC0;                                  /* Motor Controller Duty Cycle Register 0; 0x000001E0 */
volatile MCDC1STR _MCDC1;                                  /* Motor Controller Duty Cycle Register 1; 0x000001E2 */
volatile MCDC2STR _MCDC2;                                  /* Motor Controller Duty Cycle Register 2; 0x000001E4 */
volatile MCDC3STR _MCDC3;                                  /* Motor Controller Duty Cycle Register 3; 0x000001E6 */
volatile MCDC4STR _MCDC4;                                  /* Motor Controller Duty Cycle Register 4; 0x000001E8 */
volatile MCDC5STR _MCDC5;                                  /* Motor Controller Duty Cycle Register 5; 0x000001EA */
volatile MCDC6STR _MCDC6;                                  /* Motor Controller Duty Cycle Register 6; 0x000001EC */
volatile MCDC7STR _MCDC7;                                  /* Motor Controller Duty Cycle Register 7; 0x000001EE */
volatile MDC0CNTSTR _MDC0CNT;                              /* SSD 0 Modulus Down-Counter Count register; 0x0000028C */
volatile ITG0ACCSTR _ITG0ACC;                              /* SSD 0 Integration Accumulator register; 0x0000028E */
volatile MDC1CNTSTR _MDC1CNT;                              /* SSD 1 Modulus Down-Counter Count register; 0x00000294 */
volatile ITG1ACCSTR _ITG1ACC;                              /* SSD 1 Integration Accumulator register; 0x00000296 */
/* BAKEY0 - macro for reading non volatile register        Backdoor Access Key 0; 0x0000FF00 */
/* BAKEY1 - macro for reading non volatile register        Backdoor Access Key 1; 0x0000FF02 */
/* BAKEY2 - macro for reading non volatile register        Backdoor Access Key 2; 0x0000FF04 */
/* BAKEY3 - macro for reading non volatile register        Backdoor Access Key 3; 0x0000FF06 */

/*lint -restore */

/* EOF */
/*
** ###################################################################
**
**     This file was created by UNIS Processor Expert 2.98 [03.98]
**     for the Freescale HCS12 series of microcontrollers.
**
** ###################################################################
*/