📄 io_map.c
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/** ###################################################################
** THIS BEAN MODULE IS GENERATED BY THE TOOL. DO NOT MODIFY IT.
** Filename : IO_Map.C
** Project : eeprom
** Processor : MC9S12HZ64CFU
** Beantype : IO_Map
** Version : Driver 01.06
** Compiler : CodeWarrior HC12 C Compiler
** Date/Time : 2008-12-15, 上午 10:41
** Abstract :
** IO_Map.h - implements an IO device's mapping.
** This module contains symbol definitions of all peripheral
** registers and bits.
** Settings :
**
** Contents :
** No public methods
**
** (c) Copyright UNIS, spol. s r.o. 1997-2007
** UNIS, spol. s r.o.
** Jundrovska 33
** 624 00 Brno
** Czech Republic
** http : www.processorexpert.com
** mail : info@processorexpert.com
** ###################################################################*/
/* Based on CPU DB MC9S12HZ64_80, version 2.87.443 (RegistersPrg V2.20) */
/* DataSheet : MC9S12HZ256 Rev. 2.01 10/2005 */
#include "PE_types.h"
#include "IO_Map.h"
/*lint -save -esym(765, *) */
/* * * * * 8-BIT REGISTERS * * * * * * * * * * * * * * * */
volatile PORTASTR _PORTA; /* Port A Register; 0x00000000 */
volatile PORTBSTR _PORTB; /* Port B Register; 0x00000001 */
volatile DDRASTR _DDRA; /* Port A Data Direction Register; 0x00000002 */
volatile DDRBSTR _DDRB; /* Port B Data Direction Register; 0x00000003 */
volatile PORTESTR _PORTE; /* Port E Register; 0x00000008 */
volatile DDRESTR _DDRE; /* Port E Data Direction Register; 0x00000009 */
volatile PEARSTR _PEAR; /* Port E Assignment Register; 0x0000000A */
volatile MODESTR _MODE; /* Mode Register; 0x0000000B */
volatile PUCRSTR _PUCR; /* Pull-Up Control Register; 0x0000000C */
volatile RDRIVSTR _RDRIV; /* Reduced Drive of I/O Lines; 0x0000000D */
volatile EBICTLSTR _EBICTL; /* External Bus Interface Control; 0x0000000E */
volatile INITRMSTR _INITRM; /* Initialization of Internal RAM Position Register; 0x00000010 */
volatile INITRGSTR _INITRG; /* Initialization of Internal Registers Position Register; 0x00000011 */
volatile INITEESTR _INITEE; /* Initialization of Internal EEPROM Position Register; 0x00000012 */
volatile MISCSTR _MISC; /* Miscellaneous System Control Register; 0x00000013 */
volatile ITCRSTR _ITCR; /* Interrupt Test Control Register; 0x00000015 */
volatile ITESTSTR _ITEST; /* Interrupt Test Register; 0x00000016 */
volatile VREGCTRLSTR _VREGCTRL; /* VREG_3V3 - Control Register; 0x00000019 */
volatile MEMSIZ0STR _MEMSIZ0; /* Memory Size Register Zero; 0x0000001C */
volatile MEMSIZ1STR _MEMSIZ1; /* Memory Size Register One; 0x0000001D */
volatile INTCRSTR _INTCR; /* Interrupt Control Register; 0x0000001E */
volatile HPRIOSTR _HPRIO; /* Highest Priority I Interrupt; 0x0000001F */
volatile DBGC1STR _DBGC1; /* Debug Control Register 1; 0x00000020 */
volatile DBGSCSTR _DBGSC; /* Debug Status and Control Register; 0x00000021 */
volatile DBGCNTSTR _DBGCNT; /* Debug Count Register; 0x00000024 */
volatile DBGCCXSTR _DBGCCX; /* Debug Comparator C Extended Register; 0x00000025 */
volatile DBGC2STR _DBGC2; /* Debug Control Register 2; 0x00000028 */
volatile DBGC3STR _DBGC3; /* Debug Control Register 3; 0x00000029 */
volatile DBGCAXSTR _DBGCAX; /* Debug Comparator A Extended Register; 0x0000002A */
volatile DBGCBXSTR _DBGCBX; /* Debug Comparator B Extended Register; 0x0000002D */
volatile PPAGESTR _PPAGE; /* Page Index Register; 0x00000030 */
volatile PORTKSTR _PORTK; /* Port K Data Register; 0x00000032 */
volatile DDRKSTR _DDRK; /* Port K Data Direction Register; 0x00000033 */
volatile SYNRSTR _SYNR; /* CRG Synthesizer Register; 0x00000034 */
volatile REFDVSTR _REFDV; /* CRG Reference Divider Register; 0x00000035 */
volatile CRGFLGSTR _CRGFLG; /* CRG Flags Register; 0x00000037 */
volatile CRGINTSTR _CRGINT; /* CRG Interrupt Enable Register; 0x00000038 */
volatile CLKSELSTR _CLKSEL; /* CRG Clock Select Register; 0x00000039 */
volatile PLLCTLSTR _PLLCTL; /* CRG PLL Control Register; 0x0000003A */
volatile RTICTLSTR _RTICTL; /* CRG RTI Control Register; 0x0000003B */
volatile COPCTLSTR _COPCTL; /* CRG COP Control Register; 0x0000003C */
volatile ARMCOPSTR _ARMCOP; /* CRG COP Timer Arm/Reset Register; 0x0000003F */
volatile TIOSSTR _TIOS; /* Timer Input Capture/Output Compare Select; 0x00000040 */
volatile CFORCSTR _CFORC; /* Timer Compare Force Register; 0x00000041 */
volatile OC7MSTR _OC7M; /* Output Compare 7 Mask Register; 0x00000042 */
volatile OC7DSTR _OC7D; /* Output Compare 7 Data Register; 0x00000043 */
volatile TSCR1STR _TSCR1; /* Timer System Control Register1; 0x00000046 */
volatile TTOVSTR _TTOV; /* Timer Toggle On Overflow Register; 0x00000047 */
volatile TCTL1STR _TCTL1; /* Timer Control Register 1; 0x00000048 */
volatile TCTL2STR _TCTL2; /* Timer Control Register 2; 0x00000049 */
volatile TCTL3STR _TCTL3; /* Timer Control Register 3; 0x0000004A */
volatile TCTL4STR _TCTL4; /* Timer Control Register 4; 0x0000004B */
volatile TIESTR _TIE; /* Timer Interrupt Enable Register; 0x0000004C */
volatile TSCR2STR _TSCR2; /* Timer System Control Register 2; 0x0000004D */
volatile TFLG1STR _TFLG1; /* Main Timer Interrupt Flag 1; 0x0000004E */
volatile TFLG2STR _TFLG2; /* Main Timer Interrupt Flag 2; 0x0000004F */
volatile PACTLSTR _PACTL; /* 16-Bit Pulse Accumulator A Control Register; 0x00000060 */
volatile PAFLGSTR _PAFLG; /* Pulse Accumulator A Flag Register; 0x00000061 */
volatile ATDSTAT0STR _ATDSTAT0; /* ATD Status Register 0; 0x00000086 */
volatile ATDTEST1STR _ATDTEST1; /* ATD Test Register; 0x00000089 */
volatile ATDSTAT2STR _ATDSTAT2; /* ATD Status Register 2; 0x0000008A */
volatile ATDSTAT1STR _ATDSTAT1; /* ATD Status Register 1; 0x0000008B */
volatile SCI0CR1STR _SCI0CR1; /* SCI 0 Control Register 1; 0x000000CA */
volatile SCI0CR2STR _SCI0CR2; /* SCI 0 Control Register 2; 0x000000CB */
volatile SCI0SR1STR _SCI0SR1; /* SCI 0 Status Register 1; 0x000000CC */
volatile SCI0SR2STR _SCI0SR2; /* SCI 0 Status Register 2; 0x000000CD */
volatile SCI0DRHSTR _SCI0DRH; /* SCI 0 Data Register High; 0x000000CE */
volatile SCI0DRLSTR _SCI0DRL; /* SCI 0 Data Register Low; 0x000000CF */
volatile SPICR1STR _SPICR1; /* SPI 0 Control Register; 0x000000D8 */
volatile SPICR2STR _SPICR2; /* SPI 0 Control Register 2; 0x000000D9 */
volatile SPIBRSTR _SPIBR; /* SPI 0 Baud Rate Register; 0x000000DA */
volatile SPISRSTR _SPISR; /* SPI 0 Status Register; 0x000000DB */
volatile SPIDRSTR _SPIDR; /* SPI 0 Data Register; 0x000000DD */
volatile PWMESTR _PWME; /* PWM Enable Register; 0x000000E0 */
volatile PWMPOLSTR _PWMPOL; /* PWM Polarity Register; 0x000000E1 */
volatile PWMCLKSTR _PWMCLK; /* PWM Clock Select Register; 0x000000E2 */
volatile PWMPRCLKSTR _PWMPRCLK; /* PWM Prescale Clock Select Register; 0x000000E3 */
volatile PWMCAESTR _PWMCAE; /* PWM Center Align Enable Register; 0x000000E4 */
volatile PWMCTLSTR _PWMCTL; /* PWM Control Register; 0x000000E5 */
volatile PWMSCLASTR _PWMSCLA; /* PWM Scale A Register; 0x000000E8 */
volatile PWMSCLBSTR _PWMSCLB; /* PWM Scale B Register; 0x000000E9 */
volatile PWMSDNSTR _PWMSDN; /* PWM Shutdown Register; 0x000000FE */
volatile FCLKDIVSTR _FCLKDIV; /* Flash Clock Divider Register; 0x00000100 */
volatile FSECSTR _FSEC; /* Flash Security Register; 0x00000101 */
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