📄 io_map.h
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#define DDRA_BIT4_MASK 16
#define DDRA_BIT5_MASK 32
#define DDRA_BIT6_MASK 64
#define DDRA_BIT7_MASK 128
/*** DDRB - Port B Data Direction Register; 0x00000003 ***/
typedef union {
byte Byte;
struct {
byte :1;
byte :1;
byte :1;
byte :1;
byte BIT4 :1; /* Data Direction Port B Bit 4 */
byte BIT5 :1; /* Data Direction Port B Bit 5 */
byte BIT6 :1; /* Data Direction Port B Bit 6 */
byte BIT7 :1; /* Data Direction Port B Bit 7 */
} Bits;
struct {
byte :1;
byte :1;
byte :1;
byte :1;
byte grpBIT_4 :4;
} MergedBits;
} DDRBSTR;
extern volatile DDRBSTR _DDRB @(REG_BASE + 0x00000003);
#define DDRB _DDRB.Byte
#define DDRB_BIT4 _DDRB.Bits.BIT4
#define DDRB_BIT5 _DDRB.Bits.BIT5
#define DDRB_BIT6 _DDRB.Bits.BIT6
#define DDRB_BIT7 _DDRB.Bits.BIT7
#define DDRB_BIT_4 _DDRB.MergedBits.grpBIT_4
#define DDRB_BIT DDRB_BIT_4
#define DDRB_BIT4_MASK 16
#define DDRB_BIT5_MASK 32
#define DDRB_BIT6_MASK 64
#define DDRB_BIT7_MASK 128
#define DDRB_BIT_4_MASK 240
#define DDRB_BIT_4_BITNUM 4
/*** PORTE - Port E Register; 0x00000008 ***/
typedef union {
byte Byte;
struct {
byte BIT0 :1; /* Port E Bit 0 */
byte :1;
byte BIT2 :1; /* Port E Bit 2 */
byte BIT3 :1; /* Port E Bit 3 */
byte BIT4 :1; /* Port E Bit 4 */
byte :1;
byte :1;
byte BIT7 :1; /* Port E Bit 7 */
} Bits;
struct {
byte grpBIT :1;
byte :1;
byte grpBIT_2 :3;
byte :1;
byte :1;
byte grpBIT_7 :1;
} MergedBits;
} PORTESTR;
extern volatile PORTESTR _PORTE @(REG_BASE + 0x00000008);
#define PORTE _PORTE.Byte
#define PORTE_BIT0 _PORTE.Bits.BIT0
#define PORTE_BIT2 _PORTE.Bits.BIT2
#define PORTE_BIT3 _PORTE.Bits.BIT3
#define PORTE_BIT4 _PORTE.Bits.BIT4
#define PORTE_BIT7 _PORTE.Bits.BIT7
#define PORTE_BIT_2 _PORTE.MergedBits.grpBIT_2
#define PORTE_BIT PORTE_BIT_2
#define PORTE_BIT0_MASK 1
#define PORTE_BIT2_MASK 4
#define PORTE_BIT3_MASK 8
#define PORTE_BIT4_MASK 16
#define PORTE_BIT7_MASK 128
#define PORTE_BIT_2_MASK 28
#define PORTE_BIT_2_BITNUM 2
/*** DDRE - Port E Data Direction Register; 0x00000009 ***/
typedef union {
byte Byte;
struct {
byte :1;
byte :1;
byte BIT2 :1; /* Data Direction Port E Bit 2 */
byte BIT3 :1; /* Data Direction Port E Bit 3 */
byte BIT4 :1; /* Data Direction Port E Bit 4 */
byte :1;
byte :1;
byte BIT7 :1; /* Data Direction Port E Bit 7 */
} Bits;
struct {
byte :1;
byte :1;
byte grpBIT_2 :3;
byte :1;
byte :1;
byte grpBIT_7 :1;
} MergedBits;
} DDRESTR;
extern volatile DDRESTR _DDRE @(REG_BASE + 0x00000009);
#define DDRE _DDRE.Byte
#define DDRE_BIT2 _DDRE.Bits.BIT2
#define DDRE_BIT3 _DDRE.Bits.BIT3
#define DDRE_BIT4 _DDRE.Bits.BIT4
#define DDRE_BIT7 _DDRE.Bits.BIT7
#define DDRE_BIT_2 _DDRE.MergedBits.grpBIT_2
#define DDRE_BIT DDRE_BIT_2
#define DDRE_BIT2_MASK 4
#define DDRE_BIT3_MASK 8
#define DDRE_BIT4_MASK 16
#define DDRE_BIT7_MASK 128
#define DDRE_BIT_2_MASK 28
#define DDRE_BIT_2_BITNUM 2
/*** PEAR - Port E Assignment Register; 0x0000000A ***/
typedef union {
byte Byte;
struct {
byte :1;
byte :1;
byte RDWE :1; /* Read / Write Enable */
byte LSTRE :1; /* Low Strobe (LSTRB) Enable */
byte NECLK :1; /* No External E Clock */
byte PIPOE :1; /* Pipe Status Signal Output Enable */
byte :1;
byte NOACCE :1; /* CPU No Access Output Enable */
} Bits;
} PEARSTR;
extern volatile PEARSTR _PEAR @(REG_BASE + 0x0000000A);
#define PEAR _PEAR.Byte
#define PEAR_RDWE _PEAR.Bits.RDWE
#define PEAR_LSTRE _PEAR.Bits.LSTRE
#define PEAR_NECLK _PEAR.Bits.NECLK
#define PEAR_PIPOE _PEAR.Bits.PIPOE
#define PEAR_NOACCE _PEAR.Bits.NOACCE
#define PEAR_RDWE_MASK 4
#define PEAR_LSTRE_MASK 8
#define PEAR_NECLK_MASK 16
#define PEAR_PIPOE_MASK 32
#define PEAR_NOACCE_MASK 128
/*** MODE - Mode Register; 0x0000000B ***/
typedef union {
byte Byte;
struct {
byte EME :1; /* Emulate Port E */
byte EMK :1; /* Emulate Port K */
byte :1;
byte IVIS :1; /* Internal Visibility */
byte :1;
byte MODA :1; /* Mode Select Bit A */
byte MODB :1; /* Mode Select Bit B */
byte MODC :1; /* Mode Select Bit C */
} Bits;
struct {
byte :1;
byte :1;
byte :1;
byte :1;
byte :1;
byte grpMODx :3;
} MergedBits;
} MODESTR;
extern volatile MODESTR _MODE @(REG_BASE + 0x0000000B);
#define MODE _MODE.Byte
#define MODE_EME _MODE.Bits.EME
#define MODE_EMK _MODE.Bits.EMK
#define MODE_IVIS _MODE.Bits.IVIS
#define MODE_MODA _MODE.Bits.MODA
#define MODE_MODB _MODE.Bits.MODB
#define MODE_MODC _MODE.Bits.MODC
#define MODE_MODx _MODE.MergedBits.grpMODx
#define MODE_EME_MASK 1
#define MODE_EMK_MASK 2
#define MODE_IVIS_MASK 8
#define MODE_MODA_MASK 32
#define MODE_MODB_MASK 64
#define MODE_MODC_MASK 128
#define MODE_MODx_MASK 224
#define MODE_MODx_BITNUM 5
/*** PUCR - Pull-Up Control Register; 0x0000000C ***/
typedef union {
byte Byte;
struct {
byte PUPAE :1; /* Pull-Up Port A Enable */
byte PUPBE :1; /* Pull-Up Port B Enable */
byte :1;
byte :1;
byte PUPEE :1; /* Pull-Up Port E Enable */
byte :1;
byte :1;
byte PUPKE :1; /* Pull-Up Port K Enable */
} Bits;
} PUCRSTR;
extern volatile PUCRSTR _PUCR @(REG_BASE + 0x0000000C);
#define PUCR _PUCR.Byte
#define PUCR_PUPAE _PUCR.Bits.PUPAE
#define PUCR_PUPBE _PUCR.Bits.PUPBE
#define PUCR_PUPEE _PUCR.Bits.PUPEE
#define PUCR_PUPKE _PUCR.Bits.PUPKE
#define PUCR_PUPAE_MASK 1
#define PUCR_PUPBE_MASK 2
#define PUCR_PUPEE_MASK 16
#define PUCR_PUPKE_MASK 128
/*** RDRIV - Reduced Drive of I/O Lines; 0x0000000D ***/
typedef union {
byte Byte;
struct {
byte RDPA :1; /* Reduced Drive of Port A */
byte RDPB :1; /* Reduced Drive of Port B */
byte :1;
byte :1;
byte RDPE :1; /* Reduced Drive of Port E */
byte :1;
byte :1;
byte RDPK :1; /* Reduced Drive of Port K */
} Bits;
struct {
byte grpRDPx :2;
byte :1;
byte :1;
byte :1;
byte :1;
byte :1;
byte :1;
} MergedBits;
} RDRIVSTR;
extern volatile RDRIVSTR _RDRIV @(REG_BASE + 0x0000000D);
#define RDRIV _RDRIV.Byte
#define RDRIV_RDPA _RDRIV.Bits.RDPA
#define RDRIV_RDPB _RDRIV.Bits.RDPB
#define RDRIV_RDPE _RDRIV.Bits.RDPE
#define RDRIV_RDPK _RDRIV.Bits.RDPK
#define RDRIV_RDPx _RDRIV.MergedBits.grpRDPx
#define RDRIV_RDPA_MASK 1
#define RDRIV_RDPB_MASK 2
#define RDRIV_RDPE_MASK 16
#define RDRIV_RDPK_MASK 128
#define RDRIV_RDPx_MASK 3
#define RDRIV_RDPx_BITNUM 0
/*** EBICTL - External Bus Interface Control; 0x0000000E ***/
typedef union {
byte Byte;
struct {
byte ESTR :1; /* E Stretches */
byte :1;
byte :1;
byte :1;
byte :1;
byte :1;
byte :1;
byte :1;
} Bits;
} EBICTLSTR;
extern volatile EBICTLSTR _EBICTL @(REG_BASE + 0x0000000E);
#define EBICTL _EBICTL.Byte
#define EBICTL_ESTR _EBICTL.Bits.ESTR
#define EBICTL_ESTR_MASK 1
/*** INITRM - Initialization of Internal RAM Position Register; 0x00000010 ***/
typedef union {
byte Byte;
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