📄 cachemicrosparclib.html
字号:
<html><head><!-- /vobs/wpwr/docs/vxworks/ref/cacheMicroSparcLib.html - generated by refgen from ../sparc/cacheMicroSparcLib.c --> <title> cacheMicroSparcLib </title></head><body bgcolor="#FFFFFF"> <hr><a name="top"></a><p align=right><a href="libIndex.html"><i>VxWorks Reference Manual : Libraries</i></a></p></blockquote><h1>cacheMicroSparcLib</h1> <blockquote></a></blockquote><h4>NAME</h4><blockquote> <p><strong>cacheMicroSparcLib</strong> - microSPARC cache management library </p></blockquote><h4>ROUTINES</h4><blockquote><p><p><b><i><a href="./cacheMicroSparcLib.html#cacheMicroSparcLibInit">cacheMicroSparcLibInit</a></i>( )</b> - initialize the microSPARC cache library<br><p></blockquote><h4>DESCRIPTION</h4><blockquote><p>This library contains architecture-specific cache library functions forthe microSPARC architecture. Currently two microSPARC CPU are supported:the Texas Instrument TMS3900S10 (also known as Tsunami) and theFUJITSU MB86904 (also know as Swift). The TMS390S10 implements a 4-KbyteInstruction and a 2-Kbyte Data cache, the MB86904 a 16-Kbyte Instruction anda 8-Kbyte Data cache. Both operate in write-through mode. The InstructionCache Line size is 32 bytes while the Data Cache Line size is 16 bytes,but for memory allocation purposes, a cache line alignment size of32 bytes will be assumed. The TMS390S10 either cache only supportsinvalidation of all entries and no cache locking is available, theMB86904 supports a per cache line invalidation, with specific alternatestores, but no cache locking<p>MMU (Memory Management Unit) support is needed to mark pages cacheableor non-cacheable. For more information, see the manual entry for vmLib.<p>For general information about caching, see the manual entry for cacheLib.<p></blockquote><h4>INCLUDE FILES</h4><blockquote><p><b>cacheLib.h</b><p></blockquote><h4>SEE ALSO</h4><blockquote><p><b><a href="./cacheMicroSparcLib.html#top">cacheMicroSparcLib</a></b>, <b><a href="./cacheLib.html#top">cacheLib</a></b>, <b><a href="./vmLib.html#top">vmLib</a></b><hr><a name="cacheMicroSparcLibInit"></a><p align=right><a href="rtnIndex.html"><i>Libraries : Routines</i></a></p></blockquote><h1><i>cacheMicroSparcLibInit</i>( )</h1> <blockquote></a></blockquote><h4>NAME</h4><blockquote> <p><strong><i>cacheMicroSparcLibInit</i>( )</strong> - initialize the microSPARC cache library</p></blockquote><h4>SYNOPSIS</h4><blockquote><p><pre>STATUS cacheMicroSparcLibInit ( CACHE_MODE instMode, /* instruction cache mode */ CACHE_MODE dataMode /* data cache mode */ )</pre></blockquote><h4>DESCRIPTION</h4><blockquote><p>This routine initializes the function pointers for the microSPARCcache library. The board support package can select this cache library byassigning the function pointer <b>sysCacheLibInit</b> to <b><i><a href="./cacheMicroSparcLib.html#cacheMicroSparcLibInit">cacheMicroSparcLibInit</a></i>( )</b>.<p>The only available cache mode is <b>CACHE_WRITETHROUGH</b>.<p></blockquote><h4>RETURNS</h4><blockquote><p>OK, or ERROR if cache control is not supported.</blockquote><h4>SEE ALSO</h4><blockquote><p><b><a href="./cacheMicroSparcLib.html#top">cacheMicroSparcLib</a></b></body></html>⌨️ 快捷键说明
复制代码
Ctrl + C
搜索代码
Ctrl + F
全屏模式
F11
切换主题
Ctrl + Shift + D
显示快捷键
?
增大字号
Ctrl + =
减小字号
Ctrl + -