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<html><head><!-- /vobs/wpwr/docs/vxworks/ref/ncr810Lib.html - generated by refgen from ncr810Lib.c --> <title> ncr810Lib </title></head><body bgcolor="#FFFFFF"> <hr><a name="top"></a><p align=right><a href="libIndex.html"><i>VxWorks Reference Manual : Libraries</i></a></p></blockquote><h1>ncr810Lib</h1> <blockquote></a></blockquote><h4>NAME</h4><blockquote> <p><strong>ncr810Lib</strong> - NCR 53C8xx PCI SCSI I/O Processor (SIOP) library (SCSI-2) </p></blockquote><h4>ROUTINES</h4><blockquote><p><p><b><i><a href="./ncr810Lib.html#ncr810CtrlCreate">ncr810CtrlCreate</a></i>( )</b> - create a control structure for the NCR 53C8xx SIOP<br><b><i><a href="./ncr810Lib.html#ncr810CtrlInit">ncr810CtrlInit</a></i>( )</b> - initialize a control structure for the NCR 53C8xx SIOP<br><b><i><a href="./ncr810Lib.html#ncr810SetHwRegister">ncr810SetHwRegister</a></i>( )</b> - set hardware-dependent registers for the NCR 53C8xx SIOP<br><b><i><a href="./ncr810Lib.html#ncr810Show">ncr810Show</a></i>( )</b> - display values of all readable NCR 53C8xx SIOP registers<br><p></blockquote><h4>DESCRIPTION</h4><blockquote><p>This is the I/O driver for the NCR 53C8xx PCI SCSI I/O Processors (SIOP),supporting the NCR 53C810 and the NCR 53C825 SCSI controllers.It is designed to work with <b><a href="./scsiLib.html#top">scsiLib</a></b> and scsi2Lib. This driver runs in conjunction with a script program for the NCR 53C8xx controllers.These scripts use DMA transfers for all data, messages, and status.This driver supports cache functions through cacheLib.<p></blockquote><h4>USER-CALLABLE ROUTINES</h4><blockquote><p>Most of the routines in this driver are accessible only through the I/Osystem. Three routines, however, must be called directly. <b><i><a href="./ncr810Lib.html#ncr810CtrlCreate">ncr810CtrlCreate</a></i>( )</b>creates a controller structure and <b><i><a href="./ncr810Lib.html#ncr810CtrlInit">ncr810CtrlInit</a></i>( )</b> initializes it.The NCR 53C8xx hardware registers need to be configured according tothe hardware implementation. If the default configuration is not correct,the routine <b><i><a href="./ncr810Lib.html#ncr810SetHwRegister">ncr810SetHwRegister</a></i>( )</b> must be used to properly configurethe registers.<p></blockquote><h4>PCI MEMORY ADDRESSING</h4><blockquote><p>The global variable ncr810PciMemOffset was created to provide the BSPwith a means of changing the <b>VIRT_TO_PHYS</b> mapping without changing thefunctions in the cacheFuncs structures. In generating physical addressesfor DMA on the PCI bus, local addresses are passed through the function<b>CACHE_DMA_VIRT_TO_PHYS</b> and then the value of ncr810PciMemOffset is added.For backward compatibility, the initial value of ncr810PciMemOffset comesfrom the macro <b>PCI_TO_MEM_OFFSET</b> defined in <b>ncr810.h</b>.<p>I/O MACROSAll device access for input and output is done via macros which can becustomized for each BSP. These routines are <b>NCR810_IN_BYTE</b>, <b>NCR810_OUT_BYTE</b>,<b>NCR810_IN_16</b>, <b>NCR810_OUT_16</b>, <b>NCR810_IN_32</b> and <b>NCR810_OUT_32</b>.By default, these are defined as generic memory references.<p></blockquote><h4>INCLUDE FILES</h4><blockquote><p><b>ncr810.h</b>, <b>ncr810Script.h</b> and <b>scsiLib.h</b><p></blockquote><h4>SEE ALSO</h4><blockquote><p><b><a href="./ncr810Lib.html#top">ncr810Lib</a></b>, <b><a href="./scsiLib.html#top">scsiLib</a></b>, <b><a href="./scsi2Lib.html#top">scsi2Lib</a></b>, <b><a href="./cacheLib.html#top">cacheLib</a></b>, <i>SYM53C825 PCI-SCSI I/O Processor Data Manual, </i><i>SYM53C810 PCI-SCSI I/O Processor Data Manual, </i><i>NCR 53C8XX Family PCI-SCSI I/O Processors Programming Guide, </i><i>VxWorks Programmer's Guide: I/O System</i><hr><a name="ncr810CtrlCreate"></a><p align=right><a href="rtnIndex.html"><i>Libraries : Routines</i></a></p></blockquote><h1><i>ncr810CtrlCreate</i>( )</h1> <blockquote></a></blockquote><h4>NAME</h4><blockquote> <p><strong><i>ncr810CtrlCreate</i>( )</strong> - create a control structure for the NCR 53C8xx SIOP</p></blockquote><h4>SYNOPSIS</h4><blockquote><p><pre>NCR_810_SCSI_CTRL *ncr810CtrlCreate ( UINT8 * baseAdrs, /* base address of the SIOP */ UINT clkPeriod, /* clock controller period (nsec* 100) */ UINT16 devType /* NCR8XX SCSI device type */ )</pre></blockquote><h4>DESCRIPTION</h4><blockquote><p>This routine creates an SIOP data structure and must be called beforeusing an SIOP chip. It must be called exactly once for a specified SIOP controller. Since it allocates memory for a structure needed by all routines in <b><a href="./ncr810Lib.html#top">ncr810Lib</a></b>, it must be called before any other routines in the library. After calling this routine, <b><i><a href="./ncr810Lib.html#ncr810CtrlInit">ncr810CtrlInit</a></i>( )</b> must be called at least once before any SCSI transactions are initiated using the SIOP.<p>A detailed description of the input parameters follows:<dl><dt><i>baseAdrs</i><dd>the address at which the CPU accesses the lowest (SCNTL0/SIEN)register of the SIOP.<p><dt><i>clkPeriod</i><dd>the period of the SIOP SCSI clock input, in nanoseconds, multipliedby 100. This is used to determine the clock period for theSCSI core of the chip and affects the timing of both asynchronousand synchronous transfers.Several commonly-used values are defined in <b>ncr810.h</b> as follows:<pre> NCR810_1667MHZ 6000 /* 16.67Mhz chip */ NCR810_20MHZ 5000 /* 20Mhz chip */ NCR810_25MHZ 4000 /* 25Mhz chip */ NCR810_3750MHZ 2667 /* 37.50Mhz chip */ NCR810_40MHZ 2500 /* 40Mhz chip */ NCR810_50MHZ 2000 /* 50Mhz chip */ NCR810_66MHZ 1515 /* 66Mhz chip */ NCR810_6666MHZ 1500 /* 66.66Mhz chip */</pre><dt><i>devType</i><dd> the specific NCR 8xx device type. Current device typesare defined in the header file <b>ncr810.h</b>.<p></dl></blockquote><h4>RETURNS</h4><blockquote><p><p> A pointer to the <b>NCR_810_SCSI_CTRL</b> structure, or NULL if memory is unavailable or there are invalid parameters.</blockquote><h4>SEE ALSO</h4><blockquote><p><b><a href="./ncr810Lib.html#top">ncr810Lib</a></b><hr><a name="ncr810CtrlInit"></a><p align=right><a href="rtnIndex.html"><i>Libraries : Routines</i></a></p></blockquote><h1><i>ncr810CtrlInit</i>( )</h1> <blockquote></a></blockquote><h4>NAME</h4><blockquote> <p><strong><i>ncr810CtrlInit</i>( )</strong> - initialize a control structure for the NCR 53C8xx SIOP</p></blockquote><h4>SYNOPSIS</h4><blockquote><p><pre>STATUS ncr810CtrlInit ( NCR_810_SCSI_CTRL * pSiop, /* ptr to SIOP struct */ int scsiCtrlBusId /* SCSI bus ID of this SIOP */ )</pre></blockquote><h4>DESCRIPTION</h4><blockquote><p>This routine initializes an SIOP structure, after the structure is createdwith <b><i><a href="./ncr810Lib.html#ncr810CtrlCreate">ncr810CtrlCreate</a></i>( )</b>. This structure must be initialized before theSIOP can be used. It may be called more than once if needed; however,it must only be called while there is no activity on the SCSI interface.<p>A detailed description of the input parameters follows:<dl><dt><i>pSiop</i><dd>a pointer to the <b>NCR_810_SCSI_CTRL</b> structure created with<b><i><a href="./ncr810Lib.html#ncr810CtrlCreate">ncr810CtrlCreate</a></i>( )</b>.<p><dt><i>scsiCtrlBusId</i><dd> the SCSI bus ID of the SIOP. Its value is somewhat arbitrary: seven (7),or highest priority, is conventional. The value must be in the range 0 - 7.<p></dl></blockquote><h4>RETURNS</h4><blockquote><p><p> OK, or ERROR if parameters are out of range.</blockquote><h4>SEE ALSO</h4><blockquote><p><b><a href="./ncr810Lib.html#top">ncr810Lib</a></b><hr><a name="ncr810SetHwRegister"></a><p align=right><a href="rtnIndex.html"><i>Libraries : Routines</i></a></p></blockquote><h1><i>ncr810SetHwRegister</i>( )</h1> <blockquote></a></blockquote><h4>NAME</h4><blockquote> <p><strong><i>ncr810SetHwRegister</i>( )</strong> - set hardware-dependent registers for the NCR 53C8xx SIOP</p></blockquote><h4>SYNOPSIS</h4><blockquote><p><pre>STATUS ncr810SetHwRegister ( SIOP * pSiop, /* pointer to SIOP info */ NCR810_HW_REGS * pHwRegs /* pointer to a NCR810_HW_REGS info */ )</pre></blockquote><h4>DESCRIPTION</h4><blockquote><p>This routine sets up the registers used in the hardwareimplementation of the chip. Typically, this routine is called by the <b><i><a href="./sysLib.html#sysScsiInit">sysScsiInit</a></i>( )</b> routine from the BSP. <p>The input parameters are as follows:<dl><dt><i>pSiop</i><dd>a pointer to the <b>NCR_810_SCSI_CTRL</b> structure created with<b><i><a href="./ncr810Lib.html#ncr810CtrlCreate">ncr810CtrlCreate</a></i>( )</b>.<p><dt><i>pHwRegs</i><dd> a pointer to a <b>NCR810_HW_REGS</b> structure that is filled with the logicalvalues 0 or 1 for each bit of each register described below.<p>This routine includes only the bit registers that can be used to modify the behavior of the chip. The default configuration used during <b><i>ncr810CtlrCreate</i>( )</b> and <b><i>ncr810CrtlInit</i>( )</b> is {0,0,0,0,0,1,0,0,0,0,0}.<p><pre>typedef struct { int stest1Bit7; /* Disable external SCSI clock */ int stest2Bit7; /* SCSI control enable */ int stest2Bit5; /* Enable differential SCSI bus */ int stest2Bit2; /* Always WIDE SCSI */ int stest2Bit1; /* Extend SREQ/SACK filtering */ int stest3Bit7; /* TolerANT enable */ int dmodeBit7; /* Burst Length transfer bit 1 */ int dmodeBit6; /* Burst Length transfer bit 0 */ int dmodeBit5; /* Source I/O memory enable */ int dmodeBit4; /* Destination I/O memory enable*/ int scntl1Bit7; /* Slow cable mode */ } NCR810_HW_REGS;</pre>For a more detailed explanation of the register bits, see the appropriate NCR 53C8xx data manuals.<p></dl></blockquote><h4>NOTE</h4><blockquote><p><p>* Because this routine writes to the NCR 53C8xx chip registers, it cannot beused when there is any SCSI bus activity.<p></blockquote><h4>RETURNS</h4><blockquote><p>OK, or ERROR if any input parameter is NULL <p></blockquote><h4>SEE ALSO</h4><blockquote><p><b><a href="./ncr810Lib.html#top">ncr810Lib</a></b>, <b>ncr810.h</b>, <b><i>ncr810CtlrCreate</i>( )</b><hr><a name="ncr810Show"></a><p align=right><a href="rtnIndex.html"><i>Libraries : Routines</i></a></p></blockquote><h1><i>ncr810Show</i>( )</h1> <blockquote></a></blockquote><h4>NAME</h4><blockquote> <p><strong><i>ncr810Show</i>( )</strong> - display values of all readable NCR 53C8xx SIOP registers</p></blockquote><h4>SYNOPSIS</h4><blockquote><p><pre>STATUS ncr810Show ( SCSI_CTRL * pScsiCtrl /* ptr to SCSI controller info */ )</pre></blockquote><h4>DESCRIPTION</h4><blockquote><p>This routine displays the state of the SIOP registers in a user-friendly way.It is useful primarily for debugging. The input parameter is the pointer to the SIOP information structure returned by the <b><i><a href="./ncr810Lib.html#ncr810CtrlCreate">ncr810CtrlCreate</a></i>( )</b> call.<p></blockquote><h4>NOTE</h4><blockquote><p>The only readable register during a script execution is the Istat register. If you use this routine during the execution of a SCSI command, the result could be unpredictable.<p></blockquote><h4>EXAMPLE</h4><blockquote><p><p><pre>-> ncr810ShowNCR810 Registers ---------------- 0xfff47000: Sien = 0xa5 Sdid = 0x00 Scntl1 = 0x00 Scntl0 = 0x040xfff47004: Socl = 0x00 Sodl = 0x00 Sxfer = 0x80 Scid = 0x800xfff47008: Sbcl = 0x00 Sbdl = 0x00 Sidl = 0x00 Sfbr = 0x000xfff4700c: Sstat2 = 0x00 Sstat1 = 0x00 Sstat0 = 0x00 Dstat = 0x800xfff47010: Dsa = 0x000000000xfff47014: Ctest3 = ???? Ctest2 = 0x21 Ctest1 = 0xf0 Ctest0 = 0x000xfff47018: Ctest7 = 0x32 Ctest6 = ???? Ctest5 = 0x00 Ctest4 = 0x000xfff4701c: Temp = 0x000000000xfff47020: Lcrc = 0x00 Ctest8 = 0x00 Istat = 0x00 Dfifo = 0x000xfff47024: Dcmd/Ddc= 0x500000000xfff47028: Dnad = 0x000661440xfff4702c: Dsp = 0x000661440xfff47030: Dsps = 0x000661740xfff47037: Scratch3= 0x00 Scratch2= 0x00 Scratch1= 0x00 Scratch0= 0x0a0xfff47038: Dcntl = 0x21 Dwt = 0x00 Dien = 0x37 Dmode = 0x010xfff4703c: Adder = 0x000cc2b8value = 0 = 0x0</pre></blockquote><h4>RETURNS</h4><blockquote><p>OK, or ERROR if <i>pScsiCtrl</i> and <i>pSysScsiCtrl</i> are both NULL.<p></blockquote><h4>SEE ALSO</h4><blockquote><p><b><a href="./ncr810Lib.html#top">ncr810Lib</a></b>, <b><i><a href="./ncr810Lib.html#ncr810CtrlCreate">ncr810CtrlCreate</a></i>( )</b></body></html>⌨️ 快捷键说明
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