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<html><head><!-- /vobs/wpwr/docs/vxworks/ref/dbgArchLib.html - generated by refgen from dbgArchLib.c --> <title> dbgArchLib </title></head><body bgcolor="#FFFFFF"> <hr><a name="top"></a><p align=right><a href="libIndex.html"><i>VxWorks Reference Manual :  Libraries</i></a></p></blockquote><h1>dbgArchLib</h1> <blockquote></a></blockquote><h4>NAME</h4><blockquote>  <p><strong>dbgArchLib</strong> - architecture-dependent debugger library </p></blockquote><h4>ROUTINES</h4><blockquote><p><p><b><i><a href="./dbgArchLib.html#g0">g0</a></i>(&nbsp;)</b>  -  return the contents of register <b>g0</b>, also <b>g1</b> - <b>g7</b> (SPARC) and <b>g1</b> - <b>g14</b> (i960)<br><b><i><a href="./dbgArchLib.html#a0">a0</a></i>(&nbsp;)</b>  -  return the contents of register <b>a0</b> (also <b>a1</b> - <b>a7</b>) (MC680x0)<br><b><i><a href="./dbgArchLib.html#d0">d0</a></i>(&nbsp;)</b>  -  return the contents of register <b>d0</b> (also <b>d1</b> - <b>d7</b>) (MC680x0)<br><b><i><a href="./dbgArchLib.html#sr">sr</a></i>(&nbsp;)</b>  -  return the contents of the status register (MC680x0)<br><b><i><a href="./dbgArchLib.html#psrShow">psrShow</a></i>(&nbsp;)</b>  -  display the meaning of a specified <b>psr</b> value, symbolically (SPARC)<br><b><i><a href="./dbgArchLib.html#fsrShow">fsrShow</a></i>(&nbsp;)</b>  -  display the meaning of a specified fsr value, symbolically (SPARC)<br><b><i><a href="./dbgArchLib.html#o0">o0</a></i>(&nbsp;)</b>  -  return the contents of register <b>o0</b> (also <b>o1</b> - <b>o7</b>) (SPARC)<br><b><i><a href="./dbgArchLib.html#l0">l0</a></i>(&nbsp;)</b>  -  return the contents of register <b>l0</b> (also <b>l1</b> - <b>l7</b>) (SPARC)<br><b><i><a href="./dbgArchLib.html#i0">i0</a></i>(&nbsp;)</b>  -  return the contents of register <b>i0</b> (also <b>i1</b> - <b>i7</b>) (SPARC)<br><b><i><a href="./dbgArchLib.html#npc">npc</a></i>(&nbsp;)</b>  -  return the contents of the next program counter (SPARC)<br><b><i><a href="./dbgArchLib.html#psr">psr</a></i>(&nbsp;)</b>  -  return the contents of the processor status register (SPARC)<br><b><i><a href="./dbgArchLib.html#wim">wim</a></i>(&nbsp;)</b>  -  return the contents of the window invalid mask register (SPARC)<br><b><i><a href="./dbgArchLib.html#y">y</a></i>(&nbsp;)</b>  -  return the contents of the <b>y</b> register (SPARC)<br><b><i><a href="./dbgArchLib.html#pfp">pfp</a></i>(&nbsp;)</b>  -  return the contents of register <b>pfp</b> (i960)<br><b><i><a href="./dbgArchLib.html#tsp">tsp</a></i>(&nbsp;)</b>  -  return the contents of register <b>sp</b> (i960)<br><b><i><a href="./dbgArchLib.html#rip">rip</a></i>(&nbsp;)</b>  -  return the contents of register <b>rip</b> (i960)<br><b><i><a href="./dbgArchLib.html#r3">r3</a></i>(&nbsp;)</b>  -  return the contents of register <b>r3</b> (also <b>r4</b> - <b>r15</b>) (i960)<br><b><i><a href="./dbgArchLib.html#fp">fp</a></i>(&nbsp;)</b>  -  return the contents of register <b>fp</b> (i960)<br><b><i><a href="./dbgArchLib.html#fp0">fp0</a></i>(&nbsp;)</b>  -  return the contents of register <b>fp0</b> (also <b>fp1</b> - <b>fp3</b>) (i960KB, i960SB)<br><b><i><a href="./dbgArchLib.html#pcw">pcw</a></i>(&nbsp;)</b>  -  return the contents of the <b>pcw</b> register (i960)<br><b><i><a href="./dbgArchLib.html#tcw">tcw</a></i>(&nbsp;)</b>  -  return the contents of the <b>tcw</b> register (i960)<br><b><i><a href="./dbgArchLib.html#acw">acw</a></i>(&nbsp;)</b>  -  return the contents of the <b>acw</b> register (i960)<br><b><i><a href="./dbgArchLib.html#dbgBpTypeBind">dbgBpTypeBind</a></i>(&nbsp;)</b>  -  bind a breakpoint handler to a breakpoint type (MIPS R3000, R4000)<br><b><i><a href="./dbgArchLib.html#edi">edi</a></i>(&nbsp;)</b>  -  return the contents of register <b>edi</b> (also <b>esi</b> - <b>eax</b>) (i386/i486)<br><b><i><a href="./dbgArchLib.html#eflags">eflags</a></i>(&nbsp;)</b>  -  return the contents of the status register (i386/i486)<br><b><i><a href="./dbgArchLib.html#r0">r0</a></i>(&nbsp;)</b>  -  return the contents of register <b>r0</b> (also <b>r1</b> - <b>r14</b>) (ARM)<br><b><i><a href="./dbgArchLib.html#cpsr">cpsr</a></i>(&nbsp;)</b>  -  return the contents of the current processor status register (ARM)<br><b>psrShow</b><b><i>;1</i>(&nbsp;)</b>  -  display the meaning of a specified PSR value, symbolically (ARM)<br><p></blockquote><h4>DESCRIPTION</h4><blockquote><p>This module provides architecture-specific support functions for dbgLib.It also includes user-callable functions for accessing the contents ofregisters in a task's TCB (task control block).  These routines include:<p><table><tr valign=top><td align=left>MC680x0:   </td><td align=left> <b><i><a href="./dbgArchLib.html#a0">a0</a></i>(&nbsp;)</b> - <b><i>a7</i>(&nbsp;)</b>  </td><td align=left> - address registers (<b>a0</b> - <b>a7</b>)</tr><tr valign=top><td align=left>         </td><td align=left> <b><i><a href="./dbgArchLib.html#d0">d0</a></i>(&nbsp;)</b> - <b><i>d7</i>(&nbsp;)</b>  </td><td align=left> - data registers (<b>d0</b> - <b>d7</b>)</tr><tr valign=top><td align=left>         </td><td align=left> <b><i><a href="./dbgArchLib.html#sr">sr</a></i>(&nbsp;)</b>         </td><td align=left> - status register (<b>sr</b>)</tr><tr valign=top><td align=left></tr><tr valign=top><td align=left></blockquote><h4>SPARC</h4><blockquote><p></td><td align=left> <b><i><a href="./dbgArchLib.html#psrShow">psrShow</a></i>(&nbsp;)</b>    </td><td align=left> - <b>psr</b> value, symbolically</tr><tr valign=top><td align=left>         </td><td align=left> <b><i><a href="./dbgArchLib.html#fsrShow">fsrShow</a></i>(&nbsp;)</b>    </td><td align=left> - <b>fsr</b> value, symbolically</tr><tr valign=top><td align=left>         </td><td align=left> <b><i><a href="./dbgArchLib.html#g0">g0</a></i>(&nbsp;)</b> - <b><i>g7</i>(&nbsp;)</b>  </td><td align=left> - global registers (<b>g0</b> - <b>g7</b>)</tr><tr valign=top><td align=left>         </td><td align=left> <b><i><a href="./dbgArchLib.html#o0">o0</a></i>(&nbsp;)</b> - <b><i>o7</i>(&nbsp;)</b>  </td><td align=left> - out registers (<b>o0</b> - <b>o7</b>, note lower-case "o")</tr><tr valign=top><td align=left>         </td><td align=left> <b><i><a href="./dbgArchLib.html#l0">l0</a></i>(&nbsp;)</b> - <b><i>l7</i>(&nbsp;)</b>  </td><td align=left> - local registers (<b>l0</b> - <b>l7</b>, note lower-case "l")</tr><tr valign=top><td align=left>         </td><td align=left> <b><i><a href="./dbgArchLib.html#i0">i0</a></i>(&nbsp;)</b> - <b><i>i7</i>(&nbsp;)</b>  </td><td align=left> - in registers (<b>i0</b> - <b>i7</b>)</tr><tr valign=top><td align=left>         </td><td align=left> <b><i><a href="./dbgArchLib.html#npc">npc</a></i>(&nbsp;)</b>        </td><td align=left> - next program counter (<b>npc</b>)</tr><tr valign=top><td align=left>         </td><td align=left> <b><i><a href="./dbgArchLib.html#psr">psr</a></i>(&nbsp;)</b>        </td><td align=left> - processor status register (<b>psr</b>)</tr><tr valign=top><td align=left>         </td><td align=left> <b><i><a href="./dbgArchLib.html#wim">wim</a></i>(&nbsp;)</b>        </td><td align=left> - window invalid mask (<b>wim</b>)</tr><tr valign=top><td align=left>         </td><td align=left> <b><i><a href="./dbgArchLib.html#y">y</a></i>(&nbsp;)</b>          </td><td align=left> - <b>y</b> register</tr><tr valign=top><td align=left></tr><tr valign=top><td align=left>i960:  </td><td align=left> <b><i><a href="./dbgArchLib.html#g0">g0</a></i>(&nbsp;)</b> - <b><i>g14</i>(&nbsp;)</b> </td><td align=left> - global registers</tr><tr valign=top><td align=left>         </td><td align=left> <b><i><a href="./dbgArchLib.html#r3">r3</a></i>(&nbsp;)</b> - <b><i>r15</i>(&nbsp;)</b> </td><td align=left> - local registers</tr><tr valign=top><td align=left>         </td><td align=left> <b><i><a href="./dbgArchLib.html#tsp">tsp</a></i>(&nbsp;)</b>        </td><td align=left> - stack pointer</tr><tr valign=top><td align=left>         </td><td align=left> <b><i><a href="./dbgArchLib.html#rip">rip</a></i>(&nbsp;)</b>        </td><td align=left> - return instruction pointer</tr><tr valign=top><td align=left>         </td><td align=left> <b><i><a href="./dbgArchLib.html#pfp">pfp</a></i>(&nbsp;)</b>        </td><td align=left> - previous frame pointer</tr><tr valign=top><td align=left>         </td><td align=left> <b><i><a href="./dbgArchLib.html#fp">fp</a></i>(&nbsp;)</b>         </td><td align=left> - frame pointer</tr><tr valign=top><td align=left>         </td><td align=left> <b><i><a href="./dbgArchLib.html#fp0">fp0</a></i>(&nbsp;)</b> - <b><i>fp3</i>(&nbsp;)</b></td><td align=left> - floating-point registers (i960 KB and SB only)</tr><tr valign=top><td align=left>         </td><td align=left> <b><i><a href="./dbgArchLib.html#pcw">pcw</a></i>(&nbsp;)</b>        </td><td align=left> - processor control word</tr><tr valign=top><td align=left>         </td><td align=left> <b><i><a href="./dbgArchLib.html#tcw">tcw</a></i>(&nbsp;)</b>        </td><td align=left> - trace control word</tr><tr valign=top><td align=left>         </td><td align=left> <b><i><a href="./dbgArchLib.html#acw">acw</a></i>(&nbsp;)</b>        </td><td align=left> - arithmetic control word</tr><tr valign=top><td align=left></tr><tr valign=top><td align=left></blockquote><h4>MIPS</h4><blockquote><p></td><td align=left> <b><i><a href="./dbgArchLib.html#dbgBpTypeBind">dbgBpTypeBind</a></i>(&nbsp;)</b> </td><td align=left> - bind a breakpoint handler to a breakpoint type</tr><tr valign=top><td align=left></tr><tr valign=top><td align=left>i386/i486: </td><td align=left> <b><i><a href="./dbgArchLib.html#edi">edi</a></i>(&nbsp;)</b> - <b><i>eax</i>(&nbsp;)</b> </td><td align=left> - named register values</tr><tr valign=top><td align=left>             </td><td align=left> <b><i><a href="./dbgArchLib.html#eflags">eflags</a></i>(&nbsp;)</b>      </td><td align=left> - status register value</tr><tr valign=top><td align=left></tr><tr valign=top><td align=left></blockquote><h4>ARM</h4><blockquote><p></td><td align=left> <b><i><a href="./dbgArchLib.html#r0">r0</a></i>(&nbsp;)</b> - <b><i>r14</i>(&nbsp;)</b> </td><td align=left> - general-purpose registers (<b>r0</b> - <b>r14</b>)</tr><tr valign=top><td align=left>         </td><td align=left> <b><i><a href="./dbgArchLib.html#cpsr">cpsr</a></i>(&nbsp;)</b>       </td><td align=left> - current processor status reg (<b>cpsr</b>)</tr><tr valign=top><td align=left>         </td><td align=left> <b><i><a href="./dbgArchLib.html#psrShow">psrShow</a></i>(&nbsp;)</b>    </td><td align=left> - <b>psr</b> value, symbolically</tr><tr valign=top><td align=left></tr></tr></table>Note:  The routine <b><i><a href="./usrLib.html#pc">pc</a></i>(&nbsp;)</b>, for accessing the program counter, is foundin usrLib.<p></blockquote><h4>SEE ALSO</h4><blockquote><p><b><a href="./dbgLib.html#top">dbgLib</a></b>,  <i>VxWorks Programmer's Guide: Target Shell</i><p><hr><a name="g0"></a><p align=right><a href="rtnIndex.html"><i>Libraries :  Routines</i></a></p></blockquote><h1><i>g0</i>(&nbsp;)</h1> <blockquote></a></blockquote><h4>NAME</h4><blockquote>  <p><strong><i>g0</i>(&nbsp;)</strong> - return the contents of register <b>g0</b>, also <b>g1</b> - <b>g7</b> (SPARC) and <b>g1</b> - <b>g14</b> (i960)</p></blockquote><h4>SYNOPSIS</h4><blockquote><p><pre>int g0    (    int taskId /* task ID, 0 means default task */    )</pre></blockquote><h4>DESCRIPTION</h4><blockquote><p>This command extracts the contents of global register <b>g0</b> from the TCB of aspecified task.  If <i>taskId</i> is omitted or 0, the current default task isassumed.<p>Routines are provided for all global registers:<table><tr valign=top><td align=left></blockquote><h4>SPARC</h4><blockquote><p></td><td align=left> <b><i><a href="./dbgArchLib.html#g0">g0</a></i>(&nbsp;)</b> - <b><i>g7</i>(&nbsp;)</b>  </td><td align=left> (<b>g0</b> - <b>g7</b>)</tr><tr valign=top><td align=left>i960:  </td><td align=left> <b><i><a href="./dbgArchLib.html#g0">g0</a></i>(&nbsp;)</b> - <b><i>g14</i>(&nbsp;)</b> </td><td align=left> (<b>g0</b> - <b>g14</b>)</tr><tr valign=top><td align=left></tr></tr></table></blockquote><h4>RETURNS</h4><blockquote><p>The contents of register <b>g0</b> (or the requested register).<p></blockquote><h4>SEE ALSO</h4><blockquote><p><b><a href="./dbgArchLib.html#top">dbgArchLib</a></b>, <i>VxWorks Programmer's Guide: Target Shell</i><hr><a name="a0"></a><p align=right><a href="rtnIndex.html"><i>Libraries :  Routines</i></a></p></blockquote><h1><i>a0</i>(&nbsp;)</h1> <blockquote></a></blockquote><h4>NAME</h4><blockquote>  <p><strong><i>a0</i>(&nbsp;)</strong> - return the contents of register <b>a0</b> (also <b>a1</b> - <b>a7</b>) (MC680x0)</p></blockquote><h4>SYNOPSIS</h4><blockquote><p><pre>int a0    (    int taskId /* task ID, 0 means default task */    )</pre></blockquote><h4>DESCRIPTION</h4><blockquote><p>This command extracts the contents of register <b>a0</b> from the TCB of a specifiedtask.  If <i>taskId</i> is omitted or zero, the last task referenced is assumed.<p>Similar routines are provided for all address registers (<b>a0</b> - <b>a7</b>):<b><i><a href="./dbgArchLib.html#a0">a0</a></i>(&nbsp;)</b> - <b><i>a7</i>(&nbsp;)</b>.<p>The stack pointer is accessed via <b><i>a7</i>(&nbsp;)</b>.<p></blockquote><h4>RETURNS</h4><blockquote><p>The contents of register <b>a0</b> (or the requested register).<p></blockquote><h4>SEE ALSO</h4><blockquote><p><b><a href="./dbgArchLib.html#top">dbgArchLib</a></b>, <i>VxWorks Programmer's Guide: Target Shell</i><hr><a name="d0"></a><p align=right><a href="rtnIndex.html"><i>Libraries :  Routines</i></a></p></blockquote><h1><i>d0</i>(&nbsp;)</h1> <blockquote></a></blockquote><h4>NAME</h4><blockquote>  <p><strong><i>d0</i>(&nbsp;)</strong> - return the contents of register <b>d0</b> (also <b>d1</b> - <b>d7</b>) (MC680x0)</p></blockquote><h4>SYNOPSIS</h4><blockquote><p><pre>int d0    (    int taskId /* task ID, 0 means default task */    )</pre></blockquote><h4>DESCRIPTION</h4><blockquote><p>This command extracts the contents of register <b>d0</b> from the TCB of a specifiedtask.  If <i>taskId</i> is omitted or zero, the last task referenced is assumed.<p>Similar routines are provided for all data registers (<b>d0</b> - <b>d7</b>):<b><i><a href="./dbgArchLib.html#d0">d0</a></i>(&nbsp;)</b> - <b><i>d7</i>(&nbsp;)</b>.<p></blockquote><h4>RETURNS</h4><blockquote><p>The contents of register <b>d0</b> (or the requested register).<p></blockquote><h4>SEE ALSO</h4><blockquote><p><b><a href="./dbgArchLib.html#top">dbgArchLib</a></b>, <i>VxWorks Programmer's Guide: Target Shell</i><hr><a name="sr"></a><p align=right><a href="rtnIndex.html"><i>Libraries :  Routines</i></a></p></blockquote><h1><i>sr</i>(&nbsp;)</h1> <blockquote></a></blockquote><h4>NAME</h4><blockquote>  <p><strong><i>sr</i>(&nbsp;)</strong> - return the contents of the status register (MC680x0)</p></blockquote><h4>SYNOPSIS</h4><blockquote><p><pre>int sr    (    int taskId /* task ID, 0 means default task */    )</pre></blockquote><h4>DESCRIPTION</h4><blockquote><p>This command extracts the contents of the status register from the TCB of aspecified task.  If <i>taskId</i> is omitted or zero, the last task referenced isassumed.<p></blockquote><h4>RETURNS</h4><blockquote><p>The contents of the status register.<p></blockquote><h4>SEE ALSO</h4><blockquote><p><b><a href="./dbgArchLib.html#top">dbgArchLib</a></b>, <i>VxWorks Programmer's Guide: Target Shell</i><hr><a name="psrShow"></a><p align=right><a href="rtnIndex.html"><i>Libraries :  Routines</i></a></p></blockquote><h1><i>psrShow</i>(&nbsp;)</h1> <blockquote></a></blockquote><h4>NAME</h4><blockquote>  <p><strong><i>psrShow</i>(&nbsp;)</strong> - display the meaning of a specified <b>psr</b> value, symbolically (SPARC)</p></blockquote><h4>SYNOPSIS</h4><blockquote><p><pre>void psrShow    (    ULONG psrValue /* psr value to show */    )</pre></blockquote><h4>DESCRIPTION</h4><blockquote><p>This routine displays the meaning of all the fields in a specified <b>psr</b> value,symbolically.<p>Extracted from <b>psl.h</b>:<pre>Definition of bits in the Sun-4 PSR (Processor Status Register) ------------------------------------------------------------------------| IMPL | VER |      ICC      | resvd | EC | EF | PIL | S | PS | ET | CWP ||      |     | N | Z | V | C |       |    |    |     |   |    |    |     ||------|-----|---|---|---|---|-------|----|----|-----|---|----|----|-----| 31  28 27 24  23  22  21  20 19   14  13   12  11  8   7   6    5  4   0</pre>For compatibility with future revisions, reserved bits are defined to beinitialized to zero and, if written, must be preserved.<p></blockquote><h4>EXAMPLE</h4><blockquote><p><pre>     -&gt; psrShow 0x00001FE7    Implementation 0, mask version 0:    Fujitsu MB86900 or LSI L64801, 7 windows            no SWAP, FSQRT, CP, extended fp instructions        Condition codes: . . . .        Coprocessor enables: . EF        Processor interrupt level: f        Flags: S PS ET        Current window pointer: 0x07     -&gt;</pre></blockquote><h4>RETURNS</h4><blockquote><p>N/A<p></blockquote><h4>SEE ALSO</h4><blockquote><p><b><a href="./dbgArchLib.html#top">dbgArchLib</a></b>, <b><i><a href="./dbgArchLib.html#psr">psr</a></i>(&nbsp;)</b>,  <i>SPARC Architecture Manual </i><hr><a name="fsrShow"></a><p align=right><a href="rtnIndex.html"><i>Libraries :  Routines</i></a></p></blockquote><h1><i>fsrShow</i>(&nbsp;)</h1> <blockquote></a></blockquote><h4>NAME</h4><blockquote>  <p><strong><i>fsrShow</i>(&nbsp;)</strong> - display the meaning of a specified fsr value, symbolically (SPARC)</p>

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