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<tr><td></td><td><b><i><a href="./ansiStdlib.html#atoi">atoi</a></i>(&nbsp;)</b></td><td>convert a string to an `int' (ANSI)</td></tr>
<tr><td></td><td><b><i><a href="./ansiStdlib.html#atol">atol</a></i>(&nbsp;)</b></td><td>convert a string to a `long' (ANSI)</td></tr>
<tr><td></td><td><b><i><a href="./autopushLib.html#autopushAdd">autopushAdd</a></i>(&nbsp;)</b></td><td>add a list of automatically pushed STREAMS modules (STREAMS Option)</td></tr>
<tr><td></td><td><b><i><a href="./autopushLib.html#autopushDelete">autopushDelete</a></i>(&nbsp;)</b></td><td>delete autopush information for a device (STREAMS Option)</td></tr>
<tr><td></td><td><b><i><a href="./autopushLib.html#autopushGet">autopushGet</a></i>(&nbsp;)</b></td><td>get autopush information for a device (STREAMS Option)</td></tr>
<tr><td><h1><a name="B"> B</a></h1></td> <td></td><td></td></tr>
<tr><td></td><td><b><i><a href="./dbgLib.html#b">b</a></i>(&nbsp;)</b></td><td>set or display breakpoints</td></tr>
<tr><td></td><td><b><i><a href="./bLib.html#bcmp">bcmp</a></i>(&nbsp;)</b></td><td>compare one buffer to another</td></tr>
<tr><td></td><td><b><i><a href="./bLib.html#bcopy">bcopy</a></i>(&nbsp;)</b></td><td>copy one buffer to another</td></tr>
<tr><td></td><td><b><i><a href="./bLib.html#bcopyBytes">bcopyBytes</a></i>(&nbsp;)</b></td><td>copy one buffer to another one byte at a time</td></tr>
<tr><td></td><td><b><i><a href="./bALib.html#bcopyDoubles">bcopyDoubles</a></i>(&nbsp;)</b></td><td>copy one buffer to another eight bytes at a time (SPARC)</td></tr>
<tr><td></td><td><b><i><a href="./bLib.html#bcopyLongs">bcopyLongs</a></i>(&nbsp;)</b></td><td>copy one buffer to another one long word at a time</td></tr>
<tr><td></td><td><b><i><a href="./bLib.html#bcopyWords">bcopyWords</a></i>(&nbsp;)</b></td><td>copy one buffer to another one word at a time</td></tr>
<tr><td></td><td><b><i><a href="./dbgLib.html#bd">bd</a></i>(&nbsp;)</b></td><td>delete a breakpoint</td></tr>
<tr><td></td><td><b><i><a href="./dbgLib.html#bdall">bdall</a></i>(&nbsp;)</b></td><td>delete all breakpoints</td></tr>
<tr><td></td><td><b><i><a href="./bLib.html#bfill">bfill</a></i>(&nbsp;)</b></td><td>fill a buffer with a specified character</td></tr>
<tr><td></td><td><b><i><a href="./bLib.html#bfillBytes">bfillBytes</a></i>(&nbsp;)</b></td><td>fill buffer with a specified character one byte at a time</td></tr>
<tr><td></td><td><b><i><a href="./bALib.html#bfillDoubles">bfillDoubles</a></i>(&nbsp;)</b></td><td>fill a buffer with a specified eight-byte pattern (SPARC)</td></tr>
<tr><td></td><td><b><i><a href="./dbgLib.html#bh">bh</a></i>(&nbsp;)</b></td><td>set a hardware breakpoint</td></tr>
<tr><td></td><td><b><i><a href="./sockLib.html#bind">bind</a></i>(&nbsp;)</b></td><td>bind a name to a socket</td></tr>
<tr><td></td><td><b><i><a href="./remLib.html#bindresvport">bindresvport</a></i>(&nbsp;)</b></td><td>bind a socket to a privileged IP port</td></tr>
<tr><td></td><td><b><i><a href="./bLib.html#binvert">binvert</a></i>(&nbsp;)</b></td><td>invert the order of bytes in a buffer</td></tr>
<tr><td></td><td><b><i><a href="./bootLib.html#bootBpAnchorExtract">bootBpAnchorExtract</a></i>(&nbsp;)</b></td><td>extract a backplane address from a device field</td></tr>
<tr><td></td><td><b><i><a href="./usrLib.html#bootChange">bootChange</a></i>(&nbsp;)</b></td><td>change the boot line</td></tr>
<tr><td></td><td><b><i><a href="./bootLib.html#bootLeaseExtract">bootLeaseExtract</a></i>(&nbsp;)</b></td><td>extract the lease information from an Internet address</td></tr>
<tr><td></td><td><b><i><a href="./bootLib.html#bootNetmaskExtract">bootNetmaskExtract</a></i>(&nbsp;)</b></td><td>extract the net mask field from an Internet address</td></tr>
<tr><td></td><td><b><i><a href="./bootLib.html#bootParamsPrompt">bootParamsPrompt</a></i>(&nbsp;)</b></td><td>prompt for boot line parameters</td></tr>
<tr><td></td><td><b><i><a href="./bootLib.html#bootParamsShow">bootParamsShow</a></i>(&nbsp;)</b></td><td>display boot line parameters</td></tr>
<tr><td></td><td><b><i><a href="./bootpLib.html#bootpMsgSend">bootpMsgSend</a></i>(&nbsp;)</b></td><td>send a BOOTP request message</td></tr>
<tr><td></td><td><b><i><a href="./bootpLib.html#bootpParamsGet">bootpParamsGet</a></i>(&nbsp;)</b></td><td>retrieve boot parameters using BOOTP</td></tr>
<tr><td></td><td><b><i><a href="./bootLib.html#bootStringToStruct">bootStringToStruct</a></i>(&nbsp;)</b></td><td>interpret the boot parameters from the boot line</td></tr>
<tr><td></td><td><b><i><a href="./bootLib.html#bootStructToString">bootStructToString</a></i>(&nbsp;)</b></td><td>construct a boot line</td></tr>
<tr><td></td><td><b><i><a href="./ansiStdlib.html#bsearch">bsearch</a></i>(&nbsp;)</b></td><td>perform a binary search (ANSI)</td></tr>
<tr><td></td><td><b><i><a href="./bLib.html#bswap">bswap</a></i>(&nbsp;)</b></td><td>swap buffers</td></tr>
<tr><td></td><td><b><i><a href="./bLib.html#bzero">bzero</a></i>(&nbsp;)</b></td><td>zero out a buffer</td></tr>
<tr><td></td><td><b><i><a href="./bALib.html#bzeroDoubles">bzeroDoubles</a></i>(&nbsp;)</b></td><td>zero out a buffer eight bytes at a time (SPARC)</td></tr>
<tr><td><h1><a name="C"> C</a></h1></td> <td></td><td></td></tr>
<tr><td></td><td><b><i><a href="./dbgLib.html#c">c</a></i>(&nbsp;)</b></td><td>continue from a breakpoint</td></tr>
<tr><td></td><td><b><i><a href="./cacheArchLib.html#cacheArchClearEntry">cacheArchClearEntry</a></i>(&nbsp;)</b></td><td>clear an entry from a cache (68K, x86)</td></tr>
<tr><td></td><td><b><i><a href="./cacheArchLib.html#cacheArchLibInit">cacheArchLibInit</a></i>(&nbsp;)</b></td><td>initialize the cache library</td></tr>
<tr><td></td><td><b><i><a href="./cacheLib.html#cacheClear">cacheClear</a></i>(&nbsp;)</b></td><td>clear all or some entries from a cache</td></tr>
<tr><td></td><td><b><i><a href="./cacheCy604Lib.html#cacheCy604ClearLine">cacheCy604ClearLine</a></i>(&nbsp;)</b></td><td>clear a line from a CY7C604 cache</td></tr>
<tr><td></td><td><b><i><a href="./cacheCy604Lib.html#cacheCy604ClearPage">cacheCy604ClearPage</a></i>(&nbsp;)</b></td><td>clear a page from a CY7C604 cache</td></tr>
<tr><td></td><td><b><i><a href="./cacheCy604Lib.html#cacheCy604ClearRegion">cacheCy604ClearRegion</a></i>(&nbsp;)</b></td><td>clear a region from a CY7C604 cache</td></tr>
<tr><td></td><td><b><i><a href="./cacheCy604Lib.html#cacheCy604ClearSegment">cacheCy604ClearSegment</a></i>(&nbsp;)</b></td><td>clear a segment from a CY7C604 cache</td></tr>
<tr><td></td><td><b><i><a href="./cacheCy604Lib.html#cacheCy604LibInit">cacheCy604LibInit</a></i>(&nbsp;)</b></td><td>initialize the Cypress CY7C604 cache library</td></tr>
<tr><td></td><td><b><i><a href="./cacheLib.html#cacheDisable">cacheDisable</a></i>(&nbsp;)</b></td><td>disable the specified cache</td></tr>
<tr><td></td><td><b><i><a href="./cacheLib.html#cacheDmaFree">cacheDmaFree</a></i>(&nbsp;)</b></td><td>free the buffer acquired with cacheDmaMalloc()</td></tr>
<tr><td></td><td><b><i><a href="./cacheLib.html#cacheDmaMalloc">cacheDmaMalloc</a></i>(&nbsp;)</b></td><td>allocate a cache-safe buffer for DMA devices and drivers</td></tr>
<tr><td></td><td><b><i><a href="./cacheLib.html#cacheDrvFlush">cacheDrvFlush</a></i>(&nbsp;)</b></td><td>flush the data cache for drivers</td></tr>
<tr><td></td><td><b><i><a href="./cacheLib.html#cacheDrvInvalidate">cacheDrvInvalidate</a></i>(&nbsp;)</b></td><td>invalidate data cache for drivers</td></tr>
<tr><td></td><td><b><i><a href="./cacheLib.html#cacheDrvPhysToVirt">cacheDrvPhysToVirt</a></i>(&nbsp;)</b></td><td>translate a physical address for drivers</td></tr>
<tr><td></td><td><b><i><a href="./cacheLib.html#cacheDrvVirtToPhys">cacheDrvVirtToPhys</a></i>(&nbsp;)</b></td><td>translate a virtual address for drivers</td></tr>
<tr><td></td><td><b><i><a href="./cacheLib.html#cacheEnable">cacheEnable</a></i>(&nbsp;)</b></td><td>enable the specified cache</td></tr>
<tr><td></td><td><b><i><a href="./cacheLib.html#cacheFlush">cacheFlush</a></i>(&nbsp;)</b></td><td>flush all or some of a specified cache</td></tr>
<tr><td></td><td><b><i><a href="./cacheI960CxALib.html#cacheI960CxIC1kLoadNLock">cacheI960CxIC1kLoadNLock</a></i>(&nbsp;)</b></td><td>load and lock I960Cx 1KB instruction cache (i960)</td></tr>
<tr><td></td><td><b><i><a href="./cacheI960CxALib.html#cacheI960CxICDisable">cacheI960CxICDisable</a></i>(&nbsp;)</b></td><td>disable the I960Cx instruction cache (i960)</td></tr>
<tr><td></td><td><b><i><a href="./cacheI960CxALib.html#cacheI960CxICEnable">cacheI960CxICEnable</a></i>(&nbsp;)</b></td><td>enable the I960Cx instruction cache (i960)</td></tr>
<tr><td></td><td><b><i><a href="./cacheI960CxALib.html#cacheI960CxICInvalidate">cacheI960CxICInvalidate</a></i>(&nbsp;)</b></td><td>invalidate the I960Cx instruction cache (i960)</td></tr>
<tr><td></td><td><b><i><a href="./cacheI960CxALib.html#cacheI960CxICLoadNLock">cacheI960CxICLoadNLock</a></i>(&nbsp;)</b></td><td>load and lock I960Cx 512-byte instruction cache (i960)</td></tr>
<tr><td></td><td><b><i><a href="./cacheI960CxLib.html#cacheI960CxLibInit">cacheI960CxLibInit</a></i>(&nbsp;)</b></td><td>initialize the I960Cx cache library (i960)</td></tr>
<tr><td></td><td><b><i><a href="./cacheI960JxALib.html#cacheI960JxDCCoherent">cacheI960JxDCCoherent</a></i>(&nbsp;)</b></td><td>ensure data cache coherency (i960)</td></tr>
<tr><td></td><td><b><i><a href="./cacheI960JxALib.html#cacheI960JxDCDisable">cacheI960JxDCDisable</a></i>(&nbsp;)</b></td><td>disable the I960Jx data cache (i960)</td></tr>
<tr><td></td><td><b><i><a href="./cacheI960JxALib.html#cacheI960JxDCEnable">cacheI960JxDCEnable</a></i>(&nbsp;)</b></td><td>enable the I960Jx data cache (i960)</td></tr>
<tr><td></td><td><b><i><a href="./cacheI960JxALib.html#cacheI960JxDCFlush">cacheI960JxDCFlush</a></i>(&nbsp;)</b></td><td>flush the I960Jx data cache (i960)</td></tr>
<tr><td></td><td><b><i><a href="./cacheI960JxALib.html#cacheI960JxDCInvalidate">cacheI960JxDCInvalidate</a></i>(&nbsp;)</b></td><td>invalidate the I960Jx data cache (i960)</td></tr>
<tr><td></td><td><b><i><a href="./cacheI960JxALib.html#cacheI960JxDCStatusGet">cacheI960JxDCStatusGet</a></i>(&nbsp;)</b></td><td>get the I960Jx data cache status (i960)</td></tr>
<tr><td></td><td><b><i><a href="./cacheI960JxALib.html#cacheI960JxICDisable">cacheI960JxICDisable</a></i>(&nbsp;)</b></td><td>disable the I960Jx instruction cache (i960)</td></tr>
<tr><td></td><td><b><i><a href="./cacheI960JxALib.html#cacheI960JxICEnable">cacheI960JxICEnable</a></i>(&nbsp;)</b></td><td>enable the I960Jx instruction cache (i960)</td></tr>
<tr><td></td><td><b><i><a href="./cacheI960JxALib.html#cacheI960JxICFlush">cacheI960JxICFlush</a></i>(&nbsp;)</b></td><td>flush the I960Jx instruction cache (i960)</td></tr>
<tr><td></td><td><b><i><a href="./cacheI960JxALib.html#cacheI960JxICInvalidate">cacheI960JxICInvalidate</a></i>(&nbsp;)</b></td><td>invalidate the I960Jx instruction cache (i960)</td></tr>
<tr><td></td><td><b><i><a href="./cacheI960JxALib.html#cacheI960JxICLoadNLock">cacheI960JxICLoadNLock</a></i>(&nbsp;)</b></td><td>load and lock the I960Jx instruction cache (i960)</td></tr>
<tr><td></td><td><b><i><a href="./cacheI960JxALib.html#cacheI960JxICLockingStatusGet">cacheI960JxICLockingStatusGet</a></i>(&nbsp;)</b></td><td>get the I960Jx I-cache locking status (i960)</td></tr>
<tr><td></td><td><b><i><a href="./cacheI960JxALib.html#cacheI960JxICStatusGet">cacheI960JxICStatusGet</a></i>(&nbsp;)</b></td><td>get the I960Jx instruction cache status (i960)</td></tr>
<tr><td></td><td><b><i><a href="./cacheI960JxLib.html#cacheI960JxLibInit">cacheI960JxLibInit</a></i>(&nbsp;)</b></td><td>initialize the I960Jx cache library (i960)</td></tr>
<tr><td></td><td><b><i><a href="./cacheLib.html#cacheInvalidate">cacheInvalidate</a></i>(&nbsp;)</b></td><td>invalidate all or some of a specified cache</td></tr>
<tr><td></td><td><b><i><a href="./cacheLib.html#cacheLibInit">cacheLibInit</a></i>(&nbsp;)</b></td><td>initialize the cache library for a processor architecture</td></tr>
<tr><td></td><td><b><i><a href="./cacheLib.html#cacheLock">cacheLock</a></i>(&nbsp;)</b></td><td>lock all or part of a specified cache</td></tr>
<tr><td></td><td><b><i><a href="./cacheMb930Lib.html#cacheMb930ClearLine">cacheMb930ClearLine</a></i>(&nbsp;)</b></td><td>clear a line from an MB86930 cache</td></tr>
<tr><td></td><td><b><i><a href="./cacheMb930Lib.html#cacheMb930LibInit">cacheMb930LibInit</a></i>(&nbsp;)</b></td><td>initialize the Fujitsu MB86930 cache library</td></tr>
<tr><td></td><td><b><i><a href="./cacheMb930Lib.html#cacheMb930LockAuto">cacheMb930LockAuto</a></i>(&nbsp;)</b></td><td>enable MB86930 automatic locking of kernel instructions/data</td></tr>
<tr><td></td><td><b><i><a href="./cacheMicroSparcLib.html#cacheMicroSparcLibInit">cacheMicroSparcLibInit</a></i>(&nbsp;)</b></td><td>initialize the microSPARC cache library</td></tr>
<tr><td></td><td><b><i><a href="./cacheLib.html#cachePipeFlush">cachePipeFlush</a></i>(&nbsp;)</b></td><td>flush processor write buffers to memory</td></tr>
<tr><td></td><td><b><i><a href="./cacheR3kALib.html#cacheR3kDsize">cacheR3kDsize</a></i>(&nbsp;)</b></td><td>return the size of the R3000 data cache</td></tr>
<tr><td></td><td><b><i><a href="./cacheR3kALib.html#cacheR3kIsize">cacheR3kIsize</a></i>(&nbsp;)</b></td><td>return the size of the R3000 instruction cache</td></tr>
<tr><td></td><td><b><i><a href="./cacheR3kLib.html#cacheR3kLibInit">cacheR3kLibInit</a></i>(&nbsp;)</b></td><td>initialize the R3000 cache library</td></tr>
<tr><td></td><td><b><i><a href="./cacheR4kLib.html#cacheR4kLibInit">cacheR4kLibInit</a></i>(&nbsp;)</b></td><td>initialize the R4000 cache library</td></tr>
<tr><td></td><td><b><i><a href="./cacheR33kLib.html#cacheR33kLibInit">cacheR33kLibInit</a></i>(&nbsp;)</b></td><td>initialize the R33000 cache library</td></tr>
<tr><td></td><td><b><i><a href="./cacheR333x0Lib.html#cacheR333x0LibInit">cacheR333x0LibInit</a></i>(&nbsp;)</b></td><td>initialize the R333x0 cache library</td></tr>
<tr><td></td><td><b><i><a href="./cacheArchLib.html#cacheStoreBufDisable">cacheStoreBufDisable</a></i>(&nbsp;)</b></td><td>disable the store buffer (MC68060 only)</td></tr>
<tr><td></td><td><b><i><a href="./cacheArchLib.html#cacheStoreBufEnable">cacheStoreBufEnable</a></i>(&nbsp;)</b></td><td>enable the store buffer (MC68060 only)</td></tr>
<tr><td></td><td><b><i><a href="./cacheSun4Lib.html#cacheSun4ClearContext">cacheSun4ClearContext</a></i>(&nbsp;)</b></td><td>clear a specific context from a Sun-4 cache</td></tr>