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    SYS_INT_DISCONNECT (pDrvCtrl, routine, arg)
    SYS_INT_ENABLE(pDrvCtrl)
    SYS_INT_DISABLE(pDrvCtrl)
    SYS_OUT_BYTE(pDrvCtrl, reg, data)
    SYS_IN_BYTE(pDrvCtrl, reg, data)
    SYS_OUT_WORD(pDrvCtrl, reg, data)
    SYS_IN_WORD(pDrvCtrl, reg, data)
    SYS_OUT_LONG(pDrvCtrl, reg, data)
    SYS_IN_LONG(pDrvCtrl, reg, data)
    SYS_ENET_ADDR_GET(pDrvCtrl, pAddress)    
    sysLan97xIntEnable(pDrvCtrl->intLevel) 
    sysLan97xIntDisable(pDrvCtrl->intLevel) 
    sysLan97xEnetAddrGet(pDrvCtrl, enetAdrs)
</pre>

There are default values in the source code for these macros.  They presume
memory mapped accesses to the device registers and the normal <b><i><a href="./intArchLib.html#intConnect">intConnect</a></i>(&nbsp;)</b>,
and <b><i><a href="./intArchLib.html#intEnable">intEnable</a></i>(&nbsp;)</b> BSP functions.  The first argument to each is the device
controller structure. Thus, each has access back to all the device-specific
information.  Having the pointer in the macro facilitates the addition 
of new features to this driver.
<p>
The macros <b>SYS_INT_CONNECT</b>, <b>SYS_INT_DISCONNECT</b>, <b>SYS_INT_ENABLE</b> and
<b>SYS_INT_DISABLE</b> allow the driver to be customized for BSPs that use special
versions of these routines.
<p>
The macro <b>SYS_INT_CONNECT</b> is used to connect the interrupt handler to
the appropriate vector.  By default it is the routine <b><i><a href="./intArchLib.html#intConnect">intConnect</a></i>(&nbsp;)</b>.
<p>
The macro <b>SYS_INT_DISCONNECT</b> is used to disconnect the interrupt handler prior
to unloading the module.  By default this is a dummy routine that
returns OK.
<p>
The macro <b>SYS_INT_ENABLE</b> is used to enable the interrupt level for the
end device.  It is called once during initialization.  It calls an
external board level routine <b><i>sysLan97xIntEnable</i>(&nbsp;)</b>. 
<p>
The macro <b>SYS_INT_DISABLE</b> is used to disable the interrupt level for the
end device.  It is called during stop.  It calls an
external board level routine <b><i>sysLan97xIntDisable</i>(&nbsp;)</b>. 
<p>
The macro <b>SYS_ENET_ADDR_GET</b> is used get the ethernet hardware of the
chip. This macro calls an external board level routine namely
<b><i>sysLan97xEnetAddrGet</i>(&nbsp;)</b> to get the ethernet address.
<p>
</blockquote><h4>SYSTEM RESOURCE USAGE</h4><blockquote><p>
When implemented, this driver requires the following system resources:
<p>
&nbsp;&nbsp;&nbsp;&nbsp;-&nbsp;one&nbsp;mutual&nbsp;exclusion&nbsp;semaphore<br>
&nbsp;&nbsp;&nbsp;&nbsp;-&nbsp;one&nbsp;interrupt&nbsp;vector<br>
&nbsp;&nbsp;&nbsp;&nbsp;-&nbsp;13288&nbsp;bytes&nbsp;in&nbsp;text&nbsp;for&nbsp;a&nbsp;I80486&nbsp;target<br>
&nbsp;&nbsp;&nbsp;&nbsp;-&nbsp;64&nbsp;bytes&nbsp;in&nbsp;the&nbsp;initialized&nbsp;data&nbsp;section&nbsp;(data)<br>
&nbsp;&nbsp;&nbsp;&nbsp;-&nbsp;0&nbsp;bytes&nbsp;in&nbsp;the&nbsp;uninitialized&nbsp;data&nbsp;section&nbsp;(BSS)
<p>
The driver allocates clusters of size 1520 bytes for receive frames and
and transmit frames.
<p>
</blockquote><h4>INCLUDES</h4><blockquote><p>
<p>
<b>end.h</b> <b>endLib.h</b> <b>etherMultiLib.h</b> <b>ln97xEnd.h</b>
<p>
</blockquote><h4>SEE ALSO</h4><blockquote><p>
<b><a href="./ln97xEnd.html#top">ln97xEnd</a></b>, <b><a href="./muxLib.html#top">muxLib</a></b>, <b><a href="./endLib.html#top">endLib</a></b>, <b><a href="./netBufLib.html#top">netBufLib</a></b>
<i>Writing and Enhanced Network Driver </i>
<i>Advanced Micro Devices PCnet-PCI Ethernet Controller for PCI. </i>

<hr>
<a name="ln97xEndLoad"></a>
<p align=right>
<a href="rtnIndex.html"><i>Libraries :  Routines</i></a></p>

</blockquote><h1><i>ln97xEndLoad</i>(&nbsp;)</h1> <blockquote></a></blockquote><h4>NAME</h4><blockquote>  
<p><strong><i>ln97xEndLoad</i>(&nbsp;)</strong> - initialize the driver and device</p>

</blockquote><h4>SYNOPSIS</h4><blockquote><p>
<pre>END_OBJ * ln97xEndLoad
    (
    char * initString /* string to be parse by the driver */
    )</pre>

</blockquote><h4>DESCRIPTION</h4><blockquote><p>
This routine initializes the driver and the device to the operational state.
All of the device-specific parameters are passed in <i>initString</i>, which
expects a string of the following format:
<p>
<i>unit</i>:<i>devMemAddr</i>:<i>devIoAddr</i>:<i>pciMemBase:<vecnum</i>:<i>intLvl</i>:<i>memAdrs</i>
:<i>memSize</i>:<i>memWidth</i>:<i>csr3b</i>:<i>offset</i>:<i>flags</i>
<p>
This routine can be called in two modes. If it is called with an empty but
allocated string, it places the name of this device (that is, "lnPci") into 
the <i>initString</i> and returns 0.
<p>
If the string is allocated and not empty, the routine attempts to load
the driver using the values specified in the string.
<p>
</blockquote><h4>RETURNS</h4><blockquote><p>
An END object pointer, or NULL on error, or 0 and the name of the
device if the <i>initString</i> was NULL.
</blockquote><h4>SEE ALSO</h4><blockquote><p>
<b><a href="./ln97xEnd.html#top">ln97xEnd</a></b>

<hr>
<a name="ln97xInitParse"></a>
<p align=right>
<a href="rtnIndex.html"><i>Libraries :  Routines</i></a></p>

</blockquote><h1><i>ln97xInitParse</i>(&nbsp;)</h1> <blockquote></a></blockquote><h4>NAME</h4><blockquote>  
<p><strong><i>ln97xInitParse</i>(&nbsp;)</strong> - parse the initialization string</p>

</blockquote><h4>SYNOPSIS</h4><blockquote><p>
<pre>STATUS ln97xInitParse
    (
    LN_97X_DRV_CTRL * pDrvCtrl,  /* pointer to the control structure */
    char *            initString /* initialization string */
    )</pre>

</blockquote><h4>DESCRIPTION</h4><blockquote><p>
Parse the input string. This routine is called from <b><i><a href="./ln97xEnd.html#ln97xEndLoad">ln97xEndLoad</a></i>(&nbsp;)</b> which
intializes some values in the driver control structure with the values
passed in the intialization string.
<p>
The initialization string format is:
<i>unit</i>:<i>devMemAddr</i>:<i>devIoAddr</i>:<i>pciMemBase:<vecNum</i>:<i>intLvl</i>:<i>memAdrs</i>
:<i>memSize</i>:<i>memWidth</i>:<i>csr3b</i>:<i>offset</i>:<i>flags</i>
<p>
<dl>
<dt>
<i>unit</i>
<dd>

Device unit number, a small integer.
<p>
<dt>
<i>devMemAddr</i>
<dd>

Device register base memory address
<p>
<dt>
<i>devIoAddr</i>
<dd>

Device register base IO address
<p>
<dt>
<i>pciMemBase</i>
<dd>

Base address of PCI memory space
<p>
<dt>
<i>vecNum</i>
<dd>

Interrupt vector number.
<p>
<dt>
<i>intLvl</i>
<dd>

Interrupt level.
<p>
<dt>
<i>memAdrs</i>
<dd>

Memory pool address or NONE.
<p>
<dt>
<i>memSize</i>
<dd>

Memory pool size or zero.
<p>
<dt>
<i>memWidth</i>
<dd>

Memory system size, 1, 2, or 4 bytes (optional).
<p>
<dt>
<i>CSR3</i>
<dd>

Value of CSR3 (for endian-ness mainly)
<p>
<dt>
<i>offset</i>
<dd>

Offset of starting of data in the device buffers.
<p>
<dt>
<i>flags</i>
<dd>
 Device specific flags, for future use.
<p>
</dl>

</blockquote><h4>RETURNS</h4><blockquote><p>
<p>
&nbsp;OK,&nbsp;or&nbsp;ERROR&nbsp;if&nbsp;any&nbsp;arguments&nbsp;are&nbsp;invalid.
</blockquote><h4>SEE ALSO</h4><blockquote><p>
<b><a href="./ln97xEnd.html#top">ln97xEnd</a></b>

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