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<b>MOT_FEC_USR_PHY_NO_AN</b> bit is on, the above table will be ignored.
<p>
<b>MOT_FEC_USR_PHY_NO_FD</b>: the PHY may be set to operate in full duplex mode,
provided it has this ability, as a result of the negotiation with other
link partners. However, in this operating mode, the FEC will ignore the
collision detect and carrier sense signals. If the user wishes not to
negotiate full duplex mode, he should set the <b>MOT_FEC_USR_PHY_NO_FD</b> bit
in the user flags.
<p>
<b>MOT_FEC_USR_PHY_NO_HD</b>: the PHY may be set to operate in half duplex mode,
provided it has this ability, as a result of the negotiation with other link
partners. If the user wishes not to negotiate half duplex mode, he should
set the <b>MOT_FEC_USR_PHY_NO_HD</b> bit in the user flags.
<p>
<b>MOT_FEC_USR_PHY_NO_100</b>: the PHY may be set to operate at 100Mbit/s speed,
provided it has this ability, as a result of the negotiation with
other link partners. If the user wishes not to negotiate 100Mbit/s speed,
he should set the <b>MOT_FEC_USR_PHY_NO_100</b> bit in the user flags.
<p>
<b>MOT_FEC_USR_PHY_NO_10</b>: the PHY may be set to operate at 10Mbit/s speed,
provided it has this ability, as a result of the negotiation with
other link partners. If the user wishes not to negotiate 10Mbit/s speed,
he should set the <b>MOT_FEC_USR_PHY_NO_10</b> bit in the user flags.
<p>
<b>MOT_FEC_USR_PHY_ISO</b>: some boards may have different PHYs controlled by the
same management interface. In some cases, there may be the need of
electrically isolating some of them from the interface itself, in order
to guarantee a proper behaviour on the medium layer. If the user wishes to
electrically isolate one PHY from the MII interface, he should set the
<b>MOT_FEC_USR_PHY_ISO</b> bit and provide its logical address in the <i>isoPhyAddr</i>
field of the load string. The default behaviour is to not isolate any
PHY on the board.
<p>
<b>MOT_FEC_USR_SER</b>: the user may set the <b>MOT_FEC_USR_SER</b> bit to enable
the 7-wire interface instead of the MII which is the default.
<p>
<b>MOT_FEC_USR_LOOP</b>: when the <b>MOT_FEC_USR_LOOP</b> bit is set, the driver will
configure the FEC to work in loopback mode, with the TX signal directly
connected to the RX. This mode should only be used for testing.
<p>
<b>MOT_FEC_USR_HBC</b>: if the <b>MOT_FEC_USR_HBC</b> bit is set, the driver will
configure the FEC to perform heartbeat check following end of transmisson
and the HB bit in the status field of the TBD will be set if the collision
input does not assert within the heartbeat window (also see _func_motFecHbFail,
below). The user does not normally need to set this bit.
<p>
</dl>

<p>

</blockquote><h4>EXTERNAL SUPPORT REQUIREMENTS</h4><blockquote><p>
This driver requires three external support functions:
<dl>
<dt>
<b><i>sysFecEnetEnable</i>(&nbsp;)</b>
<dd>

<pre>    STATUS sysFecEnetEnable (UINT32 motCpmAddr);
</pre>
This routine is expected to handle any target-specific functions needed 
to enable the FEC. These functions typically include setting the Port D
on the 860T-based board so that the MII interface may be used, and also
disabling the IRQ7 signal. This routine is expected to return OK on 
success, or ERROR. The driver calls this routine, once per device, from the 
<b><i><a href="./motFecEnd.html#motFecEndLoad">motFecEndLoad</a></i>(&nbsp;)</b> routine.
<p>
<dt>
<b><i>sysFecEnetDisable</i>(&nbsp;)</b>
<dd>

<pre>    STATUS sysFecEnetDisable (UINT32 motCpmAddr);
</pre>
This routine is expected to perform any target specific functions required
to disable the MII interface to the FEC.  This involves restoring the 
default values for all the Port D signals. This routine is expected to 
return OK on success, or ERROR. The driver calls this routine from the 
<b><i>motFecEndStop</i>(&nbsp;)</b> routine each time a device is disabled.
<p>
<dt>
<b><i>sysFecEnetAddrGet</i>(&nbsp;)</b>
<dd>

<pre>STATUS sysFecEnetAddrGet (UINT32 motCpmAddr, UCHAR * enetAddr);
</pre>
The driver expects this routine to provide the six-byte Ethernet hardware 
address that is used by this device.  This routine must copy the six-byte 
address to the space provided by <i>enetAddr</i>.  This routine is expected to 
return OK on success, or ERROR.  The driver calls this routine, once per 
device, from the <b><i><a href="./motFecEnd.html#motFecEndLoad">motFecEndLoad</a></i>(&nbsp;)</b> routine.
<p>
<dt>
<b>_func_motFecPhyInit</b>
<dd>

<pre>    FUNCPTR _func_motFecPhyInit
</pre>
This driver sets the global variable <b>_func_motFecPhyInit</b> to the 
MII-compliant media initialization routine <b><i>motFecPhyInit</i>(&nbsp;)</b>. If the user 
wishes to exploit a different way to configure the PHY, he may set
this variable to his own media initialization routine, tipically
in <b><i><a href="./sysLib.html#sysHwInit">sysHwInit</a></i>(&nbsp;)</b>.
<p>
<dt>
<b>_func_motFecHbFail</b>
<dd>

<pre>    FUNCPTR _func_motFecPhyInit
</pre>
The FEC may be configured to perform heartbeat check following end 
of transmission, and to generate an interrupt, when this event occurs.
If this is the case, and if the global variable <b>_func_motFecHbFail</b>
is not NULL, the routine referenced to by <b>_func_motFecHbFail</b> is called,
with a pointer to the driver control structure as parameter. Hence,
the user may set this variable to his own heart beat check fail routine,
where he can take any action he sees appropriate.
The default value for the global variable <b>_func_motFecHbFail</b> is NULL. 
</dl>

<p>

</blockquote><h4>SYSTEM RESOURCE USAGE</h4><blockquote><p>
If the driver allocates the memory to share with the Ethernet device,
it does so by calling the <b><i><a href="./cacheLib.html#cacheDmaMalloc">cacheDmaMalloc</a></i>(&nbsp;)</b> routine.  For the default case
of 64 transmit buffers and 48 receive buffers, the total size requested 
is 912 bytes, and this includes the 16-byte alignment requirement of the 
device.  If a non-cacheable memory region is provided by the user, the 
size of this region should be this amount, unless the user has specified 
a different number of transmit or receive BDs. 
<p>
This driver can operate only if this memory region is non-cacheable
or if the hardware implements bus snooping.  The driver cannot maintain
cache coherency for the device because the BDs are asynchronously
modified by both the driver and the device, and these fields might share 
the same cache line.
<p>
Data buffers are instead allocated in the external memory through the 
regular memory allocation routine (memalign), and the related cache lines
are then flushed or invalidated as appropriate. The user should not allocate
memory for them.
<p>
</blockquote><h4>TUNING HINTS</h4><blockquote><p>
<p>
The only adjustable parameters are the number of TBDs and RBDs that will be
created at run-time.  These parameters are given to the driver when 
<b><i><a href="./motFecEnd.html#motFecEndLoad">motFecEndLoad</a></i>(&nbsp;)</b> is called.  There is one RBD associated with each received 
frame whereas a single transmit packet normally uses more than one TBD.  For 
memory-limited applications, decreasing the number of RBDs may be 
desirable.  Decreasing the number of TBDs below a certain point will 
provide substantial performance degradation, and is not reccomended. An 
adequate number of loaning buffers are also pre-allocated to provide more 
buffering before packets are dropped, but this is not configurable.
<p>
The relative priority of the netTask and of the other tasks in the system
may heavily affect performance of this driver. Usually the best performance 
is achieved when the netTask priority equals that of the other 
applications using the driver.
<p>
</blockquote><h4>SPECIAL CONSIDERATIONS</h4><blockquote><p>
<p>
Due to the FEC8 errata in the document: "MPC860 Family Device Errata Reference"
available at the Motorola web site, the number of receive buffer
descriptors (RBD) for the FEC (see <b>configNet.h</b>) is kept deliberately high.
According to Motorola, this problem was fixed in Rev. B3 of the silicon.
In memory-bound applications, when using the above mentioned revision of
the MPC860T processor, the user may decrease the number of RBDs
to fit his needs.
<p>
</blockquote><h4>SEE ALSO</h4><blockquote><p>
<b><a href="./ifLib.html#top">ifLib</a></b>,  
<i>MPC860T Fast Ethernet Controller (Supplement to the MPC860 User's Manual) </i>
<i>Motorola MPC860 User's Manual </i>,  
<p>


<hr>
<a name="motFecEndLoad"></a>
<p align=right>
<a href="rtnIndex.html"><i>Libraries :  Routines</i></a></p>

</blockquote><h1><i>motFecEndLoad</i>(&nbsp;)</h1> <blockquote></a></blockquote><h4>NAME</h4><blockquote>  
<p><strong><i>motFecEndLoad</i>(&nbsp;)</strong> - initialize the driver and device</p>

</blockquote><h4>SYNOPSIS</h4><blockquote><p>
<pre>END_OBJ* motFecEndLoad
    (
    char * initString /* parameter string */
    )</pre>

</blockquote><h4>DESCRIPTION</h4><blockquote><p>
This routine initializes both driver and device to an operational state
using device specific parameters specified by <i>initString</i>.
<p>
The parameter string, <i>initString</i>, is an ordered list of parameters each
separated by a colon. The format of <i>initString</i> is:
<p>
"<i>motCpmAddr</i>:<i>ivec</i>:<i>bufBase</i>:<i>bufSize</i>:<i>fifoTxBase</i>:<i>fifoRxBase</i>
:<i>tbdNum</i>:<i>rbdNum</i>:<i>phyAddr</i>:<i>isoPhyAddr</i>:<i>phyDefMode</i>:<i>userFlags</i>"
<p>
The FEC shares a region of memory with the driver.  The caller of this
routine can specify the address of this memory region, or can specify that
the driver must obtain this memory region from the system resources.
<p>
A default number of transmit/receive buffer descriptors of 32 can be 
selected by passing zero in the parameters <i>tbdNum</i> and <i>rbdNum</i>. 
In other cases, the number of buffers selected should be greater than two.
<p>
The <i>bufBase</i> parameter is used to inform the driver about the shared
memory region.  If this parameter is set to the constant "NONE," then this
routine will attempt to allocate the shared memory from the system.  Any
other value for this parameter is interpreted by this routine as the address
of the shared memory region to be used. The <i>bufSize</i> parameter is used
to check that this region is large enough with respect to the provided
values of both transmit/receive buffer descriptors.
<p>
If the caller provides the shared memory region, then the driver assumes
that this region does not require cache coherency operations, nor does it
require conversions between virtual and physical addresses.
<p>
If the caller indicates that this routine must allocate the shared memory
region, then this routine will use <b><i><a href="./cacheLib.html#cacheDmaMalloc">cacheDmaMalloc</a></i>(&nbsp;)</b> to obtain
some  cache-safe memory.  The attributes of this memory will be checked,
and if the memory is not write coherent, this routine will abort and
return NULL.
<p>
</blockquote><h4>RETURNS</h4><blockquote><p>
an END object pointer, or NULL on error.
<p>
</blockquote><h4>SEE ALSO</h4><blockquote><p>
<b><a href="./motFecEnd.html#top">motFecEnd</a></b>, <b><a href="./ifLib.html#top">ifLib</a></b>,  
<i>MPC860T Fast Ethernet Controller (Supplement to MPC860 User's Manual) </i>

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