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<html><head><!-- /vobs/wpwr/docs/vxworks/ref/pentiumLib.html - generated by refgen from ../i86/pentiumLib.c --> <title> pentiumLib </title></head><body bgcolor="#FFFFFF"> <hr><a name="top"></a><p align=right><a href="libIndex.html"><i>VxWorks Reference Manual : Libraries</i></a></p></blockquote><h1>pentiumLib</h1> <blockquote></a></blockquote><h4>NAME</h4><blockquote> <p><strong>pentiumLib</strong> - Pentium and PentiumPro library </p></blockquote><h4>ROUTINES</h4><blockquote><p><p><b><i><a href="./pentiumLib.html#pentiumMtrrEnable">pentiumMtrrEnable</a></i>( )</b> - enable MTRR (Memory Type Range Register)<br><b><i><a href="./pentiumLib.html#pentiumMtrrDisable">pentiumMtrrDisable</a></i>( )</b> - disable MTRR (Memory Type Range Register)<br><b><i><a href="./pentiumLib.html#pentiumMtrrGet">pentiumMtrrGet</a></i>( )</b> - get MTRRs to a specified MTRR table<br><b><i><a href="./pentiumLib.html#pentiumMtrrSet">pentiumMtrrSet</a></i>( )</b> - set MTRRs from specified MTRR table with WRMSR instruction.<br><p></blockquote><h4>DESCRIPTION</h4><blockquote><p>This library provides Pentium and PentiumPro specific routines. <p>MTRR (Memory Type Range Register) are a new feature introduced in the PentiumPro processor that allow the processor to optimize memory operationsfor different types of memory, such as RAM, ROM, frame buffer memory, andmemory-mapped IO. MTRRs configure an internal map of how physical address ranges are mapped to various types of memory. The processor uses this internalmap to determine the cacheability of various physical memory locations and theoptimal method of accessing memory locations. For example, if a memorylocation is specified in an MTRR as write-through memory, the processor handlesaccesses to this location as follows. It reads data from that location in lines and caches the read data or maps all writes to that location to the busand updates the cache to maintain cache coherency. In mapping the physicaladdress space with MTRRs, the processor recognizes five types of memory:uncacheable (UC), write-combining (WC), write-through (WT),write-protected (WP), and write-back (WB).<p>There is one table - sysMtrr[] in <b>sysLib.c</b> - and four routines to interfacethe MTRR. These four routines are:<pre> void pentiumMtrrEnable (void) void pentiumMtrrDisable (void) void pentiumMtrrGet ( MTRR * pMtrr /* MTRR table */ ) void pentiumMtrrSet (void) ( MTRR * pMtrr /* MTRR table */ )</pre><b><i><a href="./pentiumLib.html#pentiumMtrrEnable">pentiumMtrrEnable</a></i>( )</b> enables MTRR, <b><i><a href="./pentiumLib.html#pentiumMtrrDisable">pentiumMtrrDisable</a></i>( )</b> disables MTRR.<b><i><a href="./pentiumLib.html#pentiumMtrrGet">pentiumMtrrGet</a></i>( )</b> gets MTRRs to the specified MTRR table.<b><i><a href="./pentiumLib.html#pentiumMtrrGet">pentiumMtrrGet</a></i>( )</b> sets MTRRs from the specified MTRR table.The MTRR table is defined as follows:<pre>typedef struct mtrr_fix /* MTRR - fixed range register */ { char type[8]; /* address range: [0]=0-7 ... [7]=56-63 */ } MTRR_FIX;typedef struct mtrr_var /* MTRR - variable range register */ { long long int base; /* base register */ long long int mask; /* mask register */ } MTRR_VAR;typedef struct mtrr /* MTRR */ { int cap[2]; /* MTRR cap register */ int deftype[2]; /* MTRR defType register */ MTRR_FIX fix[11]; /* MTRR fixed range registers */ MTRR_VAR var[8]; /* MTRR variable range registers */ } MTRR;</pre>Fixed Range Register's type array can be one of following memory types.<b>MTRR_UC</b> (uncacheable), <b>MTRR_WC</b> (write-combining), <b>MTRR_WT</b> (write-through), <b>MTRR_WP</b> (write-protected), and <b>MTRR_WB</b> (write-back).MTRR is enabled in <b><i><a href="./sysLib.html#sysHwInit">sysHwInit</a></i>( )</b>.<p></blockquote><h4>SEE ALSO</h4><blockquote><p><b><a href="./pentiumLib.html#top">pentiumLib</a></b>, <i>Pentium, PentiumPro Family Developer's Manual </i><hr><a name="pentiumMtrrEnable"></a><p align=right><a href="rtnIndex.html"><i>Libraries : Routines</i></a></p></blockquote><h1><i>pentiumMtrrEnable</i>( )</h1> <blockquote></a></blockquote><h4>NAME</h4><blockquote> <p><strong><i>pentiumMtrrEnable</i>( )</strong> - enable MTRR (Memory Type Range Register)</p></blockquote><h4>SYNOPSIS</h4><blockquote><p><pre>void pentiumMtrrEnable (void)</pre></blockquote><h4>DESCRIPTION</h4><blockquote><p>This routine enables the MTRR that provide a mechanism for associating thememory types with physical address ranges in system memory.<p></blockquote><h4>RETURNS</h4><blockquote><p>N/A</blockquote><h4>SEE ALSO</h4><blockquote><p><b><a href="./pentiumLib.html#top">pentiumLib</a></b><hr><a name="pentiumMtrrDisable"></a><p align=right><a href="rtnIndex.html"><i>Libraries : Routines</i></a></p></blockquote><h1><i>pentiumMtrrDisable</i>( )</h1> <blockquote></a></blockquote><h4>NAME</h4><blockquote> <p><strong><i>pentiumMtrrDisable</i>( )</strong> - disable MTRR (Memory Type Range Register)</p></blockquote><h4>SYNOPSIS</h4><blockquote><p><pre>void pentiumMtrrDisable (void)</pre></blockquote><h4>DESCRIPTION</h4><blockquote><p>This routine disables the MTRR that provide a mechanism for associating thememory types with physical address ranges in system memory.<p></blockquote><h4>RETURNS</h4><blockquote><p>N/A</blockquote><h4>SEE ALSO</h4><blockquote><p><b><a href="./pentiumLib.html#top">pentiumLib</a></b><hr><a name="pentiumMtrrGet"></a><p align=right><a href="rtnIndex.html"><i>Libraries : Routines</i></a></p></blockquote><h1><i>pentiumMtrrGet</i>( )</h1> <blockquote></a></blockquote><h4>NAME</h4><blockquote> <p><strong><i>pentiumMtrrGet</i>( )</strong> - get MTRRs to a specified MTRR table</p></blockquote><h4>SYNOPSIS</h4><blockquote><p><pre>STATUS pentiumMtrrGet ( MTRR * pMtrr /* MTRR table */ )</pre></blockquote><h4>DESCRIPTION</h4><blockquote><p>This routine gets MTRRs to a specified MTRR table with RDMSR instruction.The read MTRRs are CAP register, DEFTYPE register, fixed range MTRRs, andvariable range MTRRs.<p></blockquote><h4>RETURNS</h4><blockquote><p>OK, or ERROR if MTRR is being accessed.</blockquote><h4>SEE ALSO</h4><blockquote><p><b><a href="./pentiumLib.html#top">pentiumLib</a></b><hr><a name="pentiumMtrrSet"></a><p align=right><a href="rtnIndex.html"><i>Libraries : Routines</i></a></p></blockquote><h1><i>pentiumMtrrSet</i>( )</h1> <blockquote></a></blockquote><h4>NAME</h4><blockquote> <p><strong><i>pentiumMtrrSet</i>( )</strong> - set MTRRs from specified MTRR table with WRMSR instruction.</p></blockquote><h4>SYNOPSIS</h4><blockquote><p><pre>STATUS pentiumMtrrSet ( MTRR * pMtrr /* MTRR table */ )</pre></blockquote><h4>DESCRIPTION</h4><blockquote><p>This routine sets MTRRs from specified MTRR table with WRMSR instruction.The written MTRRs are DEFTYPE register, fixed range MTRRs, and variablerange MTRRs.<p></blockquote><h4>RETURNS</h4><blockquote><p>OK, or ERROR if MTRR is enabled or being accessed.</blockquote><h4>SEE ALSO</h4><blockquote><p><b><a href="./pentiumLib.html#top">pentiumLib</a></b></body></html>⌨️ 快捷键说明
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