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<p class="BodyLeft"><a name="85710"> </a>upper memory</p></td></tr><tr valign="top"><td colspan=1 rowspan=1><p class="BodyLeft"><a name="85713"> </a><b class="file">bootrom</b> </p></td><td colspan=1 rowspan=1><p class="BodyLeft"><a name="85715"> </a>bootROM (compressed): </p></td><td colspan=1 rowspan=1><p class="BodyLeft"><a name="85717"> </a>lower memory</p></td></tr><tr valign="top"><td colspan=1 rowspan=1><p class="BodyLeft"><a name="85720"> </a><b class="file">bootrom_uncmp</b> </p></td><td colspan=1 rowspan=1><p class="BodyLeft"><a name="85722"> </a>bootROM: </p></td><td colspan=1 rowspan=1><p class="BodyLeft"><a name="85724"> </a>lower memory</p></td></tr><tr valign="top"><td colspan=1 rowspan=1><p class="BodyLeft"><a name="85727"> </a><b class="file">bootrom_high</b> </p></td><td colspan=1 rowspan=1><p class="BodyLeft"><a name="85729"> </a>bootROM (compressed): </p></td><td colspan=1 rowspan=1><p class="BodyLeft"><a name="85732"> </a>upper memory</p></td></tr><tr valign="middle"><td colspan="20"></td></tr></table></p></p></dl></dl><font face="Helvetica, sans-serif" class="sans"><h4 class="H4"><i><a name="85733">BSP-Specific Global Variables for 386 and 486</a></i></h4></font><dl class="margin"><dl class="margin"><dd><p class="Body"><a name="85738"> </a>The BSP-specific global variables shown in <a href="x-ix865.html#85745">Table D-3</a> apply to pc386, pc486, and epc4. <p class="table"><h4 class="EntityTitle"><a name="85745"><font face="Helvetica, sans-serif" size="-1" class="sans">Table D-3: BSP-Specific Global Variables </font></a></h4><table border="0" cellpadding="0" cellspacing="0"><tr><td colspan="20"><hr class="tablerule"></td></tr><tr valign="middle"><th rowspan="1" colspan="1"><div class="CellHeading"><b><a name="85753"> </a><font face="Helvetica, sans-serif" size="-1" class="sans">Location</font></b></div></th><th rowspan="1" colspan="1"><div class="CellHeading"><b><a name="85755"> </a><font face="Helvetica, sans-serif" size="-1" class="sans">Global Variable</font></b></div></th><th rowspan="1" colspan="1"><div class="CellHeading"><b><a name="85757"> </a><font face="Helvetica, sans-serif" size="-1" class="sans">Value</font></b></div></th><th rowspan="1" colspan="1"><div class="CellHeading"><b><a name="85759"> </a><font face="Helvetica, sans-serif" size="-1" class="sans">Description</font></b></div></th></tr><tr><td colspan="20"><hr class="tablerule2"></td></tr><tr valign="top"><td colspan=1 rowspan=1><div class="CellBody"><a name="85761"> </a><b class="file">sysLib.c</b> </div></td><td colspan=1 rowspan=1><div class="CellBody"><a name="85764"> </a><b class="symbol_lc">sysWarmType</b> <br><b class="symbol_lc">sysWarmFdType</b> <br><b class="symbol_lc">sysWarmFdDrive</b> <br><b class="symbol_lc">sysWarmAtaCtrl</b> <br><b class="symbol_lc">sysWarmAtaDrive</b> <br><b class="symbol_lc">sysWarmTffsDrive</b> </div></td><td colspan=1 rowspan=1><div class="CellBody"><a name="85774"> </a>0 = ROMBIOS <br>1 (default) = <br> Diskette <br>2 = ATA <br>3 = TFFS </div></td><td colspan=1 rowspan=1><div class="CellBody"><a name="85778"> </a><b class="symbol_lc">sysWarmType</b> controls how <kbd>CTRL+X </kbd>is processed. If 0, VxWorks asserts SYSRESET line, and <kbd>CTRL+X</kbd> produces cold start. If 1, VxWorks reads a boot image from the diskette specified by <b class="symbol_lc">sysWarmFdType</b> and <b class="symbol_lc">sysWarmFdDrive</b>, and jumps to the boot image entry point. If 2, VxWorks reads a boot image from the ATA/IDE disk specified by <b class="symbol_lc">sysWarmAtaCtrl</b> and <b class="symbol_lc">sysWarmAtaDrive</b> and jumps to the boot image entry point. If 3, VxWorks reads a boot image from the TFFS Disk On Chip specified by <b class="symbol_lc">sysWarmTffsDrive</b> and jumps to the boot image entry point. </div></td></tr><tr valign="top"><td colspan=1 rowspan=1><a name="85780"><font color="red"><blink></blink></font></a></td><td colspan=1 rowspan=1><div class="CellBody"><a name="85783"> </a><b class="symbol_lc">sysFdBufAddr</b> <br><b class="symbol_lc">sysFdBufSize</b> </div></td><td colspan=1 rowspan=1><div class="CellBody"><a name="85787"> </a>0x2000 <br>0x3000 </div></td><td colspan=1 rowspan=1><div class="CellBody"><a name="85790"> </a>Address and size of diskette DMA buffer. </div></td></tr><tr valign="top"><td colspan=1 rowspan=1><a name="85792"><font color="red"><blink></blink></font></a></td><td colspan=1 rowspan=1><div class="CellBody"><a name="85795"> </a><b class="symbol_lc">sysStrayIntCount</b> </div></td><td colspan=1 rowspan=1><div class="CellBody"><a name="85797"> </a> </div></td><td colspan=1 rowspan=1><div class="CellBody"><a name="85799"> </a>VxWorks increments this when it catches a stray interrupt on IRQ7.<b></b> </div></td></tr><tr><td colspan="20"><hr class="tablerule"></td></tr><tr valign="middle"><td colspan="20"></td></tr></table></p></p></dl></dl><font face="Helvetica, sans-serif" class="sans"><h4 class="H4"><i><a name="85801">Configuring the Pentium BSP</a></i></h4></font><dl class="margin"><dl class="margin"><dd><p class="Body"><a name="85802"> </a>The project facility configures the Pentium BSP with hardware floating point support and user data cache support set to copyback by default. This configuration is equivalent to the default configuration in <b class="file">config.h</b>: </p></dl><dl class="margin"><dd><pre class="Code"><b><a name="85803">#undef INCLUDE_SW_FP /* Pentium has hardware FPP */ #undef USER_D_CACHE_MODE /* Pentium write-back data cache support */ #define USER_D_CACHE_MODE CACHE_COPYBACK #define INCLUDE_MTRR_GET /* get MTRR to sysMtrr[] */ #define INCLUDE_PMC /* include PMC */</a></b></pre></dl></dl><font face="Helvetica, sans-serif" class="sans"><h4 class="H4"><i><a name="88706">Configuring the PentiumPro BSP</a></i></h4></font><dl class="margin"><dl class="margin"><dd><p class="Body"><a name="88715"> </a>The project facility configures the PentiumPro BSP automatically to use the board's special functionality. This configuration is equivalent to the default configuration in <b class="file">config.h</b>. Changes to floating point and cache support can be made in the project facility. If you must change the default setting for other functionality, you must change <b class="file">config.h</b>. (See <a href="c-config.html#84365"><i class="title">8. Configuration and Build</i></a>.)</p></dl><dl class="margin"><dd><pre class="Code"><b><a name="85806">#undef INCLUDE_SW_FP /* PentiumPro has hardware FPP * #undef USER_D_CACHE_MODE /* PentiumPro write-back data cache support */ #define USER_D_CACHE_MODE (CACHE_COPYBACK|CACHE_SNOOP_ENABLED) #define INCLUDE_MTRR_GET /* get MTRR to sysMtrr[] */ #define INCLUDE_PMC /* include PMC */ #undef VIRTUAL_WIRE_MODE /* Interrupt Mode: Virtual Wire Mode */ #undef SYMMETRIC_IO_MODE /* Interrupt Mode: Symmetric IO Mode */ #if defined(VIRTUAL_WIRE_MODE) || defined(SYMMETRIC_IO_MODE) #define INCLUDE_APIC_TIMER /* include Local APIC timer */ #define PIT0_FOR_AUX /* use channel 0 as an Aux Timer */ #endif /* defined(VIRTUAL_WIRE_MODE) || defined(SYMMETRIC_IO_MODE) */ #define INCLUDE_TIMESTAMP_TSC /* include TSC for timestamp */ #define PENTIUMPRO_TSC_FREQ 0 /* auto detect TSC freq */ #if FALSE #define PENTIUMPRO_TSC_FREQ 150000000 /* use specified TSC freq */ #endif /* FALSE */ #define INCLUDE_MMU_PENTIUMPRO /* include 32bit MMU for PentiumPro */ #ifdef INCLUDE_MMU_PENTIUMPRO #undef VM_PAGE_SIZE /* page size could be 4KB or 4MB */ #define VM_PAGE_SIZE PAGE_SIZE_4KB /* 4KB page */ #if FALSE #define VM_PAGE_SIZE PAGE_SIZE_4MB /* 4MB page */ #endif /* FALSE */ #undef VM_STATE_MASK_FOR_ALL #undef VM_STATE_FOR_IO #undef VM_STATE_FOR_MEM_OS #undef VM_STATE_FOR_MEM_APPLICATION #undef VM_STATE_FOR_PCI #define VM_STATE_MASK_FOR_ALL \ VM_STATE_MASK_VALID | VM_STATE_MASK_WRITABLE | \ VM_STATE_MASK_CACHEABLE | VM_STATE_MASK_WBACK | VM_STATE_MASK_GLOBAL #define VM_STATE_FOR_IO \ VM_STATE_VALID | VM_STATE_WRITABLE | \ VM_STATE_CACHEABLE_NOT | VM_STATE_WBACK_NOT | VM_STATE_GLOBAL_NOT #define VM_STATE_FOR_MEM_OS \ VM_STATE_VALID | VM_STATE_WRITABLE | \ VM_STATE_CACHEABLE | VM_STATE_WBACK | VM_STATE_GLOBAL_NOT #define VM_STATE_FOR_MEM_APPLICATION \ VM_STATE_VALID | VM_STATE_WRITABLE | \ VM_STATE_CACHEABLE | VM_STATE_WBACK | VM_STATE_GLOBAL_NOT #define VM_STATE_FOR_PCI \ VM_STATE_VALID | VM_STATE_WRITABLE | \ VM_STATE_CACHEABLE_NOT | VM_STATE_WBACK_NOT | VM_STATE_GLOBAL_NOT #endif /* INCLUDE_MMU_PENTIUMPRO */</a></b></pre></dl></dl><font face="Helvetica, sans-serif" class="sans"><h4 class="H4"><i><a name="85809">ROM Card and EPROM Support</a></i></h4></font><dl class="margin"><dl class="margin"><dd><p class="Body"><a name="85810"> </a>A boot EPROM (type 27020 or 27040) is supported with Blunk Microsystems' ROM Card 1.0. For information on booting from these devices, see the Blunk Microsystems documentation.</p><dd><p class="Body"><a name="85811"> </a>The following program is provided to support VxWorks with the ROM Card:</p></dl><dl class="margin"><dd><div class="Item"><a name="85812"> </a><b class="command">config/</b><i class="textVariable">bspname</i><b class="command">/romcard.s</b></div><dl class="margin"><dd><div class="Indent"><a name="85813"> </a>a loader for cod⌨️ 快捷键说明
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