📄 c-basic5.html
字号:
<tr valign="top"><td colspan=1 rowspan=1><div class="CellBody"><a name="91460"> </a><b class="library">mathALib</b> </div></td><td colspan=1 rowspan=1><div class="CellBody"><a name="91462"> </a>All routines, if <b class="routine"><i class="routine">fppSave</i></b><b>( )</b>/<b class="routine"><i class="routine">fppRestore</i></b><b>( )</b> are used </div></td></tr><tr valign="top"><td colspan=1 rowspan=1><div class="CellBody"><a name="91464"> </a><b class="library">msgQLib</b> </div></td><td colspan=1 rowspan=1><div class="CellBody"><a name="91466"> </a><b class="routine"><i class="routine">msgQSend</i></b><b>( )</b> </div></td></tr><tr valign="top"><td colspan=1 rowspan=1><div class="CellBody"><a name="91468"> </a><b class="library">pipeDrv</b> </div></td><td colspan=1 rowspan=1><div class="CellBody"><a name="91470"> </a><b class="routine"><i class="routine">write</i></b><b>( )</b> </div></td></tr><tr valign="top"><td colspan=1 rowspan=1><div class="CellBody"><a name="91472"> </a><b class="library">rngLib</b> </div></td><td colspan=1 rowspan=1><div class="CellBody"><a name="91474"> </a>All routines except <b class="routine"><i class="routine">rngCreate</i></b><b>( )</b> and <b class="routine"><i class="routine">rngDelete</i></b><b>( )</b> </div></td></tr><tr valign="top"><td colspan=1 rowspan=1><div class="CellBody"><a name="91476"> </a><b class="library">selectLib</b> </div></td><td colspan=1 rowspan=1><div class="CellBody"><a name="91478"> </a><b class="routine"><i class="routine">selWakeup</i></b><b>( )</b><b>, </b><b class="routine"><i class="routine">selWakeupAll</i></b><b>( )</b> </div></td></tr><tr valign="top"><td colspan=1 rowspan=1><div class="CellBody"><a name="91480"> </a><b class="library">semLib</b> </div></td><td colspan=1 rowspan=1><div class="CellBody"><a name="91482"> </a><b class="routine"><i class="routine">semGive</i></b><b>( )</b> except mutual-exclusion semaphores, <b class="routine"><i class="routine">semFlush</i></b><b>( )</b> </div></td></tr><tr valign="top"><td colspan=1 rowspan=1><div class="CellBody"><a name="91484"> </a><b class="library">sigLib</b> </div></td><td colspan=1 rowspan=1><div class="CellBody"><a name="91486"> </a><b class="routine"><i class="routine">kill</i></b><b>( )</b> </div></td></tr><tr valign="top"><td colspan=1 rowspan=1><div class="CellBody"><a name="91488"> </a><b class="library">taskLib</b> </div></td><td colspan=1 rowspan=1><div class="CellBody"><a name="91490"> </a><b class="routine"><i class="routine">taskSuspend</i></b><b>( )</b>, <b class="routine"><i class="routine">taskResume</i></b><b>( )</b>, <b class="routine"><i class="routine">taskPrioritySet</i></b><b>( )</b>, <b class="routine"><i class="routine">taskPriorityGet</i></b><b>( )</b>, <br><b class="routine"><i class="routine">taskIdVerify</i></b><b>( )</b>, <b class="routine"><i class="routine">taskIdDefault</i></b><b>( )</b>, <b class="routine"><i class="routine">taskIsReady</i></b><b>( )</b>, <b class="routine"><i class="routine">taskIsSuspended</i></b><b>( )</b>, <br><b class="routine"><i class="routine">taskTcb</i></b><b>( )</b> </div></td></tr><tr valign="top"><td colspan=1 rowspan=1><div class="CellBody"><a name="91492"> </a><b class="library">tickLib</b> </div></td><td colspan=1 rowspan=1><div class="CellBody"><a name="91494"> </a><b class="routine"><i class="routine">tickAnnounce</i></b><b>( )</b>, <b class="routine"><i class="routine">tickSet</i></b><b>( )</b>, <b class="routine"><i class="routine">tickGet</i></b><b>( )</b> </div></td></tr><tr valign="top"><td colspan=1 rowspan=1><div class="CellBody"><a name="91496"> </a><b class="library">tyLib</b> </div></td><td colspan=1 rowspan=1><div class="CellBody"><a name="91498"> </a><b class="routine"><i class="routine">tyIRd</i></b><b>( )</b>, <b class="routine"><i class="routine">tyITx</i></b><b>( )</b> </div></td></tr><tr valign="top"><td colspan=1 rowspan=1><div class="CellBody"><a name="91500"> </a><b class="library">vxLib</b> </div></td><td colspan=1 rowspan=1><div class="CellBody"><a name="91502"> </a><b class="routine"><i class="routine">vxTas</i></b><b>( )</b><b>, </b><b class="routine"><i class="routine">vxMemProbe</i></b><b>( )</b> </div></td></tr><tr valign="top"><td colspan=1 rowspan=1><div class="CellBody"><a name="91504"> </a><b class="library">wdLib</b> </div></td><td colspan=1 rowspan=1><div class="CellBody"><a name="91506"> </a><b class="routine"><i class="routine">wdStart</i></b><b>( )</b>, <b class="routine"><i class="routine">wdCancel</i></b><b>( )</b> </div></td></tr><tr><td colspan="20"><hr class="tablerule"></td></tr><tr valign="middle"><td colspan="20"></td></tr></table></p></p><dd><p class="Body"><a name="86695"> </a>For this reason, the basic restriction on ISRs is that they must not invoke routines that might cause the caller to block. For example, they must not try to take a semaphore, because if the semaphore is unavailable, the kernel tries to switch the caller to the pended state. However, ISRs can give semaphores, releasing any tasks waiting on them.</p><dd><p class="Body"><a name="86699"> </a>Because the memory facilities <b class="routine"><i class="routine">malloc</i></b><b>( )</b> and <b class="routine"><i class="routine">free</i></b><b>( )</b><b class="routine"><i class="routine"> </i></b>take a semaphore, they cannot be called by ISRs, and neither can routines that make calls to <b class="routine"><i class="routine">malloc</i></b><b>( )</b> and <b class="routine"><i class="routine">free</i></b><b>( )</b>. For example, ISRs cannot call any creation or deletion routines.</p><dd><p class="Body"><a name="86701"> </a>ISRs also must not perform I/O through VxWorks drivers. Although there are no inherent restrictions in the I/O system, most device drivers require a task context because they might block the caller to wait for the device. An important exception is the VxWorks pipe driver, which is designed to permit writes by ISRs.</p><dd><p class="Body"><a name="86703"> </a>VxWorks supplies a logging facility, in which a logging task prints text messages to the system console. This mechanism was specifically designed so that ISRs could use it, and is the most common way to print messages from ISRs. For more information, see the reference entry for <b class="library">logLib</b>.</p><dd><p class="Body"><a name="86705"> </a>An ISR also must not call routines that use a floating-point coprocessor. In VxWorks, the interrupt driver code created by <b class="routine"><i class="routine">intConnect</i></b><b>( )</b> does not save and restore floating-point registers; thus, ISRs must not include floating-point instructions. If an ISR requires floating-point instructions, it must explicitly save and restore the registers of the floating-point coprocessor using routines in <b class="library">fppArchLib</b>.</p><dd><p class="Body"><a name="86708"> </a>All VxWorks utility libraries, such as the linked-list and ring-buffer libraries, can be used by ISRs. As discussed earlier (<a href="c-basic3.html#84590"><i class="title">2.3.7 Task Error Status: errno</i></a>), the global variable <b class="symbol_lc">errno</b> is saved and restored as a part of the interrupt enter and exit code generated by the <b class="routine"><i class="routine">intConnect</i></b><b>( )</b> facility. Thus <b class="symbol_lc">errno</b> can be referenced and modified by ISRs as in any other code. <a href="c-basic5.html#91424">Table 2-23</a> lists routines that can be called from ISRs.</p></dl></dl><font face="Helvetica, sans-serif" class="sans"><h4 class="H3"><i><a name="86813">2.5.4 Exceptions at Interrupt Level</a></i></h4></font><dl class="margin"><dl class="margin"><dd><p class="Body"><a name="86814"> </a>When a task causes a hardware exception such as illegal instruction or bus error, the task is suspended and the rest of the system continues uninterrupted. However, when an ISR causes such an exception, there is no safe recourse for the system to handle the exception. The ISR has no context that can be suspended. Instead, VxWorks stores the description of the exception in a special location in low memory and executes a system restart.</p><dd><p class="Body"><a name="86815"> </a>The VxWorks boot ROMs test for the presence of the exception description in low memory and if it is detected, display it on the system console. The <b class="command">e</b> command in the boot ROMs re-displays the exception description; see <i class="title">Tornado User's Guide: Setup and Startup</i>.</p><dd><p class="Body"><a name="88506"> </a>One example of such an exception is the message:</p><dl class="margin"><dd><pre class="Code2"><b><a name="88507">workQPanic: Kernel work queue overflow.</a></b></pre></dl><dd><p class="Body"><a name="88508"> </a>This exception usually occurs when kernel calls are made from interrupt level at a very high rate. It generally indicates a problem with clearing the interrupt signal or a similar driver problem.</p></dl></dl><font face="Helvetica, sans-serif" class="sans"><h4 class="H3"><i><a name="86817">2.5.5 Reserving High Interrupt Levels</a></i></h4></font><dl class="margin"><dl class="margin"><dd><p class="Body"><a name="86818"> </a>The VxWorks interrupt support described earlier in this section is acceptable for most applications. However, on occasion, low-level control is required for events such as critical motion control or system failure response. In such cases it is desirable to reserve the highest interrupt levels to ensure zero-latency response to these events. To achieve zero-latency response, VxWorks provides the routine <b class="routine"><i class="routine">intLockLevelSet</i></b><b>( )</b>, which sets the system-wide interrupt-lockout level to the specified level. If you do not specify a level, the default is the highest level supported by the processor architecture.</p></dl></dl><dl class="margin"><dd><p class="table" callout><table border="0" cellpadding="0" cellspacing="0"><tr valign="top"><td valign="top" width="40"><br><img border="0" alt="*" src="icons/caution.gif"></td><td><hr><div class="CalloutCell"><a name="93166"><b class="symbol_UC"><font face="Helvetica, sans-serif" size="-1" class="sans">CAUTION: </font></b></a>Some hardware prevents masking certain interrupt levels; check the hardware manufacturer's documentation. For example, on MC680<i class="textVariable">x</i>0 chips, interrupt level 7 is non-maskable. Because level 7 is also the highest interrupt level on this architecture, VxWorks uses 7 as the default lockout level--but this is in fact equivalent to a lockout level of 6, since the hardware prevents locking out level 7.</div></td></tr><tr valign="top"><td></td><td><hr></td></tr><tr valign="middle"><td colspan="20"></td></tr></table></p callout></dl><font face="Helvetica, sans-serif" class="sans"><h4 class="H3"><i><a name="86822">2.5.6 Additional Restrictions for ISRs at High Interrupt Levels</a></i></h4></font><dl class="margin"><dl class="margin"><dd><p class="Body"><a name="86823"> </a>ISRs connected to interrupt levels that are not locked out (either an interrupt level higher than that set by <b class="routine"><i class="routine">intLockLevelSet</i></b><b>( )</b>, or an interrupt level defined in hardware as non-maskable) have special restrictions:</p></dl><dl class="margin"><p class="listspace"><ul class="Bullet" type="disc"><li><a name="86824"> </a>The ISR can be connected only with <b class="routine"><i class="routine">intVecSet</i></b><b>( )</b>.</li></ul></p><p class="listspace"><ul class="Bullet" type="disc"><li><a name="86825"> </a>The ISR cannot use any VxWorks operating system facilities that depend on interrupt locks for correct operation.</li></ul></p></dl></dl><font face="Helvetica, sans-serif" class="sans"><h4 class="H3"><i><a name="86828">2.5.7 Interrupt-to-Task Communication</a></i></h4></font><dl class="margin"><dl class="margin"><dd><p class="Body"><a name="86829"> </a>While it is important that VxWorks support direct connection of ISRs that run at interrupt level, interrupt events usually propagate to task-level code. Many VxWorks facilities are not available to interrupt-level code, including I/O to any device other than pipes. The following techniques can be used to communicate from ISRs to task-level code:</p><b class="BulletHead-run"><li type="disc"><a name="86831"> </a><font face="Helvetica, sans-serif" size="-1" class="sans">Shared Memory and Ring Buffers. </font></b><dl class="margin"><dd><div class="Indent"><a name="87892"> </a>ISRs can share variables, buffers, and ring buffers with task-level code.</div><br></dl><b class="BulletHead-run"><li type="disc"><a name="86833"> </a><font face="Helvetica, sans-serif" size="-1" class="sans">Semaphores. </font></b><dl class="margin"><dd><div class="Indent"><a name="87893"> </a>ISRs can give semaphores (except for mutual-exclusion semaphores and VxMP shared semaphores) that tasks can take and wait for.</div><br></dl><b class="BulletHead-run"><li type="disc"><a name="86835"> </a><font face="Helvetica, sans-serif" size="-1" class="sans">Message Queues. </font></b><dl class="margin"><dd><div class="Indent"><a name="87894"> </a>ISRs can send messages to message queues for tasks to receive (except for shared message queues using VxMP). If the queue is full, the message is discarded.</div><br></dl><b class="BulletHead-run"><li type="disc"><a name="86837"> </a><font face="Helvetica, sans-serif" size="-1" class="sans">Pipes. </font></b><dl class="margin"><dd><div class="Indent"><a name="87895"> </a>ISRs can write messages to pipes that tasks can read. Tasks and ISRs can write to the same pipes. However, if the pipe is full, the message written is discarded because the ISR cannot block. ISRs must not invoke any I/O routine on pipes other than <b class="routine"><i class="routine">write</i></b><b>( )</b>.</div><br></dl><b class="BulletHead-run"><li type="disc"><a name="86839"> </a><font face="Helvetica, sans-serif" size="-1" class="sans">Signals. </font></b><dl class="margin"><dd><div class="Indent"><a name="87896"> </a>ISRs can "signal" tasks, causing asynchronous scheduling of their signal handlers.</div><br></dl></dl></dl><a name="foot"><hr></a><p class="navbar" align="right"><a href="index.html"><img border="0" alt="[Contents]" src="icons/contents.gif"></a><a href="GuideIX.html"><img border="0" alt="[Index]" src="icons/index.gif"></a><a href="c-basic.html"><img border="0" alt="[Top]" src="icons/top.gif"></a><a href="c-basic4.html"><img border="0" alt="[Prev]" src="icons/prev.gif"></a><a href="c-basic6.html"><img border="0" alt="[Next]" src="icons/next.gif"></a></p></body></html><!---by WRS Documentation (), Wind River Systems, Inc. conversion tool: Quadralay WebWorks Publisher 4.0.11 template: CSS Template, Jan 1998 - Jefro --->⌨️ 快捷键说明
复制代码
Ctrl + C
搜索代码
Ctrl + F
全屏模式
F11
切换主题
Ctrl + Shift + D
显示快捷键
?
增大字号
Ctrl + =
减小字号
Ctrl + -