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The I/O base address and interrupt level must match those in <b>config.h</b>.
<p>
<dt>
if_fei
<dd>

Generic driver for the
Intel 82557 Ethernet network interface chip.
An example of a board using this chip is 
the EtherExpress PRO100B. 
To use this driver the <b>INCLUDE_FEI</b>
directive must be enabled in <b>config.h</b>.
If defined <b>FEI_10MB</b> indicates
the unit should operate at ethernet speed of 10 megabits per second.
<p>
</dl>

</blockQuote><h4>Memory Maps</h4><blockQuote>
<table>
<tr valign=top>
<td align=left>Start Address </td><td align=left> Size </td><td align=left> Use</tr>
<tr valign=top>
<td align=left><b>LOCAL_MEM_LOCAL_ADRS</b> </td><td align=left> 0xa0000 </td><td align=left> lower memory</tr>
<tr valign=top>
<td align=left>0xa0000 </td><td align=left> 0x60000 </td><td align=left> video ram, etc</tr>
<tr valign=top>
<td align=left>0x100000 </td><td align=left> <b>LOCAL_MEM_SIZE</b> - 0x100000 </td><td align=left> upper memory</tr>
<tr valign=top>
<td align=left></tr>
</tr>

</table>

</blockQuote><h4>Shared Memory</h4><blockQuote>
Not applicable to this BSP
<p>
</blockQuote><h4>Interrupts</h4><blockQuote>
All ISA interrupts are external to the CPU and are routed
through the ISA interrupt prioritization hardware.  This hardware is
comprised of two 82C59 PICs.  There are 16 ISA interrupts and
interrupt priority levels numbered 0 through 15. The mapping between
interrupt numbers and priority levels is not necessarily one to one.
The motherboard hardware determines the mapping of interrupt
request lines (IRQ) to priority levels. The hardware should
adhere to the standard ISA assignments:
<p>
<br>
&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;IRQ&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;Priority<br>
&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;---&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;--------<br>
&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;0&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;0<br>
&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;1&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;1<br>
&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;2&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;2<br>
&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;3&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;11<br>
&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;4&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;12<br>
&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;5&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;13<br>
&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;6&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;14<br>
&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;7&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;15<br>
&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;8&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;3<br>
&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;9&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;4<br>
&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;10&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;5<br>
&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;11&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;6<br>
&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;12&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;7<br>
&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;13&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;8<br>
&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;14&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;9<br>
&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;15&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;10
<p>
IRQs 0 - 7 are handled by PIC1 and IRQs 8 - 15 by PIC2.  PIC2 interrupts are
cascaded into PIC1 at IRQ2 which is reflected in the above table.
<p>
PentiumPro has new interrupt controller APIC (Advanced Programmable Interrupt
Controller) which consists of Local APIC (on-chip) and IO APIC (on chipset).
They are used in two additional interrupt modes that are configurable in BSP.  
<p>
Virtual Wire Mode: One of three interrupt modes defined by the MP
specification.  In this mode, interrupts are generated by the 8259A 
equivalent PICs, but delivered to the BSP by an APIC that is programmed to 
act as a "virtual wire"; that is, the APIC is logically indistinguishable 
from a hardware connection.  This is a uniprocessor compatibility mode.
To use this mode, define <b>VIRTUAL_WIRE_MODE</b> in <b>config.h</b>
<p>
Symmetric IO Mode: One of three interrupt modes defined by the MP
specification.  In this mode, the APICs are fully functional, and 
interrupts are generated and delivered to the processors by the APICs.  
Any interrupt can be delivered to any processor.  This is the only 
multiprocessor interrupt mode.
To use this mode, define <b>SYMMETRIC_IO_MODE</b> in <b>config.h</b>
<p>
</blockQuote><h4>Serial Configuration</h4><blockQuote>
Refer to the board vendor's documentation.
<p>
</blockQuote><h4>SCSI Configuration</h4><blockQuote>
Refer to the board vendor's documentation.
<p>
</blockQuote><h4>Network Configuration</h4><blockQuote>
Refer to the board vendor's documentation.
<p>
</blockQuote><h4>VME Access</h4><blockQuote>
This BSP has no VME access
<p>
</blockQuote><h4>PCI Access</h4><blockQuote>
In order to use PCI the <b>INCLUDE_PCI</b>
directive must be enabled in <b>config.h</b>.
Furthermore, <b>PCI_CFG_TYPE</b> in <b>pc.h</b>
must be set to the correct configuration type.
Values for <b>PCI_CFG_TYPE</b> must be one of:
<p>
<table>
<tr valign=top>
<th align=left>Macro </th><th align=left> meaning</tr>
<tr><td colspan="2"><hr></tr>
<tr valign=top>
<td align=left><b>PCI_CFG_FORCE</b> </td><td align=left> force user specified configuration</tr>
<tr valign=top>
<td align=left><b>PCI_CFG_AUTO</b> </td><td align=left> VxWorks does auto configuration. Currently unavailable.</tr>
<tr valign=top>
<td align=left><b>PCI_CFG_NONE</b> </td><td align=left> external agent does configuration</tr>
<tr valign=top>
<td align=left></tr>
</tr>

</table>

PCI defines two mechanisms. The newer method, and the default vxWorks
method, is <b>PCI_MECHANISM_1</b>. Some older PCs might work better with
the old method, <b>PCI_MECHANISM_2</b>. If PCI is not working with
your older PC, change the first argument to pciIomapLibInit
to <b>PCI_MECHANISM_2</b> in <b>sysLib.c</b>:
<p>
<pre>#ifdef  INCLUDE_PCI
    pciIomapLibInit (PCI_MECHANISM_1, PCI_CONFIG_ADDR, PCI_CONFIG_DATA,
NONE);
#if     FALSE
    pciIomapLibInit (PCI_MECHANISM_2, PCI_CONFIG_CSE, PCI_CONFIG_FORWARD,
                     PCI_CONFIG_BASE);
#endif  /* FALSE */
</pre>

</blockQuote><h4>Boot Devices</h4><blockQuote>
The supported boot devices are:
<p>
<pre>    `xx' - Ethernet (any one of the many adaptors described above)
</pre>
<pre>    `pcmcia=&lt;slot number&gt;' - PCMCIA device
        slot number is one of:
            0 = PCMCIA slot 0
            1 = PCMCIA slot 1
        Note: Supported PCMCIA boot cards are the 3COM Etherlink III PC card
        and a PCMCIA ATA card
</pre>
<pre>    `fd=&lt;drive number&gt;,&lt;diskette type&gt;' - Diskette
        drive number is one of:
            0 = default; the first diskette drive (drive A:)
            1 = the second diskette drive (drive B:)
        diskette type is one of:
            0 = default; 3.5" diskette
            1 = 5.25" diskette
</pre>
<pre>    `ata=&lt;controller number&gt;,&lt;drive number&gt;' - ATA/IDE drive
        controller number is one of:
            0 = controller described in the first entry of 
                the ataResources table
            1 = controller described in the second entry of 
                the ataResources table
        drive number is one of:
            0 = first drive on the controller
            1 = second drive on the controller
</pre>
Note: 
By default, with <b>INCLUDE_ATA</b>, vxWorks is set up for 
one ATA hard disk device on the primary ATA controller.  
The 2nd hard disk on the primary controller and the 
secondary controller are normally disabled to prevent timeouts.
If you have multiple controllers and/or hard disks
you must modify the ataResources structure array in <b>sysLib.c</b> to support 
more drives.
<p>

Example:
Two controllers, each with two drives (4 drives total):
<pre>ATA_RESOURCE ataResources[ATA_MAX_CTRLS] =
    {
        {
            {
                5, 0,
                {ATA0_IO_START0, ATA0_IO_START1}, 
                {ATA0_IO_STOP0, ATA0_IO_STOP1}, 0,
                0, 0, 0, 0, 0
            },
            IDE_LOCAL, ATA0_NUM_DRIVES, ATA0_INT_VEC, 
            ATA0_INT_LVL, ATA0_CONFIG, ATA_SEM_TIMEOUT, 
            ATA_WDG_TIMEOUT, 0, 0
        },
        {
            {
                 5, 0,
                 {ATA1_IO_START0, ATA1_IO_START1}, 
                 {ATA1_IO_STOP0, ATA1_IO_STOP1}, 0,
                 0, 0, 0, 0, 0
            },
            IDE_LOCAL, ATA1_NUM_DRIVES, ATA1_INT_VEC, 
            ATA1_INT_LVL, ATA1_CONFIG, ATA_SEM_TIMEOUT, 
            ATA_WDG_TIMEOUT, 0, 0
        }
    };
</pre>
where:
<pre>#define ATA0_NUM_DRIVES 2
#define ATA1_NUM_DRIVES 2
#define ATA0_INT_LVL 0x0e
#define ATA1_INT_LVL 0x0f
</pre>
A boot EPROM (type 27020 or 27040) is supported 
with Blunk Microsystems' ROM Card 1.0. 
For information on booting from these devices, 
see the Blunk Microsystems documentation.
The program <b>romcard.s</b>, a loader for code programmed in to the EPROM,
is provided to support 
VxWorks with the ROM Card.
In addition, the following configurations are defined in 
the makefile to generate Motorola S-record format from 
bootrom_uncmp or from vxWorks_boot.st :
<table>
<tr valign=top>
<td align=left>romcard_bootrom_512.hex </td><td align=left> boot </td><td align=left> ROM image for 27040 (512 KB)</tr>
<tr valign=top>
<td align=left>romcard_bootrom_256.hex </td><td align=left> boot </td><td align=left> ROM image for 27020 (256 KB)</tr>
<tr valign=top>
<td align=left>romcard_vxWorks_st_512.hex </td><td align=left> bootable VxWorks image for 27040 (512 KB)</tr>
<tr valign=top>
<td align=left></tr>
</tr>

</table>
Neither the ROM Card nor the EPROM is distributed with VxWorks.
For more information visit <a href="http://www.blunkmicro.com/">http://www.blunkmicro.com/</a>
<p>
</blockQuote><h4>Boot Methods</h4><blockQuote>
The boot methods are affected by the boot parameters.  If no password is
specified, RSH (remote shell) protocol is used.  If a password is specified,
FTP protocol is used, or, if the flag is set, TFTP protocol is used.
<p>
These protocols apply only to Ethernet devices
<p>
</blockQuote><h4>ROM Considerations</h4><blockQuote>
Not applicable to this BSP
<p>
</blockquote><h4>SPECIAL CONSIDERATIONS</h4><blockquote><p>
</blockQuote><h4>Delivered Objects</h4><blockQuote>
<p>
<table>
<tr valign=top>
<th align=left>Object Name </th><th align=left> Description</tr>
<tr><td colspan="2"><hr></tr>
<tr valign=top>
<td align=left>vxWorks </td><td align=left>  image with no target shell or target symbol table. Network is included and initialized. </tr>
<tr valign=top>
<td align=left>VxWorks.st </td><td align=left>  fully linked stand alone image including a target based shell, symbol table, and network  interface. Note that the network interface is not initialized. There is no WDB agent. </tr>
<tr valign=top>
<td align=left>bootrom_uncmp </td><td align=left>  bootrom with uncompressed image which will run in lower memory </tr>
<tr valign=top>
<td align=left><b>mkboot.o</b> </td><td align=left> vxWorks utility for creating boot disks</tr>
<tr valign=top>
<td align=left></tr>
</tr>

</table>

</blockQuote><h4>Make Targets</h4><blockQuote>
The BSP supports the following make targets:
<p>
<table>
<tr valign=top>
<th align=left>Image Name </th><th align=left> Description </th><th align=left> Comments</tr>
<tr><td colspan="3"><hr></tr>
<tr valign=top>
<td align=left>vxWorks_rom </td><td align=left>  high memory uncompressed bootable vxWorks </tr>
<tr valign=top>
<td align=left>vxWorks_rom_low </td><td align=left>  low memory uncompressed bootable vxWorks  </td><td align=left>  feiattach may not obtain enough memory </tr>
<tr valign=top>
<td align=left>vxWorks.st_rom </td><td align=left>  high memory compressed bootable vxWorks.st </tr>
<tr valign=top>
<td align=left>bootrom </td><td align=left>  low memory compressed bootrom </tr>
<tr valign=top>
<td align=left>bootrom_uncmp </td><td align=left>  low memory uncompressed bootrom </tr>
<tr valign=top>
<td align=left>bootrom_high </td><td align=left>  high memory compressed bootrom  </td><td align=left>  May fail to boot; psychadelic video suggest video memory or controller corrupted </tr>