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</P><P>A <EM>rule</EM> appears in the makefile and says when and how to remakecertain files, called the rule's <EM>targets</EM> (most often only one per rule).It lists the other files that are the <EM>dependencies</EM> of the target, and<EM>commands</EM> to use to create or update the target.</P><P><A NAME="IDX100"></A><A NAME="IDX101"></A>The order of rules is not significant, except for determining the<EM>default goal</EM>: the target for <CODE>make</CODE> to consider, if you donot otherwise specify one. The default goal is the target of the firstrule in the first makefile. If the first rule has multiple targets,only the first target is taken as the default. There are twoexceptions: a target starting with a period is not a default unless itcontains one or more slashes, <SAMP>`/'</SAMP>, as well; and, a target thatdefines a pattern rule has no effect on the default goal.(See section <A HREF="make.html#SEC91">Defining and Redefining Pattern Rules</A>.)</P><P>Therefore, we usually write the makefile so that the first rule is theone for compiling the entire program or all the programs described bythe makefile (often with a target called <SAMP>`all'</SAMP>).See section <A HREF="make.html#SEC80">Arguments to Specify the Goals</A>.</P><H2><A NAME="SEC20" HREF="make_toc.html#TOC20">Rule Syntax</A></H2><P><A NAME="IDX102"></A><A NAME="IDX103"></A>In general, a rule looks like this:</P><PRE><VAR>targets</VAR> : <VAR>dependencies</VAR> <VAR>command</VAR> ...</PRE><P>or like this:</P><PRE><VAR>targets</VAR> : <VAR>dependencies</VAR> ; <VAR>command</VAR> <VAR>command</VAR> ...</PRE><P><A NAME="IDX104"></A><A NAME="IDX105"></A>The <VAR>targets</VAR> are file names, separated by spaces. Wildcardcharacters may be used (see section <A HREF="make.html#SEC21">Using Wildcard Characters in File Names</A>) and a name of the form <TT>`<VAR>a</VAR>(<VAR>m</VAR>)'</TT>represents member <VAR>m</VAR> in archive file <VAR>a</VAR> (see section <A HREF="make.html#SEC102">Archive Members as Targets</A>). Usually there is only onetarget per rule, but occasionally there is a reason to have more(see section <A HREF="make.html#SEC35">Multiple Targets in a Rule</A>).</P><P><A NAME="IDX106"></A><A NAME="IDX107"></A>The <VAR>command</VAR> lines start with a tab character. The first command mayappear on the line after the dependencies, with a tab character, or mayappear on the same line, with a semicolon. Either way, the effect is thesame. See section <A HREF="make.html#SEC42">Writing the Commands in Rules</A>.</P><P><A NAME="IDX108"></A><A NAME="IDX109"></A><A NAME="IDX110"></A>Because dollar signs are used to start variable references, if you reallywant a dollar sign in a rule you must write two of them, <SAMP>`$$'</SAMP>(see section <A HREF="make.html#SEC55">How to Use Variables</A>). You may split a long line by inserting a backslashfollowed by a newline, but this is not required, as <CODE>make</CODE> places nolimit on the length of a line in a makefile.</P><P>A rule tells <CODE>make</CODE> two things: when the targets are out of date,and how to update them when necessary.</P><P><A NAME="IDX111"></A><A NAME="IDX112"></A>The criterion for being out of date is specified in terms of the<VAR>dependencies</VAR>, which consist of file names separated by spaces.(Wildcards and archive members (see section <A HREF="make.html#SEC101">Using <CODE>make</CODE> to Update Archive Files</A>) are allowed here too.)A target is out of date if it does not exist or if it is older than anyof the dependencies (by comparison of last-modification times). Theidea is that the contents of the target file are computed based oninformation in the dependencies, so if any of the dependencies changes,the contents of the existing target file are no longer necessarilyvalid.</P><P>How to update is specified by <VAR>commands</VAR>. These are lines to beexecuted by the shell (normally <SAMP>`sh'</SAMP>), but with some extra features(see section <A HREF="make.html#SEC42">Writing the Commands in Rules</A>).</P><H2><A NAME="SEC21" HREF="make_toc.html#TOC21">Using Wildcard Characters in File Names</A></H2><P><A NAME="IDX113"></A><A NAME="IDX114"></A><A NAME="IDX115"></A></P><P><A NAME="IDX116"></A><A NAME="IDX117"></A><A NAME="IDX118"></A>A single file name can specify many files using <EM>wildcard characters</EM>.The wildcard characters in <CODE>make</CODE> are <SAMP>`*'</SAMP>, <SAMP>`?'</SAMP> and<SAMP>`[...]'</SAMP>, the same as in the Bourne shell. For example, <TT>`*.c'</TT>specifies a list of all the files (in the working directory) whose namesend in <SAMP>`.c'</SAMP>.</P><P><A NAME="IDX119"></A><A NAME="IDX120"></A><A NAME="IDX121"></A>The character <SAMP>`~'</SAMP> at the beginning of a file name also has specialsignificance. If alone, or followed by a slash, it represents your homedirectory. For example <TT>`~/bin'</TT> expands to <TT>`/home/you/bin'</TT>.If the <SAMP>`~'</SAMP> is followed by a word, the string represents the homedirectory of the user named by that word. For example <TT>`~john/bin'</TT>expands to <TT>`/home/john/bin'</TT>.</P><P>Wildcard expansion happens automatically in targets, in dependencies,and in commands (where the shell does the expansion). In othercontexts, wildcard expansion happens only if you request it explicitlywith the <CODE>wildcard</CODE> function.</P><P>The special significance of a wildcard character can be turned off bypreceding it with a backslash. Thus, <TT>`foo\*bar'</TT> would refer to aspecific file whose name consists of <SAMP>`foo'</SAMP>, an asterisk, and<SAMP>`bar'</SAMP>.</P><H3><A NAME="SEC22" HREF="make_toc.html#TOC22">Wildcard Examples</A></H3><P>Wildcards can be used in the commands of a rule, where they are expandedby the shell. For example, here is a rule to delete all the object files:</P><PRE>clean: rm -f *.o</PRE><P><A NAME="IDX122"></A></P><P>Wildcards are also useful in the dependencies of a rule. With thefollowing rule in the makefile, <SAMP>`make print'</SAMP> will print all the<SAMP>`.c'</SAMP> files that have changed since the last time you printed them:</P><PRE>print: *.c lpr -p $? touch print</PRE><P><A NAME="IDX123"></A><A NAME="IDX124"></A><A NAME="IDX125"></A>This rule uses <TT>`print'</TT> as an empty target file; see section <A HREF="make.html#SEC33">Empty Target Files to Record Events</A>. (The automatic variable<SAMP>`$?'</SAMP> is used to print only those files that have changed; seesection <A HREF="make.html#SEC94">Automatic Variables</A>.)</P><P>Wildcard expansion does not happen when you define a variable. Thus, ifyou write this:</P><PRE>objects = *.o</PRE><P>then the value of the variable <CODE>objects</CODE> is the actual string<SAMP>`*.o'</SAMP>. However, if you use the value of <CODE>objects</CODE> in a target,dependency or command, wildcard expansion will take place at that time.To set <CODE>objects</CODE> to the expansion, instead use:</P><PRE>objects := $(wildcard *.o)</PRE><P>See section <A HREF="make.html#SEC24">The Function <CODE>wildcard</CODE></A>.</P><H3><A NAME="SEC23" HREF="make_toc.html#TOC23">Pitfalls of Using Wildcards</A></H3><P><A NAME="IDX126"></A><A NAME="IDX127"></A><A NAME="IDX128"></A><A NAME="IDX129"></A><A NAME="IDX130"></A></P><P>Now here is an example of a naive way of using wildcard expansion, thatdoes not do what you would intend. Suppose you would like to say that theexecutable file <TT>`foo'</TT> is made from all the object files in thedirectory, and you write this:</P><PRE>objects = *.ofoo : $(objects) cc -o foo $(CFLAGS) $(objects)</PRE><P>The value of <CODE>objects</CODE> is the actual string <SAMP>`*.o'</SAMP>. Wildcardexpansion happens in the rule for <TT>`foo'</TT>, so that each <EM>existing</EM><SAMP>`.o'</SAMP> file becomes a dependency of <TT>`foo'</TT> and will be recompiled ifnecessary.</P><P>But what if you delete all the <SAMP>`.o'</SAMP> files? When a wildcard matchesno files, it is left as it is, so then <TT>`foo'</TT> will depend on theoddly-named file <TT>`*.o'</TT>. Since no such file is likely to exist,<CODE>make</CODE> will give you an error saying it cannot figure out how tomake <TT>`*.o'</TT>. This is not what you want!</P><P>Actually it is possible to obtain the desired result with wildcardexpansion, but you need more sophisticated techniques, including the<CODE>wildcard</CODE> function and string substitution.These are described in the following section.</P><H3><A NAME="SEC24" HREF="make_toc.html#TOC24">The Function <CODE>wildcard</CODE></A></H3><P><A NAME="IDX131"></A></P><P>Wildcard expansion happens automatically in rules. But wildcard expansiondoes not normally take place when a variable is set, or inside thearguments of a function. If you want to do wildcard expansion in suchplaces, you need to use the <CODE>wildcard</CODE> function, like this:</P><PRE>$(wildcard <VAR>pattern</VAR>...)</PRE><P>This string, used anywhere in a makefile, is replaced by aspace-separated list of names of existing files that match one of thegiven file name patterns. If no existing file name matches a pattern,then that pattern is omitted from the output of the <CODE>wildcard</CODE>function. Note that this is different from how unmatched wildcardsbehave in rules, where they are used verbatim rather than ignored(see section <A HREF="make.html#SEC23">Pitfalls of Using Wildcards</A>).</P><P>One use of the <CODE>wildcard</CODE> function is to get a list of all the C sourcefiles in a directory, like this:</P><PRE>$(wildcard *.c)</PRE><P>We can change the list of C source files into a list of object files byreplacing the <SAMP>`.o'</SAMP> suffix with <SAMP>`.c'</SAMP> in the result, like this:</P><PRE>$(patsubst %.c,%.o,$(wildcard *.c))</PRE><P>(Here we have used another function, <CODE>patsubst</CODE>.See section <A HREF="make.html#SEC73">Functions for String Substitution<BR> and Analysis</A>.)</P><P>Thus, a makefile to compile all C source files in the directory and thenlink them together could be written as follows:</P><PRE>objects := $(patsubst %.c,%.o,$(wildcard *.c))foo : $(objects) cc -o foo $(objects)</PRE><P>(This takes advantage of the implicit rule for compiling C programs, sothere is no need to write explicit rules for compiling the files.See section <A HREF="make.html#SEC57">The Two Flavors of Variables</A>, for an explanation of<SAMP>`:='</SAMP>, which is a variant of <SAMP>`='</SAMP>.)</P><H2><A NAME="SEC25" HREF="make_toc.html#TOC25">Searching Directories for Dependencies</A></H2><P><A NAME="IDX132"></A><A NAME="IDX133"></A><A NAME="IDX134"></A><A NAME="IDX135"></A><A NAME="IDX136"></A></P><P>For large systems, it is often desirable to put sources in a separatedirectory from the binaries. The <EM>directory search</EM> features of<CODE>make</CODE> facilitate this by searching several directoriesautomatically to find a dependency. When you redistribute the filesamong directories, you do not need to change the individual rules,just the search paths.</P><H3><A NAME="SEC26" HREF="make_toc.html#TOC26"><CODE>VPATH</CODE>: Search Path for All Dependencies</A></H3><P><A NAME="IDX137"></A></P><P>The value of the <CODE>make</CODE> variable <CODE>VPATH</CODE> specifies a list ofdirectories that <CODE>make</CODE> should search. Most often, thedirectories are expected to contain dependency files that are not in thecurrent directory; however, <CODE>VPATH</CODE> specifies a search list that<CODE>make</CODE> applies for all files, including files which are targets ofrules.</P><P>Thus, if a file that is listed as a target or dependency does not existin the current directory, <CODE>make</CODE> searches the directories listed in<CODE>VPATH</CODE> for a file with that name. If a file is found in one ofthem, that file becomes the dependency. Rules may then specify thenames of source files in the dependencies as if they all existed in thecurrent directory. See section <A HREF="make.html#SEC28">Writing Shell Commands with Directory Search</A>.</P><P>In the <CODE>VPATH</CODE> variable, directory names are separated by colons orblanks. The order in which directories are listed is the order followedby <CODE>make</CODE> in its search.</P><P>For example,
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