📄 io430x13x.h
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unsigned char P4OUT_6 : 1;
unsigned char P4OUT_7 : 1;
} P4OUT_bit;
} @ 0x001D;
enum {
P4OUT_0 = 0x0001,
P4OUT_1 = 0x0002,
P4OUT_2 = 0x0004,
P4OUT_3 = 0x0008,
P4OUT_4 = 0x0010,
P4OUT_5 = 0x0020,
P4OUT_6 = 0x0040,
P4OUT_7 = 0x0080,
};
__no_init volatile union
{
unsigned char P4DIR; /* Port 4 Direction */
struct
{
unsigned char P4DIR_0 : 1;
unsigned char P4DIR_1 : 1;
unsigned char P4DIR_2 : 1;
unsigned char P4DIR_3 : 1;
unsigned char P4DIR_4 : 1;
unsigned char P4DIR_5 : 1;
unsigned char P4DIR_6 : 1;
unsigned char P4DIR_7 : 1;
} P4DIR_bit;
} @ 0x001E;
enum {
P4DIR_0 = 0x0001,
P4DIR_1 = 0x0002,
P4DIR_2 = 0x0004,
P4DIR_3 = 0x0008,
P4DIR_4 = 0x0010,
P4DIR_5 = 0x0020,
P4DIR_6 = 0x0040,
P4DIR_7 = 0x0080,
};
__no_init volatile union
{
unsigned char P4SEL; /* Port 4 Selection */
struct
{
unsigned char P4SEL_0 : 1;
unsigned char P4SEL_1 : 1;
unsigned char P4SEL_2 : 1;
unsigned char P4SEL_3 : 1;
unsigned char P4SEL_4 : 1;
unsigned char P4SEL_5 : 1;
unsigned char P4SEL_6 : 1;
unsigned char P4SEL_7 : 1;
} P4SEL_bit;
} @ 0x001F;
enum {
P4SEL_0 = 0x0001,
P4SEL_1 = 0x0002,
P4SEL_2 = 0x0004,
P4SEL_3 = 0x0008,
P4SEL_4 = 0x0010,
P4SEL_5 = 0x0020,
P4SEL_6 = 0x0040,
P4SEL_7 = 0x0080,
};
/*-------------------------------------------------------------------------
* Digital I/O Port5/6
*-------------------------------------------------------------------------*/
__no_init volatile union
{
unsigned __READ char P5IN; /* Port 5 Input */
struct
{
unsigned __READ char P5IN_0 : 1;
unsigned __READ char P5IN_1 : 1;
unsigned __READ char P5IN_2 : 1;
unsigned __READ char P5IN_3 : 1;
unsigned __READ char P5IN_4 : 1;
unsigned __READ char P5IN_5 : 1;
unsigned __READ char P5IN_6 : 1;
unsigned __READ char P5IN_7 : 1;
} P5IN_bit;
} @ 0x0030;
enum {
P5IN_0 = 0x0001,
P5IN_1 = 0x0002,
P5IN_2 = 0x0004,
P5IN_3 = 0x0008,
P5IN_4 = 0x0010,
P5IN_5 = 0x0020,
P5IN_6 = 0x0040,
P5IN_7 = 0x0080,
};
__no_init volatile union
{
unsigned char P5OUT; /* Port 5 Output */
struct
{
unsigned char P5OUT_0 : 1;
unsigned char P5OUT_1 : 1;
unsigned char P5OUT_2 : 1;
unsigned char P5OUT_3 : 1;
unsigned char P5OUT_4 : 1;
unsigned char P5OUT_5 : 1;
unsigned char P5OUT_6 : 1;
unsigned char P5OUT_7 : 1;
} P5OUT_bit;
} @ 0x0031;
enum {
P5OUT_0 = 0x0001,
P5OUT_1 = 0x0002,
P5OUT_2 = 0x0004,
P5OUT_3 = 0x0008,
P5OUT_4 = 0x0010,
P5OUT_5 = 0x0020,
P5OUT_6 = 0x0040,
P5OUT_7 = 0x0080,
};
__no_init volatile union
{
unsigned char P5DIR; /* Port 5 Direction */
struct
{
unsigned char P5DIR_0 : 1;
unsigned char P5DIR_1 : 1;
unsigned char P5DIR_2 : 1;
unsigned char P5DIR_3 : 1;
unsigned char P5DIR_4 : 1;
unsigned char P5DIR_5 : 1;
unsigned char P5DIR_6 : 1;
unsigned char P5DIR_7 : 1;
} P5DIR_bit;
} @ 0x0032;
enum {
P5DIR_0 = 0x0001,
P5DIR_1 = 0x0002,
P5DIR_2 = 0x0004,
P5DIR_3 = 0x0008,
P5DIR_4 = 0x0010,
P5DIR_5 = 0x0020,
P5DIR_6 = 0x0040,
P5DIR_7 = 0x0080,
};
__no_init volatile union
{
unsigned char P5SEL; /* Port 5 Selection */
struct
{
unsigned char P5SEL_0 : 1;
unsigned char P5SEL_1 : 1;
unsigned char P5SEL_2 : 1;
unsigned char P5SEL_3 : 1;
unsigned char P5SEL_4 : 1;
unsigned char P5SEL_5 : 1;
unsigned char P5SEL_6 : 1;
unsigned char P5SEL_7 : 1;
} P5SEL_bit;
} @ 0x0033;
enum {
P5SEL_0 = 0x0001,
P5SEL_1 = 0x0002,
P5SEL_2 = 0x0004,
P5SEL_3 = 0x0008,
P5SEL_4 = 0x0010,
P5SEL_5 = 0x0020,
P5SEL_6 = 0x0040,
P5SEL_7 = 0x0080,
};
__no_init volatile union
{
unsigned __READ char P6IN; /* Port 6 Input */
struct
{
unsigned __READ char P6IN_0 : 1;
unsigned __READ char P6IN_1 : 1;
unsigned __READ char P6IN_2 : 1;
unsigned __READ char P6IN_3 : 1;
unsigned __READ char P6IN_4 : 1;
unsigned __READ char P6IN_5 : 1;
unsigned __READ char P6IN_6 : 1;
unsigned __READ char P6IN_7 : 1;
} P6IN_bit;
} @ 0x0034;
enum {
P6IN_0 = 0x0001,
P6IN_1 = 0x0002,
P6IN_2 = 0x0004,
P6IN_3 = 0x0008,
P6IN_4 = 0x0010,
P6IN_5 = 0x0020,
P6IN_6 = 0x0040,
P6IN_7 = 0x0080,
};
__no_init volatile union
{
unsigned char P6OUT; /* Port 6 Output */
struct
{
unsigned char P6OUT_0 : 1;
unsigned char P6OUT_1 : 1;
unsigned char P6OUT_2 : 1;
unsigned char P6OUT_3 : 1;
unsigned char P6OUT_4 : 1;
unsigned char P6OUT_5 : 1;
unsigned char P6OUT_6 : 1;
unsigned char P6OUT_7 : 1;
} P6OUT_bit;
} @ 0x0035;
enum {
P6OUT_0 = 0x0001,
P6OUT_1 = 0x0002,
P6OUT_2 = 0x0004,
P6OUT_3 = 0x0008,
P6OUT_4 = 0x0010,
P6OUT_5 = 0x0020,
P6OUT_6 = 0x0040,
P6OUT_7 = 0x0080,
};
__no_init volatile union
{
unsigned char P6DIR; /* Port 6 Direction */
struct
{
unsigned char P6DIR_0 : 1;
unsigned char P6DIR_1 : 1;
unsigned char P6DIR_2 : 1;
unsigned char P6DIR_3 : 1;
unsigned char P6DIR_4 : 1;
unsigned char P6DIR_5 : 1;
unsigned char P6DIR_6 : 1;
unsigned char P6DIR_7 : 1;
} P6DIR_bit;
} @ 0x0036;
enum {
P6DIR_0 = 0x0001,
P6DIR_1 = 0x0002,
P6DIR_2 = 0x0004,
P6DIR_3 = 0x0008,
P6DIR_4 = 0x0010,
P6DIR_5 = 0x0020,
P6DIR_6 = 0x0040,
P6DIR_7 = 0x0080,
};
__no_init volatile union
{
unsigned char P6SEL; /* Port 6 Selection */
struct
{
unsigned char P6SEL_0 : 1;
unsigned char P6SEL_1 : 1;
unsigned char P6SEL_2 : 1;
unsigned char P6SEL_3 : 1;
unsigned char P6SEL_4 : 1;
unsigned char P6SEL_5 : 1;
unsigned char P6SEL_6 : 1;
unsigned char P6SEL_7 : 1;
} P6SEL_bit;
} @ 0x0037;
enum {
P6SEL_0 = 0x0001,
P6SEL_1 = 0x0002,
P6SEL_2 = 0x0004,
P6SEL_3 = 0x0008,
P6SEL_4 = 0x0010,
P6SEL_5 = 0x0020,
P6SEL_6 = 0x0040,
P6SEL_7 = 0x0080,
};
#define __MSP430_HAS_PORT3__ /* Definition to show that Module is available */
#define __MSP430_HAS_PORT4__ /* Definition to show that Module is available */
#define __MSP430_HAS_PORT5__ /* Definition to show that Module is available */
#define __MSP430_HAS_PORT6__ /* Definition to show that Module is available */
/*-------------------------------------------------------------------------
* USART 0
*-------------------------------------------------------------------------*/
__no_init volatile union
{
unsigned char U0CTL; /* USART 0 Control */
struct
{
unsigned char SWRST : 1; /* USART Software Reset */
unsigned char MM : 1; /* Master Mode off/on */
unsigned char SYNC : 1; /* UART / SPI mode */
unsigned char LISTEN : 1; /* Listen mode */
unsigned char CHAR : 1; /* Data 0:7-bits / 1:8-bits */
unsigned char SPB : 1; /* Stop Bits 0:one / 1: two */
unsigned char PEV : 1; /* Parity 0:odd / 1:even */
unsigned char PENA : 1; /* Parity enable */
} U0CTL_bit;
} @ 0x0070;
enum {
SWRST = 0x0001,
MM = 0x0002,
SYNC = 0x0004,
LISTEN = 0x0008,
CHAR = 0x0010,
SPB = 0x0020,
PEV = 0x0040,
PENA = 0x0080,
};
__no_init volatile union
{
unsigned char U0TCTL; /* USART 0 Transmit Control */
struct
{
unsigned char TXEPT : 1; /* TX Buffer empty */
unsigned char STC : 1; /* SPI: STC enable 0:on / 1:off */
unsigned char TXWAKE : 1; /* TX Wake up mode */
unsigned char URXSE : 1; /* Receive Start edge select */
unsigned char SSEL0 : 1; /* Clock Source Select 0 */
unsigned char SSEL1 : 1; /* Clock Source Select 1 */
unsigned char CKPL : 1; /* Clock Polarity */
unsigned char CKPH : 1; /* SPI: Clock Phase */
} U0TCTL_bit;
} @ 0x0071;
enum {
TXEPT = 0x0001,
STC = 0x0002,
TXWAKE = 0x0004,
URXSE = 0x0008,
SSEL0 = 0x0010,
SSEL1 = 0x0020,
CKPL = 0x0040,
CKPH = 0x0080,
};
__no_init volatile union
{
unsigned char U0RCTL; /* USART 0 Receive Control */
struct
{
unsigned char RXERR : 1; /* RX Error Error */
unsigned char RXWAKE : 1; /* RX Wake up detect */
unsigned char URXWIE : 1; /* RX Wake up interrupt enable */
unsigned char URXEIE : 1; /* RX Error interrupt enable */
unsigned char BRK : 1; /* Break detected */
unsigned char OE : 1; /* Overrun Error */
unsigned char PE : 1; /* Parity Error */
unsigned char FE : 1; /* Frame Error */
} U0RCTL_bit;
} @ 0x0072;
enum {
RXERR = 0x0001,
RXWAKE = 0x0002,
URXWIE = 0x0004,
URXEIE = 0x0008,
BRK = 0x0010,
OE = 0x0020,
PE = 0x0040,
FE = 0x0080,
};
/* USART 0 Modulation Control */
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