📄 mifare.lst
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250 2 {
251 3 return MI_OK;
252 3 }
253 2 else
254 2 {
255 3 return MI_SERNRERR;
256 3 }
257 2 }
258 1 return MI_BYTECOUNTERR;
259 1 }
260
261 /*****************************************************
262
263 mifare select card command
264
265 ******************************************************/
266 char mif_select(unsigned char *serial)
267 {
268 1 unsigned char status;
269 1 unsigned char sum,fifolength;
270 1 unsigned int k=0;
271 1
272 1 ClearBitMask(RegControl,0x08); // disable crypto 1 unit
273 1 WriteIO(RegChannelRedundancy,0x0f); // RxCRC and TxCRC disable, parity enable
274 1 WriteIO(RegCommand,00); // terminate probably running command
275 1 FlushFIFO();
276 1 status=ReadIO(RegPrimaryStatus); //
277 1
278 1 if((status&0x60)!=0x00)
279 1 return MI_CHK_FAILED;
280 1
281 1 //WriteIO(RegFIFOData,0x97);
282 1 WriteIO(RegFIFOData,0x93);
283 1 WriteIO(RegFIFOData,0x70);
284 1
285 1 WriteIO(RegFIFOData,*serial);
286 1 sum=*serial++;
287 1 WriteIO(RegFIFOData,*serial); //serial[1]
288 1 sum^=*serial++;
289 1 WriteIO(RegFIFOData,*serial); //serial[2]
290 1 sum^=*serial++;
291 1 WriteIO(RegFIFOData,*serial); //serial[3]
292 1 sum^=*serial;
293 1 WriteIO(RegFIFOData,sum); //parity summary
294 1 WriteIO(RegCommand,0x1e); //A :transmit //0x1e :transeive
295 1 delay_50us(4);
296 1 WriteIO(RegCommand,00);
297 1 //status=ReadIO(RegPrimaryStatus);
298 1
299 1 fifolength= ReadIO(RegFIFOLength); //fifo length
300 1
301 1 if (fifolength==1)
302 1 {
C51 COMPILER V8.08 MIFARE 09/04/2008 10:09:55 PAGE 6
303 2 status=ReadIO(RegFIFOData);
304 2 if(status==0x08)
305 2 {
306 3 return MI_OK;
307 3 }
308 2 else
309 2 {
310 3 return MI_NOTAGERR ;
311 3 }
312 2 }
313 1 else
314 1 {
315 2 return MI_BYTECOUNTERR;
316 2 }
317 1 }
318
319 /************************************************************
320
321 loadkey command
322
323 *************************************************************/
324 char mif_load_key(unsigned char *uncodekey)
325 {
326 1 unsigned char status,i;
327 1 unsigned char keybuffer[12];
328 1
329 1 ClearBitMask(RegControl,0x08); // disable crypto 1 unit
330 1 WriteIO(RegCommand,00); // terminate probably running command
331 1 FlushFIFO();
332 1 status=M500HostCodeKey(uncodekey,keybuffer);
333 1 if(status==MI_OK)
334 1 {
335 2 for(i=0;i<12;i++)
336 2 WriteIO(RegFIFOData,keybuffer[i]); //write coded keydata into fifo
337 2 WriteIO(RegCommand,0x19); //loadkey command 0x19
338 2 delay_50us(4); //delay_50us(20);//delay 1ms
339 2 WriteIO(RegCommand,00);
340 2 status=ReadIO(RegErrorFlag ); //ERROR FLAG REGISTER
341 2
342 2 if((status&0x40)==0x00)
343 2 return MI_OK; //operate right
344 2 }
345 1 return MI_KEYERR; //operate wrong
346 1 }
347
348 /*************************************************************
349
350 mifare authent command
351
352 **************************************************************/
353 char mif_authentication( unsigned char auth_mode,unsigned char sactor,unsigned char *snr)
354 {
355 1 unsigned char i,status;
356 1 unsigned char MSndBuffer[6];
357 1 unsigned char keyaorb;
358 1 unsigned char block;
359 1
360 1 block=sactor*4+3;
361 1 if(auth_mode) keyaorb=0x60; //keya 验证A密钥
362 1 else keyaorb=0x61; //keyb 验证A密钥
363 1
364 1 MSndBuffer[0] = keyaorb; // mifare authentication command authen keya:0x60 keyb:0x61
C51 COMPILER V8.08 MIFARE 09/04/2008 10:09:55 PAGE 7
365 1 MSndBuffer[1] = block; // write block number for authentication
366 1
367 1 for(i=0;i<4;i++)
368 1 MSndBuffer[i+2]=snr[i]; // write 4 bytes card serial number
369 1
370 1 ClearBitMask(RegControl,0x08); // disable crypto 1 unit
371 1 WriteIO(RegCommand,00); // terminate probably running command 切换至闲转置状态
372 1
373 1 FlushFIFO();
374 1
375 1 status=ReadIO(RegPrimaryStatus); //读03H，接收器各发送器及FIFO状态
376 1 if((status&0x60)!=0x00)
377 1 return MI_CHK_FAILED;
378 1
379 1 for(i=0;i<6;i++)
380 1 WriteIO(RegFIFOData,MSndBuffer[i]); //把密钥和卡号写入FIFO缓冲区
381 1
382 1 WriteIO(RegCommand,0x0c); //写命今0C进（01H）命令寄存器
383 1 delay_50us(4); //delay 750us 延时
384 1
385 1 status=ReadIO(RegPrimaryStatus);
386 1 WriteIO(RegCommand,00);
387 1
388 1 if(status<=0x01)
389 1 {
390 2 WriteIO(RegCommand,0x14); //rc531 authen2 command 0x14
391 2 delay_50us(6); //delay_50us(30);// delay 1ms
392 2 status=ReadIO(RegPrimaryStatus);//check bit crypto1on=1?
393 2 WriteIO(RegCommand,00);
394 2 if(status<=0x01)
395 2 {
396 3 status=ReadIO(RegControl); //check bit crypto1on=1?
397 3 if(status&0x08)
398 3 return MI_OK;
399 3 }
400 2 }
401 1
402 1 return MI_AUTHERR ;
403 1 }
404
405 /*************************************************************
406
407 mifare write command
408
409 **************************************************************/
410 char mif_Write( unsigned char blockaddr,unsigned char *W_data)
411 {
412 1 unsigned char i,status,ackdata;
413 1
414 1 WriteIO(RegChannelRedundancy,0x0f); // RxCRC and TxCRC disable, parity enable
415 1 WriteIO(RegCommand,00); // terminate probably running command
416 1 FlushFIFO();
417 1
418 1 status=ReadIO(RegPrimaryStatus);
419 1 if((status&0x70)!=0x00)
420 1 return MI_CHK_FAILED;
421 1
422 1 WriteIO(RegFIFOData,0xa0); //mifare write command 0xa0
423 1 WriteIO(RegFIFOData,blockaddr);
424 1
425 1 WriteIO(RegCommand,0x1e); //transive command
426 1 delay_50us(4); //delay 1ms
C51 COMPILER V8.08 MIFARE 09/04/2008 10:09:55 PAGE 8
427 1 WriteIO(RegCommand,00);
428 1 ackdata=ReadIO(RegFIFOData);
429 1
430 1 if((ackdata&=0x0f)==0x0a) //---------send data deal--------------
431 1 {
432 2 WriteIO(RegCommand,00); //send idle command
433 2 FlushFIFO();
434 2
435 2 status=ReadIO(RegPrimaryStatus);
436 2 if(status==0x05)
437 2 {
438 3 for(i=0;i<16;i++)
439 3 WriteIO(RegFIFOData,W_data[i]); //write data into card
440 3 WriteIO(RegCommand,0x1e); //transive command
441 3 //delay_50us(5); //40 //delay 2ms
442 3 delay_50us(20);
443 3 WriteIO(RegCommand,00);
444 3
445 3 status=ReadIO(RegFIFOData);
446 3 if(status==0x0a)
447 3 return MI_OK; //status==0x0a is right return
448 3 }
449 2 }
450 1
451 1 return MI_WRITEERR; //write card wrong return
452 1 }
453
454 /*************************************************************
455
456 mifare read command
457
458 **************************************************************/
459 char mif_Read(unsigned char blockaddr,unsigned char *mif_data)
460 {
461 1 unsigned char i ,status;
462 1 unsigned char fifolength;
463 1
464 1 WriteIO(RegChannelRedundancy,0x0f); // RxCRC and TxCRC disable, parity enable
465 1 WriteIO(RegCommand,00); // terminate probably running command
466 1 FlushFIFO();
467 1
468 1 status=ReadIO(RegPrimaryStatus);
469 1 if((status&0x70)!=0x00)
470 1 return MI_CHK_FAILED;
471 1
472 1 WriteIO(RegFIFOData,0x30); //mifare write command 0xa0
473 1 WriteIO(RegFIFOData,blockaddr);
474 1 WriteIO(RegCommand,0x1e); //transive command
475 1 delay_50us(6); //delay 1ms
476 1 WriteIO(RegCommand,00);
477 1 fifolength= ReadIO(RegFIFOLength); //fifo length
478 1 if(fifolength==16)
479 1 {
480 2 for(i=0;i<16;i++) //copy card block data
481 2 *mif_data++=ReadIO(RegFIFOData);
482 2 return MI_OK; //read card success
483 2 }
484 1 return MI_READERR;
485 1 }
486
487 /*************************************************************
488
C51 COMPILER V8.08 MIFARE 09/04/2008 10:09:55 PAGE 9
489 mifare increment command
490
491 **************************************************************/
492 /*
493 char mif_Increment(unsigned char block_addr, unsigned long val)
494 {
495 unsigned char idata status,ackdata;
496 UNLONG idata value;
497
498 value.btlong=val;
499 WriteIO(RegChannelRedundancy,0x0f); // RxCRC and TxCRC disable, parity enable
500 WriteIO(RegCommand,00); // terminate probably running command
501 FlushFIFO();
502 status=ReadIO(RegPrimaryStatus);
503 if((status&0x70)!=0x00)
504 return MI_CHK_FAILED;
505
506 WriteIO(RegFIFOData,0xc1); //mifare Inc command
507 WriteIO(RegFIFOData,block_addr); //card block address
508 WriteIO(RegCommand,0x1e); //transive command
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