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📄 mifare.h

📁 利用NXP的新一代高集成度的芯片RC500完成Mifare系列卡的读写
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#include<absacc.h>
#ifndef _MIFARE_H
#define _MIFARE_H

//M500A.h
// P I C C - C O M M A N D S
// commands which are handled by the tag
// Each tag command is written to the reader IC and transfered via RF
#define PICC_REQSTD        0x26			// request idle
#define PICC_REQALL        0x52			// request all
#define PICC_ANTICOLL1     0x93			// anticollision level 1
#define PICC_ANTICOLL2     0x95			// anticollision level 2
#define PICC_ANTICOLL3     0x97			// anticollision level 3
#define PICC_AUTHENT1A     0x60			// authentication step 1
#define PICC_AUTHENT1B     0x61			// authentication step 2
#define PICC_READ          0x30			// read block
#define PICC_WRITE         0xA0			// write block
#define PICC_DECREMENT     0xC0         // decrement value
#define PICC_INCREMENT     0xC1         // increment value
#define PICC_RESTORE       0xC2         // restore command code
#define PICC_TRANSFER      0xB0         // transfer command code
#define PICC_HALT          0x50			// halt

// T Y P E  B  -  C O M M A N D S 
// commands which are handled by the tag
// Each tag command is written to the reader IC and transfered via RF
#define PICC_REQBSTD       0x00			// request normal
#define PICC_REQBWUP       0x08			// request wakeup

// ISO14443 
#define TYPEA			   0x00
#define TYPEB			   0x08
// Mifare Error Codes
// Each function returns a status value, which corresponds to the
// mifare error codes. 
#define MI_OK                           0
#define MI_CHK_OK                       0
#define MI_CRC_ZERO                     0

#define MI_CRC_NOTZERO                  1

#define MI_NOTAGERR                     (-1)
#define MI_CHK_FAILED                   (-1)
#define MI_CRCERR                       (-2)
#define MI_CHK_COMPERR                  (-2)
#define MI_EMPTY                        (-3)
#define MI_AUTHERR                      (-4)
#define MI_PARITYERR                    (-5)
#define MI_CODEERR                      (-6)

#define MI_SERNRERR                     (-8)
#define MI_KEYERR                       (-9)
#define MI_NOTAUTHERR                   (-10)
#define MI_BITCOUNTERR                  (-11)
#define MI_BYTECOUNTERR                 (-12)
#define MI_IDLE                         (-13)
#define MI_TRANSERR                     (-14)
#define MI_WRITEERR                     (-15)
#define MI_INCRERR                      (-16)
#define MI_DECRERR                      (-17)
#define MI_READERR                      (-18)
#define MI_OVFLERR                      (-19)
#define MI_POLLING                      (-20)
#define MI_FRAMINGERR                   (-21)
#define MI_ACCESSERR                    (-22)
#define MI_UNKNOWN_COMMAND              (-23)
#define MI_COLLERR                      (-24)
#define MI_RESETERR                     (-25)
#define MI_INITERR                      (-25)
#define MI_INTERFACEERR                 (-26)
#define MI_ACCESSTIMEOUT                (-27)
#define MI_NOBITWISEANTICOLL            (-28)
#define MI_QUIT                         (-30)

#define MI_RECBUF_OVERFLOW              (-50) 
#define MI_SENDBYTENR                   (-51)
	
#define MI_SENDBUF_OVERFLOW             (-53)
#define MI_BAUDRATE_NOT_SUPPORTED       (-54)
#define MI_SAME_BAUDRATE_REQUIRED       (-55)

#define MI_WRONG_PARAMETER_VALUE        (-60)

#define MI_BREAK                        (-99)
#define MI_NY_IMPLEMENTED               (-100)
#define MI_NO_MFRC                      (-101)
#define MI_MFRC_NOTAUTH                 (-102)
#define MI_WRONG_DES_MODE               (-103)
#define MI_HOST_AUTH_FAILED             (-104)

#define MI_WRONG_LOAD_MODE              (-106)
#define MI_WRONG_DESKEY                 (-107)
#define MI_MKLOAD_FAILED                (-108)
#define MI_FIFOERR                      (-109)
#define MI_WRONG_ADDR                   (-110)
#define MI_DESKEYLOAD_FAILED            (-111)

#define MI_WRONG_SEL_CNT                (-114)

#define MI_WRONG_TEST_MODE              (-117)
#define MI_TEST_FAILED                  (-118)
#define MI_TOC_ERROR                    (-119)
#define MI_COMM_ABORT                   (-120)
#define MI_INVALID_BASE                 (-121)
#define MI_MFRC_RESET                   (-122)
#define MI_WRONG_VALUE                  (-123)
#define MI_VALERR                       (-124)

//mifare531.h
// Important registers of the MF RC500 reader module
// PAGE 0      Command and Status
#define     RegPage               0x00    // Page Select Register
#define     RegCommand            0x01    // Command Register
#define     RegFIFOData           0x02    // FiFo Register
#define     RegPrimaryStatus      0x03    // Modem State/IRQ/ERR/LoHiAlert Reg
#define     RegFIFOLength         0x04    // Buffer lenght Register
#define     RegSecondaryStatus    0x05
#define     RegInterruptEn        0x06    // IRQ enable Register
#define     RegInterruptRq        0x07    // IRQ bits Register
// PAGE 1      Control and Status
#define     RegControl            0x09    // processor control
#define     RegErrorFlag          0x0A
#define     RegCollpos            0x0B
#define     RegTimerValue         0x0C
#define     RegCRCResultLSB       0x0D
#define     RegCRCResultMSB       0x0E
#define     RegBitFraming         0x0F
// PAGE 2      Transmitter and Coder Control
#define     RegTxControl          0x11
#define     RegCwConductance      0x12
#define     RegModConductance     0x13
#define     RegCoderControl       0x14
#define     RegModWidth           0x15
#define     RFU16                 0x16
#define     RegTypeBFraming       0x17
// PAGE 3      Receiver and Decoder Control
#define     RegRxControl1         0x19
#define     RegDecoderControl     0x1A
#define     RegBitPhase           0x1B
#define     RegRxThreshold        0x1C
#define     RegBPSKDemControl     0x1D
#define     RegRxControl2         0x1E
#define     RegClockQControl      0x1F
// PAGE 4      RF-Timing and Channel Redundancy
#define     RegRxWait             0x21
#define     RegChannelRedundancy  0x22
#define     RegCRCPresetLSB       0x23
#define     RegCRCPresetMSB       0x24
#define     RFU25                 0x25
#define     RegMfOutSelect        0x26
#define     RFU27                 0x27
// PAGE 5      FIFO, Timer and IRQ-Pin Configuration
#define     RegFIFOLevel          0x29
#define     RegTimerClock         0x2A
#define     RegTimerControl       0x2B
#define     RegTimerReload        0x2C
#define     RegIRqPinConfig       0x2D
#define     RFU2E                 0x2E
#define     RFU2F                 0x2F
// PAGE 6      RFU
#define     RFU31                 0x31
#define     RFU32                 0x32
#define     RFU33                 0x33
#define     RFU34                 0x34
#define     RFU35                 0x35
#define     RFU36                 0x36
#define     RFU37                 0x37
// PAGE 7      Test Control
#define     RFU39                 0x39   //!< RFU
#define     RegTestAnaSelect      0x3A   //!< selects analog test mode
#define     RFU3B                 0x3B   //!< RFU
#define     RFU3C                 0x3C   //!< RFU
#define     RegTestDigiSelect     0x3D   //!< selects digital test mode
#define     RFU3E                 0x3E   //!< RFU
#define     RFU3F		  0x3F

#define DEF_FIFO_LENGTH     64  // default FIFO length

/// maximal transfer buffer size between PCD and PICC
#define MAX_RF_BUF_SIZE     128	

//                   P C D - C O M M A N D S
#define PCD_IDLE           0x00 // No action: cancel current command 
                                // or home state, respectively
#define PCD_WRITEE2        0x01 // Get data from FIFO and write it to the E2PROM
#define PCD_READE2         0x03 // Read data from E2PROM and put it into the 
                                // FIFO
#define PCD_LOADCONFIG     0x07 // Read data from E2PROM and initialise the 
                                // registers
#define PCD_LOADKEYE2      0x0B // Read a master key from the E2PROM and put 
                                // it into the master key buffer
#define PCD_AUTHENT1       0x0C // Perform the first part of the card 
                                // authentication using the Crypto1 algorithm.
                                // Remark: The master key is automatically taken 
                                // from 
                                // the master key buffer. this implies, that the
                                // command LoadKeyE2 has to be executed before 
                                // to use a certain key for card authentication
#define PCD_CALCCRC        0x12	// Activate the CRC-Coprocessor
                                // Remark: The result of the CRC calculation can
                                // be read from the register CRCResultXXX
#define PCD_AUTHENT2       0x14	// Perform the second part of the card 
                                // authentication using the Crypto1 algorithm.
#define PCD_RECEIVE        0x16 // Activate Receiver Circuitry. Before the 
                                // receiver actually starts, the state machine 
                                // waits until the time 
                                // configured in the register RcvWait has 
                                // passed.
                                // Remark: It is possible to read data from the 
                                // FIFO although Receive is active. Thus it is 
                                // possible to receive any number of bytes by 
                                // reading them from the FIFO in time.
#define PCD_LOADKEY        0x19 // Read a master key from the FIFO and put it 
                                // into the master key buffer
                                // Remark: The master key has to be prepared in
                                // a certain format. Thus, 12 byte have to be 
                                // passed to load a 6 byte master key
#define PCD_TRANSMIT       0x1A // Transmit data from FIFO to the card
                                // Remark: If data is already in the FIFO when 
                                // the command is activated, this data is 
                                // transmitted immediately. It is possible to 
                                // write data to the FIFO although Transmit 
                                // is active. Thus it is possible to transmitt 
                                // any number of bytes by writting them to the 
                                // FIFO in time. 
#define PCD_TRANSCEIVE     0x1E	// Transmit data from FIFO to the card and after 
                                // that automatically activates the receiver. 
                                // Before the receiver actually starts, the 
                                // STATE MACHINE waits until the time configured
                                //  in the register RcvWait has passed.
                                // Remark: This command is the combination of 
                                // Transmit and Receive
#define PCD_RESETPHASE     0x3F // Runs the Reset- and Initialisation Phase
                                // Remark: This command can not be activated by 
                                // software, but only by a Power-On or 
                                // Hard Reset 

#define ALL                   0x01
#define IDLE                  0x00
#define KEYB                  0x04
#define KEYA                  0x00
#define KEYSET0               0x00
#define KEYSET1               0x01
#define KEYSET2               0x02
#define HF                    0x40
#define CRC8                  0x80
#define CRC16                 0x00

//#define Gpbase	              0xB000                    //感应模块地址 
#define Gpbase	              0x7F00                    //感应模块地址 

#define outportb(addr,d)	XBYTE[addr]=d
#define inportb(addr)		XBYTE[addr]
#define delaynop()		_nop_()

//char mif_config(void);
//unsigned char reade2(unsigned char *e2data);
//char mif_request2(unsigned char mode,unsigned char *atq);
//char mif_anticoll(unsigned char bcnt,unsigned char  *cardsnr);
//char mif_select(unsigned char  *serial);
//char mif_authentication( unsigned char auth_mode,unsigned char sactor,unsigned char *snr);
//char mif_Write( unsigned char blockaddr,unsigned char *W_data);
//char mif_Read(unsigned char blockaddr,unsigned char *mif_data);
//char mif_load_key(unsigned char  *uncodekey);

//char mif_Increment(unsigned char block_addr, unsigned long value);
//char mif_Decrement(unsigned char block_addr, unsigned long value);
//char mif_restore(unsigned char block_addr);
//char mif_transfer(unsigned char block_addr);
//char mif_Halt(void);

void delay_50us(unsigned char i);

#endif

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