ixosalmemaccess.h

有关ARM开发板上的IXP400网络驱动程序的源码以。

/** 
 * @file IxOsalMemAccess.h
 * 
 * @brief Header file for memory access
 * 
 * @par
 * @version $Revision: 1.0 $
 * 
 * @par
 * IXP400 SW Release version 2.1
 * 
 * -- Copyright Notice --
 * 
 * @par
 * Copyright (c) 2001-2005, Intel Corporation.
 * All rights reserved.
 * 
 * @par
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * 1. Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 * 2. Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the distribution.
 * 3. Neither the name of the Intel Corporation nor the names of its contributors
 *    may be used to endorse or promote products derived from this software
 *    without specific prior written permission.
 * 
 * 
 * @par
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ``AS IS''
 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
 * ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
 * SUCH DAMAGE.
 * 
 * 
 * @par
 * -- End of Copyright Notice --
 */

#ifndef IxOsalMemAccess_H
#define IxOsalMemAccess_H


/* Global BE switch
 * 
 *  Should be set only in BE mode and only if the component uses I/O memory.
 */

#if defined (__BIG_ENDIAN)

#define IX_OSAL_BE_MAPPING

#endif /* Global switch */


/* By default only static memory maps in use;
   define IX_OSAL_DYNAMIC_MEMORY_MAP per component if dynamic maps are
   used instead in that component */
#define IX_OSAL_STATIC_MEMORY_MAP


/* 
 * SDRAM coherency mode
 * Must be defined to BE, LE_DATA_COHERENT or LE_ADDRESS_COHERENT.
 * The mode changes depending on OS 
 */
#if defined (IX_OSAL_LINUX_BE) || defined (IX_OSAL_VXWORKS_BE)

#define IX_SDRAM_BE

#elif defined (IX_OSAL_VXWORKS_LE)

#define IX_SDRAM_LE_DATA_COHERENT

#elif defined (IX_OSAL_LINUX_LE)

#define IX_SDRAM_LE_DATA_COHERENT

#elif defined (IX_OSAL_WINCE_LE)

#define IX_SDRAM_LE_DATA_COHERENT

#elif defined (IX_OSAL_EBOOT_LE)

#define IX_SDRAM_LE_ADDRESS_COHERENT

#endif




/**************************************
 * Retrieve current component mapping *
 **************************************/

/*
 * Only use customized mapping for LE. 
 * 
 */
#if defined (IX_OSAL_VXWORKS_LE) || defined (IX_OSAL_LINUX_LE) || defined (IX_OSAL_WINCE_LE) || defined (IX_OSAL_EBOOT_LE)

#include "IxOsalOsIxp400CustomizedMapping.h"

#endif


/*******************************************************************
 * Turn off IX_STATIC_MEMORY map for components using dynamic maps *
 *******************************************************************/
#ifdef IX_OSAL_DYNAMIC_MEMORY_MAP

#undef IX_OSAL_STATIC_MEMORY_MAP

#endif


/************************************************************
 * Turn off BE access for components using LE or no mapping *
 ************************************************************/

#if ( defined (IX_OSAL_LE_AC_MAPPING) || defined (IX_OSAL_LE_DC_MAPPING) || defined (IX_OSAL_NO_MAPPING) )

#undef IX_OSAL_BE_MAPPING

#endif


/*****************
 * Safety checks *
 *****************/

/* Default to no_mapping */
#if !defined (IX_OSAL_BE_MAPPING) && !defined (IX_OSAL_LE_AC_MAPPING) && !defined (IX_OSAL_LE_DC_MAPPING) && !defined (IX_OSAL_NO_MAPPING)

#define IX_OSAL_NO_MAPPING

#endif /* check at least one mapping */

/* No more than one mapping can be defined for a component */
#if   (defined (IX_OSAL_BE_MAPPING)    && defined (IX_OSAL_LE_AC_MAPPING))  \
    ||(defined (IX_OSAL_BE_MAPPING)    && defined (IX_OSAL_LE_DC_MAPPING))  \
    ||(defined (IX_OSAL_BE_MAPPING)    && defined (IX_OSAL_NO_MAPPING))     \
    ||(defined (IX_OSAL_LE_DC_MAPPING) && defined (IX_OSAL_NO_MAPPING))     \
    ||(defined (IX_OSAL_LE_DC_MAPPING) && defined (IX_OSAL_LE_AC_MAPPING))	\
    ||(defined (IX_OSAL_LE_AC_MAPPING) && defined (IX_OSAL_NO_MAPPING))


#ifdef IX_OSAL_BE_MAPPING
#warning IX_OSAL_BE_MAPPING is defined
#endif

#ifdef IX_OSAL_LE_AC_MAPPING
#warning IX_OSAL_LE_AC_MAPPING is defined
#endif

#ifdef IX_OSAL_LE_DC_MAPPING
#warning IX_OSAL_LE_DC_MAPPING is defined
#endif

#ifdef IX_OSAL_NO_MAPPING
#warning IX_OSAL_NO_MAPPING is defined
#endif

#error More than one I/O mapping is defined, please check your component mapping

#endif /* check at most one mapping */


/* Now set IX_OSAL_COMPONENT_MAPPING */

#ifdef IX_OSAL_BE_MAPPING
#define IX_OSAL_COMPONENT_MAPPING IX_OSAL_BE
#endif

#ifdef IX_OSAL_LE_AC_MAPPING
#define IX_OSAL_COMPONENT_MAPPING IX_OSAL_LE_AC
#endif

#ifdef IX_OSAL_LE_DC_MAPPING
#define IX_OSAL_COMPONENT_MAPPING IX_OSAL_LE_DC
#endif

#ifdef IX_OSAL_NO_MAPPING
#define IX_OSAL_COMPONENT_MAPPING IX_OSAL_LE
#endif


/* SDRAM coherency should be defined */
#if !defined (IX_SDRAM_BE) && !defined (IX_SDRAM_LE_DATA_COHERENT) && !defined (IX_SDRAM_LE_ADDRESS_COHERENT)

#error SDRAM coherency must be defined

#endif /* SDRAM coherency must be defined */

/* SDRAM coherency cannot be defined in several ways */
#if (defined (IX_SDRAM_BE) && (defined (IX_SDRAM_LE_DATA_COHERENT) || defined (IX_SDRAM_LE_ADDRESS_COHERENT))) \
    || (defined (IX_SDRAM_LE_DATA_COHERENT) && (defined (IX_SDRAM_BE) || defined (IX_SDRAM_LE_ADDRESS_COHERENT))) \
    || (defined (IX_SDRAM_LE_ADDRESS_COHERENT) && (defined (IX_SDRAM_BE) || defined (IX_SDRAM_LE_DATA_COHERENT)))

#error SDRAM coherency cannot be defined in more than one way

#endif /* SDRAM coherency must be defined exactly once */


/*********************
 * Read/write macros *
 *********************/

/* WARNING - except for addition of special cookie read/write macros (see below)
             these macros are NOT user serviceable. Please do not modify */

#define IX_OSAL_READ_LONG_RAW(wAddr)          (*(wAddr))
#define IX_OSAL_READ_SHORT_RAW(sAddr)         (*(sAddr))
#define IX_OSAL_READ_BYTE_RAW(bAddr)          (*(bAddr))
#define IX_OSAL_WRITE_LONG_RAW(wAddr, wData)  (*(wAddr) = (wData))
#define IX_OSAL_WRITE_SHORT_RAW(sAddr,sData)  (*(sAddr) = (sData))
#define IX_OSAL_WRITE_BYTE_RAW(bAddr, bData)  (*(bAddr) = (bData))

#ifdef __linux

/* Linux - specific cookie reads/writes. 
  Redefine per OS if dynamic memory maps are used
  and I/O memory is accessed via functions instead of raw pointer access. */

#define IX_OSAL_READ_LONG_COOKIE(wCookie)           (readl((UINT32) (wCookie) ))
#define IX_OSAL_READ_SHORT_COOKIE(sCookie)          (readw((UINT32) (sCookie) ))
#define IX_OSAL_READ_BYTE_COOKIE(bCookie)           (readb((UINT32) (bCookie) ))
#define IX_OSAL_WRITE_LONG_COOKIE(wCookie, wData)   (writel(wData, (UINT32) (wCookie) ))
#define IX_OSAL_WRITE_SHORT_COOKIE(sCookie, sData)  (writew(sData, (UINT32) (sCookie) ))
#define IX_OSAL_WRITE_BYTE_COOKIE(bCookie, bData)   (writeb(bData, (UINT32) (bCookie) ))

#endif /* linux */

#ifdef __wince

/* WinCE - specific cookie reads/writes. */

static __inline__ UINT32
ixOsalWinCEReadLCookie (volatile UINT32 * lCookie)
{
    return *lCookie;
}

static __inline__ UINT16
ixOsalWinCEReadWCookie (volatile UINT16 * wCookie)
{
#if 0
    UINT32 auxVal = *((volatile UINT32 *) wCookie);
    if ((unsigned) wCookie & 3)