ixsspacc.c

有关ARM开发板上的IXP400网络驱动程序的源码以。

        ixSspAccSSPPortStatusSet(SSP_PORT_DISABLE);
        
        /* Unbind the SSP ISR if interrupt mode is enabled */
        if(TRUE == ixSspAccInterruptMode)
        {
            if(IX_SUCCESS != ixOsalIrqUnbind(IX_OSAL_IXP400_SSP_IRQ_LVL))
            {
                return IX_SSP_INT_UNBIND_FAIL;
            } /* end of ixOsalIrqUnbind Fail */
            ixSspAccRxFIFOIntDisable();
            ixSspAccTxFIFOIntDisable();
            /* Set all Handler pointers to NULL */
            ixRxFIFOOverrunHdlr = NULL;
            ixSspAccInterruptMode = FALSE;
        } /* end of TRUE == ixSspAccInterruptMode */
        
        /* Return the memory that was mapped during init which is the SSP control
            and status registers and the SSP data register. */
        IX_OSAL_MEM_UNMAP(ixSspCR0Addr);
        ixSspAccInitComplete = FALSE;
    } /* end of TRUE == ixSspAccInitComplete */

    return IX_SSP_SUCCESS;
} /* end of ixSspAccUninit */

PUBLIC IX_SSP_STATUS
ixSspAccFIFODataSubmit (
    UINT16* data,
    UINT32 amtOfData)
{
    UINT32 dataLoc = 0;

    /* Disallow this function from running if SSP not initialized */
    IX_SSP_INIT_SUCCESS_CHECK("ixSspAccFIFODataSubmit", IX_SSP_NOT_INIT);

    /* Check if the data pointer provided is NULL */
    if(NULL == data)
    {
        ixOsalLog (IX_OSAL_LOG_LVL_ERROR, IX_OSAL_LOG_DEV_STDERR,
            "ixSspAccFIFODataSubmit: data pointer is NULL.\n",
            0,0,0,0,0,0);
        return IX_SSP_NULL_POINTER;
    } /* end of NULL == data */

    /* Check if the Tx FIFO has sufficient space to store the number of data
        specified by amtOfData */
    if((ixSspAccTxFIFOLevelGet() + amtOfData) > IX_SSP_FIFO_FULL)
        return IX_SSP_FAIL;

    /* Copy the data from the data buffer pointer into the SSP Data Register */
    while(amtOfData > dataLoc)
        IX_OSAL_WRITE_LONG(ixSspDRAddr, data[dataLoc++]);

    /* Increment the SSP stats counter for data transmitted */
    ixSspAccStatsCounters.ixSspXmitCounter+=amtOfData;
    
    return IX_SSP_SUCCESS;
} /* end of ixSspAccFIFODataSubmit */

PUBLIC IX_SSP_STATUS
ixSspAccFIFODataReceive (
    UINT16* data,
    UINT32 amtOfData)
{
    UINT32 dataLoc = 0;

    /* Disallow this function from running if SSP not initialized */
    IX_SSP_INIT_SUCCESS_CHECK("ixSspAccFIFODataReceive", IX_SSP_NOT_INIT);
    
    /* Check if the data pointer provided is NULL */
    if(NULL == data)
    {
        ixOsalLog (IX_OSAL_LOG_LVL_ERROR, IX_OSAL_LOG_DEV_STDERR,
            "ixSspAccFIFODataReceive: data pointer is NULL.\n",
            0,0,0,0,0,0);
        return IX_SSP_NULL_POINTER;
    } /* end of NULL == data */

    /* Check if the Rx FIFO has the number of data specified by amtOfData to be
        retrieved */
    if(ixSspAccRxFIFOLevelGet() < amtOfData)
        return IX_SSP_FAIL;

    /* Overrun Check is called to increment the overrun counter if it occured
        and not used to determine whether an overrun occured therefore no checking
        of the return value is necessary */
    ixSspAccRxFIFOOverrunCheck();

    /* Copy the data from the SSP Data Register into the data buffer pointer */
    while(amtOfData > dataLoc)
        data[dataLoc++] = IX_OSAL_READ_LONG(ixSspDRAddr);

    /* Increment the SSP stats counter for data received */
    ixSspAccStatsCounters.ixSspRcvCounter+=amtOfData;

    return IX_SSP_SUCCESS;
} /* end of ixSspAccFIFODataReceive */

PUBLIC IX_SSP_STATUS
ixSspAccTxFIFOHitOrBelowThresholdCheck (
    void)
{
    /* Disallow this function from running if SSP not initialized */
    IX_SSP_INIT_SUCCESS_CHECK("ixSspAccTxFIFOHitOrBelowThresholdCheck",
                                IX_SSP_NOT_INIT);

    /* Read the SSP status register, SSSR */
    ixSspAccStsStored = IX_OSAL_READ_LONG (ixSspSRAddr);

    /* Check the Tx FIFO Service Request bit has been set to determine if the
        threshold has been hit or is below */
    if(IX_SSP_TX_FIFO_EXCEED_THLD ==
        ((ixSspAccStsStored & IX_SSP_TX_FIFO_SVC_REQ_MASK) >>
        IX_SSP_TX_FIFO_SVC_REQ_LOC))
    {
        return IX_SSP_TX_FIFO_EXCEED_THRESHOLD;
    }
    else
    {
        return IX_SSP_TX_FIFO_HIT_BELOW_THRESHOLD;
    }
} /* end of ixSspAccTxFIFOHitOrBelowThresholdCheck */

PUBLIC IX_SSP_STATUS
ixSspAccRxFIFOHitOrAboveThresholdCheck (
    void)
{
    /* Disallow this function from running if SSP not initialized */
    IX_SSP_INIT_SUCCESS_CHECK("ixSspAccRxFIFOHitOrAboveThresholdCheck",
                                    IX_SSP_NOT_INIT);

    /* Read the SSP status register, SSSR */
    ixSspAccStsStored = IX_OSAL_READ_LONG (ixSspSRAddr);
                                                    
    /* Check the Rx FIFO Service Request bit has been set to determine if the
    threshold has been hit or is above */
    if(IX_SSP_RX_FIFO_BELOW_THLD ==
        ((ixSspAccStsStored & IX_SSP_RX_FIFO_SVC_REQ_MASK) >>
        IX_SSP_RX_FIFO_SVC_REQ_LOC))
    {
        return IX_SSP_RX_FIFO_BELOW_THRESHOLD;
    }
    else
    {
        return IX_SSP_RX_FIFO_HIT_ABOVE_THRESHOLD;
    }
} /* end of ixSspAccRxFIFOHitOrAboveThresholdCheck */

/**
 * Configuration functions
 */

PUBLIC IX_SSP_STATUS
ixSspAccSSPPortStatusSet (
    IxSspAccPortStatus portStatusSelected)
{
    /* Disallow this function from running if SSP not initialized */
    IX_SSP_INIT_SUCCESS_CHECK("ixSspAccSSPPortStatusSet", IX_SSP_NOT_INIT);

    /* Check for validity of parameter */
    if(portStatusSelected >= INVALID_SSP_PORT_STATUS)
        return IX_SSP_FAIL;

    /* Write the parameter into the SSP Port Enable of SSCR0 register if selected
        differ from current status */
    if(((ixSspAccCfgStored.sscr0 & IX_SSP_PORT_STATUS_MASK) >>
         IX_SSP_PORT_STATUS_LOC) != portStatusSelected)
    {
        ixSspAccCfgStored.sscr0 =
            (ixSspAccCfgStored.sscr0 & (~IX_SSP_PORT_STATUS_MASK)) |
            (portStatusSelected << IX_SSP_PORT_STATUS_LOC);
        IX_OSAL_WRITE_LONG (ixSspCR0Addr, ixSspAccCfgStored.sscr0);
    } /* end of parameter write when current differs from selected */

    return IX_SSP_SUCCESS;
} /* end of ixSspAccSSPPortStatusSet */

PUBLIC IX_SSP_STATUS
ixSspAccFrameFormatSelect (
    IxSspAccFrameFormat frameFormatSelected)
{
    /* Disallow this function from running if SSP not initialized */
    IX_SSP_INIT_SUCCESS_CHECK("ixSspAccFrameFormatSelect", IX_SSP_NOT_INIT);

    /* Check for validity of parameter */
    if(frameFormatSelected >= INVALID_FORMAT)
        return IX_SSP_INVALID_FRAME_FORMAT_ENUM_VALUE;

    /* Determine if the SSP port is enabled. */
    if (SSP_PORT_ENABLE ==
        ((ixSspAccCfgStored.sscr0 & IX_SSP_PORT_STATUS_MASK) >>
        IX_SSP_PORT_STATUS_LOC))
    {
        /* SSP Port enabled.
            Disable the SSP Port (clears FIFOs), then write the parameter
            into the Frame Format bit of SSCR0 register and re-enable the SSP
            Port. */
        ixSspAccSSPPortStatusSet(SSP_PORT_DISABLE);
        ixSspAccCfgStored.sscr0 =
            (ixSspAccCfgStored.sscr0 & (~IX_SSP_FRAME_FORMAT_MASK)) |
            (frameFormatSelected << IX_SSP_FRAME_FORMAT_LOC);
        ixSspAccSSPPortStatusSet(SSP_PORT_ENABLE); /* Both the format and the
                                                   status will be written into
                                                   the SSCR0 register together.
                                                    */
    } /* end of SSP_PORT_ENABLE */
    else /* start of SSP_PORT_DISABLE */
    {
        /* SSP Port not enabled.
        Write the parameter into the Frame Format bit of SSCR0 register */
        ixSspAccCfgStored.sscr0 =
            (ixSspAccCfgStored.sscr0 & (~IX_SSP_FRAME_FORMAT_MASK)) |
            (frameFormatSelected << IX_SSP_FRAME_FORMAT_LOC);
        IX_OSAL_WRITE_LONG (ixSspCR0Addr, ixSspAccCfgStored.sscr0);
    } /* end of SSP_PORT_DISABLE */

    return IX_SSP_SUCCESS;
} /* end of ixSspAccFrameFormatSelect */

PUBLIC IX_SSP_STATUS
ixSspAccDataSizeSelect (
    IxSspAccDataSize dataSizeSelected)
{
    /* Disallow this function from running if SSP not initialized */
    IX_SSP_INIT_SUCCESS_CHECK("ixSspAccDataSizeSelect", IX_SSP_NOT_INIT);

    /* Check for validity of parameter */
    if( (dataSizeSelected <= DATA_SIZE_TOO_SMALL) ||
        (dataSizeSelected >= DATA_SIZE_TOO_BIG) )
        return IX_SSP_INVALID_DATA_SIZE_ENUM_VALUE;

    /* Only allow change if Tx FIFO is empty */
    if(IX_SSP_FIFO_EMPTY != ixSspAccTxFIFOLevelGet())
        return IX_SSP_TX_FIFO_NOT_EMPTY;

    /* Only allow change if Rx FIFO is empty */
    if(IX_SSP_FIFO_EMPTY != ixSspAccRxFIFOLevelGet())
        return IX_SSP_RX_FIFO_NOT_EMPTY;

    /* Determine if the SSP port is enabled. */
    if (SSP_PORT_ENABLE ==
        ((ixSspAccCfgStored.sscr0 & IX_SSP_PORT_STATUS_MASK) >>
        IX_SSP_PORT_STATUS_LOC))
    {
        /* SSP Port enabled.
            Disable the SSP Port (clears FIFOs), then write the parameter
            into the data size select bit of SSCR0 register and re-enable the
            SSP Port. */
        ixSspAccSSPPortStatusSet(SSP_PORT_DISABLE);
        ixSspAccCfgStored.sscr0 =
            (ixSspAccCfgStored.sscr0 & (~IX_SSP_DATA_SIZE_MASK)) |
            (dataSizeSelected << IX_SSP_DATA_SIZE_LOC);
        ixSspAccSSPPortStatusSet(SSP_PORT_ENABLE); /* Both the data size and the
                                                   status will be written into
                                                   the SSCR0 register together.
                                                    */
    } /* end of SSP_PORT_ENABLE */
    else /* start of SSP_PORT_DISABLE */
    {
        /* SSP Port not enabled.
            Write the parameter into the data size select bit of SSCR0 register */
        ixSspAccCfgStored.sscr0 =
            (ixSspAccCfgStored.sscr0 & (~IX_SSP_DATA_SIZE_MASK)) |
            (dataSizeSelected << IX_SSP_DATA_SIZE_LOC);
        IX_OSAL_WRITE_LONG (ixSspCR0Addr, ixSspAccCfgStored.sscr0);
    } /* end of SSP_PORT_DISABLE */
    
    return IX_SSP_SUCCESS;
} /* end of ixSspAccDataSizeSelect */

PUBLIC IX_SSP_STATUS
ixSspAccClockSourceSelect (
    IxSspAccClkSource clkSourceSelected)
{
    /* Disallow this function from running if SSP not initialized */
    IX_SSP_INIT_SUCCESS_CHECK("ixSspAccClockSourceSelect", IX_SSP_NOT_INIT);

    /* Check for validity of parameter */
    if(clkSourceSelected >= INVALID_CLK_SOURCE)
        return IX_SSP_INVALID_CLOCK_SOURCE_ENUM_VALUE;

    /* Write the parameter into the Clock Source bit of SSCR0 register */
    ixSspAccCfgStored.sscr0 = (ixSspAccCfgStored.sscr0 & (~IX_SSP_CLK_SRC_MASK))
                                | (clkSourceSelected << IX_SSP_CLK_SRC_LOC);
    IX_OSAL_WRITE_LONG (ixSspCR0Addr, ixSspAccCfgStored.sscr0);
    
    return IX_SSP_SUCCESS;
} /* end of ixSspAccClockSourceSelect */

PUBLIC IX_SSP_STATUS
ixSspAccSerialClockRateConfigure (
    UINT8 serialClockRateSelected)
{
    /* Disallow this function from running if SSP not initialized */
    IX_SSP_INIT_SUCCESS_CHECK("ixSspAccSerialClockRateConfigure", IX_SSP_NOT_INIT);

    /* Write the parameter into the Clock Rate bits of SSCR0 register */
    ixSspAccCfgStored.sscr0 =
        (ixSspAccCfgStored.sscr0 & (~IX_SSP_SERIAL_CLK_RATE_MASK)) |
        (serialClockRateSelected << IX_SSP_SERIAL_CLK_RATE_LOC);
    IX_OSAL_WRITE_LONG (ixSspCR0Addr, ixSspAccCfgStored.sscr0);
    return IX_SSP_SUCCESS;
} /* end of ixSspAccSerialClockRateConfigure */

PUBLIC IX_SSP_STATUS
ixSspAccRxFIFOIntEnable (
    RxFIFOThresholdHandler rxFIFOIntrHandler)
{
    /* Disallow this function from running if SSP not initialized */
    IX_SSP_INIT_SUCCESS_CHECK("ixSspAccRxFIFOIntEnable", IX_SSP_NOT_INIT);

    /* Only allow to enable the interrupt if interrupt mode is set at init */
    if(FALSE == ixSspAccInterruptMode)
        return IX_SSP_POLL_MODE_BLOCKING;

    /* Check if a handler is provided */
    if(NULL == rxFIFOIntrHandler)
        return IX_SSP_RX_FIFO_HANDLER_MISSING;

    /* Set the Rx FIFO threshold interrupt handler function pointer to point to
    the function pointer parameter and enable the Rx FIFO interrupt by writing
    a one to the Rx FIFO Interrupt enable bit ofthe SSCR1 register */
    ixRxFIFOThsldHdlr = rxFIFOIntrHandler;
    ixSspAccCfgStored.sscr1 =
        (ixSspAccCfgStored.sscr1 & (~IX_SSP_RX_FIFO_INT_ENABLE_MASK)) |
        (IX_SSP_INTERRUPT_ENABLE << IX_SSP_RX_FIFO_INT_ENABLE_LOC);
    IX_OSAL_WRITE_LONG (ixSspCR1Addr, ixSspAccCfgStored.sscr1);
    
    return IX_SSP_SUCCESS;
} /* end of ixSspAccRxFIFOIntEnable */

PUBLIC IX_SSP_STATUS
ixSspAccRxFIFOIntDisable (
    void)
{
    /* Disallow this function from running if SSP not initialized */
    IX_SSP_INIT_SUCCESS_CHECK("ixSspAccRxFIFOIntDisable", IX_SSP_NOT_INIT);

    if(TRUE == ixSspAccInterruptMode)
    {
        /* Disable the Rx FIFO interrupt by writing zero to the Rx FIFO
            Interrupt enable bit ofthe SSCR1 register and setting the Tx
            FIFO threshold interrupt handler function pointer to NULL.*/
        ixSspAccCfgStored.sscr1 =
            (ixSspAccCfgStored.sscr1 & (~IX_SSP_RX_FIFO_INT_ENABLE_MASK)) |
            (IX_SSP_INTERRUPT_DISABLE << IX_SSP_RX_FIFO_INT_ENABLE_LOC);
        IX_OSAL_WRITE_LONG (ixSspCR1Addr, ixSspAccCfgStored.sscr1);
        ixRxFIFOThsldHdlr = NULL;
    } /* end of TRUE == ixSspAccInterruptMode */

    return IX_SSP_SUCCESS;
} /* end of ixSspAccRxFIFOIntDisable */

PUBLIC IX_SSP_STATUS
ixSspAccTxFIFOIntEnable (
    TxFIFOThresholdHandler txFIFOIntrHandler)
{
    /* Disallow this function from running if SSP not initialized */
    IX_SSP_INIT_SUCCESS_CHECK("ixSspAccTxFIFOIntEnable", IX_SSP_NOT_INIT);

    /* Only allow to enable the interrupt if interrupt mode is set at init */
    if(FALSE == ixSspAccInterruptMode)
        return IX_SSP_POLL_MODE_BLOCKING;

    /* Check if a handler is provided */
    if(NULL == txFIFOIntrHandler)
        return IX_SSP_TX_FIFO_HANDLER_MISSING;

    /* Set the Tx FIFO threshold interrupt handler function pointer to point to
        the function pointer parameter and enable the Tx FIFO interrupt by
        writing a one to the Rx FIFO Interrupt enable bit ofthe SSCR1
        register */
    ixTxFIFOThsldHdlr = txFIFOIntrHandler;
    ixSspAccCfgStored.sscr1 =
        (ixSspAccCfgStored.sscr1 & (~IX_SSP_TX_FIFO_INT_ENABLE_MASK)) |
        (IX_SSP_INTERRUPT_ENABLE << IX_SSP_TX_FIFO_INT_ENABLE_LOC);
    IX_OSAL_WRITE_LONG (ixSspCR1Addr, ixSspAccCfgStored.sscr1); 

    return IX_SSP_SUCCESS;
} /* end of ixSspAccTxFIFOIntEnable */

PUBLIC IX_SSP_STATUS
ixSspAccTxFIFOIntDisable (
    void)
{
    /* Disallow this function from running if SSP not initialized */
    IX_SSP_INIT_SUCCESS_CHECK("ixSspAccTxFIFOIntDisable", IX_SSP_NOT_INIT);

    if(TRUE == ixSspAccInterruptMode)
    {
        /* Disable the Tx FIFO interrupt by writing zero to the Rx FIFO
            Interrupt enable bit ofthe SSCR1 register and setting the Tx
            FIFO threshold interrupt    handler function pointer to NULL. */
        ixSspAccCfgStored.sscr1 =
            (ixSspAccCfgStored.sscr1 & (~IX_SSP_TX_FIFO_INT_ENABLE_MASK)) |